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Diffstat (limited to 'shared/mga_drv.h')
-rw-r--r--shared/mga_drv.h36
1 files changed, 17 insertions, 19 deletions
diff --git a/shared/mga_drv.h b/shared/mga_drv.h
index a5085b06..0e650b42 100644
--- a/shared/mga_drv.h
+++ b/shared/mga_drv.h
@@ -90,14 +90,14 @@ typedef struct drm_mga_private {
unsigned int texture_offset;
unsigned int texture_size;
- drm_map_t *sarea;
- drm_map_t *fb;
- drm_map_t *mmio;
- drm_map_t *status;
- drm_map_t *warp;
- drm_map_t *primary;
- drm_map_t *buffers;
- drm_map_t *agp_textures;
+ drm_local_map_t *sarea;
+ drm_local_map_t *fb;
+ drm_local_map_t *mmio;
+ drm_local_map_t *status;
+ drm_local_map_t *warp;
+ drm_local_map_t *primary;
+ drm_local_map_t *buffers;
+ drm_local_map_t *agp_textures;
} drm_mga_private_t;
/* mga_dma.c */
@@ -131,32 +131,30 @@ extern int mga_getparam( DRM_IOCTL_ARGS );
extern int mga_warp_install_microcode( drm_mga_private_t *dev_priv );
extern int mga_warp_init( drm_mga_private_t *dev_priv );
-#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER()
-
+#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER(dev_priv->primary)
+#if defined(__linux__) && defined(__alpha__)
#define MGA_BASE( reg ) ((unsigned long)(dev_priv->mmio->handle))
#define MGA_ADDR( reg ) (MGA_BASE(reg) + reg)
#define MGA_DEREF( reg ) *(volatile u32 *)MGA_ADDR( reg )
#define MGA_DEREF8( reg ) *(volatile u8 *)MGA_ADDR( reg )
-#ifdef __alpha__
#define MGA_READ( reg ) (_MGA_READ((u32 *)MGA_ADDR(reg)))
#define MGA_READ8( reg ) (_MGA_READ((u8 *)MGA_ADDR(reg)))
-#define MGA_WRITE( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF( reg ) = val; } while (0)
-#define MGA_WRITE8( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8( reg ) = val; } while (0)
+#define MGA_WRITE( reg, val ) do { DRM_WRITEMEMORYBARRIER(dev_priv->mmio); MGA_DEREF( reg ) = val; } while (0)
+#define MGA_WRITE8( reg, val ) do { DRM_WRITEMEMORYBARRIER(dev_priv->mmio); MGA_DEREF8( reg ) = val; } while (0)
static inline u32 _MGA_READ(u32 *addr)
{
- DRM_READMEMORYBARRIER();
+ DRM_READMEMORYBARRIER(dev_priv->mmio);
return *(volatile u32 *)addr;
}
-
#else
-#define MGA_READ( reg ) MGA_DEREF( reg )
-#define MGA_READ8( reg ) MGA_DEREF8( reg )
-#define MGA_WRITE( reg, val ) do { MGA_DEREF( reg ) = val; } while (0)
-#define MGA_WRITE8( reg, val ) do { MGA_DEREF8( reg ) = val; } while (0)
+#define MGA_READ8( reg ) DRM_READ8(dev_priv->mmio, (reg))
+#define MGA_READ( reg ) DRM_READ32(dev_priv->mmio, (reg))
+#define MGA_WRITE8( reg, val ) DRM_WRITE8(dev_priv->mmio, (reg), (val))
+#define MGA_WRITE( reg, val ) DRM_WRITE32(dev_priv->mmio, (reg), (val))
#endif
#define DWGREG0 0x1c00