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-rw-r--r--shared-core/drm.h32
-rw-r--r--shared-core/i915_dma.c10
-rw-r--r--shared-core/i915_drv.h34
-rw-r--r--shared-core/i915_irq.c10
4 files changed, 75 insertions, 11 deletions
diff --git a/shared-core/drm.h b/shared-core/drm.h
index 87f8da6b..cd2b1907 100644
--- a/shared-core/drm.h
+++ b/shared-core/drm.h
@@ -259,7 +259,8 @@ typedef enum drm_map_type {
_DRM_SHM = 2, /**< shared, cached */
_DRM_AGP = 3, /**< AGP/GART */
_DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */
- _DRM_CONSISTENT = 5 /**< Consistent memory for PCI DMA */
+ _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */
+ _DRM_TTM = 6
} drm_map_type_t;
/**
@@ -629,6 +630,32 @@ typedef struct drm_set_version {
int drm_dd_minor;
} drm_set_version_t;
+#define DRM_FENCE_FLAG_EMIT 0x00000001
+#define DRM_FENCE_FLAG_SHAREABLE 0x00000002
+#define DRM_FENCE_FLAG_WAIT_LAZY 0x00000004
+#define DRM_FENCE_FLAG_WAIT_IGNORE_SIGNALS 0x00000008
+
+#define DRM_FENCE_EXE 0x00000001
+
+typedef struct drm_fence_arg {
+ unsigned handle;
+ int class;
+ unsigned type;
+ unsigned flags;
+ unsigned signaled;
+ enum {
+ drm_fence_create,
+ drm_fence_destroy,
+ drm_fence_reference,
+ drm_fence_unreference,
+ drm_fence_signaled,
+ drm_fence_flush,
+ drm_fence_wait,
+ drm_fence_emit
+ } op;
+} drm_fence_arg_t;
+
+
/**
* \name Ioctls Definitions
*/
@@ -694,6 +721,9 @@ typedef struct drm_set_version {
#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, drm_wait_vblank_t)
+#define DRM_IOCTL_FENCE DRM_IOWR(0x3b, drm_fence_arg_t)
+
+
/*@}*/
/**
diff --git a/shared-core/i915_dma.c b/shared-core/i915_dma.c
index ba8c56ee..d6bb6c8e 100644
--- a/shared-core/i915_dma.c
+++ b/shared-core/i915_dma.c
@@ -434,15 +434,15 @@ static void i915_emit_breadcrumb(drm_device_t *dev)
dev_priv->sarea_priv->last_enqueue = ++dev_priv->counter;
- if (dev_priv->counter > 0x7FFFFFFFUL)
- dev_priv->sarea_priv->last_enqueue = dev_priv->counter = 1;
-
BEGIN_LP_RING(4);
OUT_RING(CMD_STORE_DWORD_IDX);
OUT_RING(20);
OUT_RING(dev_priv->counter);
OUT_RING(0);
ADVANCE_LP_RING();
+#ifdef I915_HAVE_FENCE
+ drm_fence_flush_old(dev, dev_priv->counter);
+#endif
}
static int i915_dispatch_cmdbuffer(drm_device_t * dev,
@@ -565,7 +565,9 @@ static int i915_dispatch_flip(drm_device_t * dev)
OUT_RING(dev_priv->counter);
OUT_RING(0);
ADVANCE_LP_RING();
-
+#ifdef I915_HAVE_FENCE
+ drm_fence_flush_old(dev, dev_priv->counter);
+#endif
dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
return 0;
}
diff --git a/shared-core/i915_drv.h b/shared-core/i915_drv.h
index a87075b1..403124c9 100644
--- a/shared-core/i915_drv.h
+++ b/shared-core/i915_drv.h
@@ -51,6 +51,11 @@
#define DRIVER_MINOR 5
#define DRIVER_PATCHLEVEL 0
+#if defined(__linux__)
+#define I915_HAVE_FENCE
+#define I915_HAVE_BUFFER
+#endif
+
typedef struct _drm_i915_ring_buffer {
int tail_mask;
unsigned long Start;
@@ -81,7 +86,7 @@ typedef struct drm_i915_private {
drm_dma_handle_t *status_page_dmah;
void *hw_status_page;
dma_addr_t dma_status_page;
- unsigned long counter;
+ uint32_t counter;
int back_offset;
int front_offset;
@@ -98,6 +103,14 @@ typedef struct drm_i915_private {
struct mem_block *agp_heap;
unsigned int sr01, adpa, ppcr, dvob, dvoc, lvds;
int vblank_pipe;
+
+#ifdef I915_HAVE_FENCE
+ uint32_t flush_sequence;
+ uint32_t flush_flags;
+ uint32_t flush_pending;
+ uint32_t saved_flush_status;
+#endif
+
} drm_i915_private_t;
extern drm_ioctl_desc_t i915_ioctls[];
@@ -123,6 +136,7 @@ extern void i915_driver_irq_postinstall(drm_device_t * dev);
extern void i915_driver_irq_uninstall(drm_device_t * dev);
extern int i915_vblank_pipe_set(DRM_IOCTL_ARGS);
extern int i915_vblank_pipe_get(DRM_IOCTL_ARGS);
+extern int i915_emit_irq(drm_device_t * dev);
/* i915_mem.c */
extern int i915_mem_alloc(DRM_IOCTL_ARGS);
@@ -132,6 +146,19 @@ extern int i915_mem_destroy_heap(DRM_IOCTL_ARGS);
extern void i915_mem_takedown(struct mem_block **heap);
extern void i915_mem_release(drm_device_t * dev,
DRMFILE filp, struct mem_block *heap);
+#ifdef I915_HAVE_FENCE
+/* i915_fence.c */
+extern void i915_fence_handler(drm_device_t *dev);
+extern int i915_fence_emit_sequence(drm_device_t *dev, uint32_t *sequence);
+extern void i915_poke_flush(drm_device_t *dev);
+extern void i915_sync_flush(drm_device_t *dev);
+#endif
+
+#ifdef I915_HAVE_BUFFER
+/* i915_buffer.c */
+extern drm_ttm_backend_t *i915_create_ttm_backend_entry(drm_device_t *dev,
+ int cached);
+#endif
#define I915_READ(reg) DRM_READ32(dev_priv->mmio_map, (reg))
#define I915_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio_map, (reg), (val))
@@ -191,6 +218,7 @@ extern int i915_wait_ring(drm_device_t * dev, int n, const char *caller);
#define I915REG_INT_IDENTITY_R 0x020a4
#define I915REG_INT_MASK_R 0x020a8
#define I915REG_INT_ENABLE_R 0x020a0
+#define I915REG_INSTPM 0x020c0
#define SRX_INDEX 0x3c4
#define SRX_DATA 0x3c5
@@ -272,6 +300,6 @@ extern int i915_wait_ring(drm_device_t * dev, int n, const char *caller);
#define CMD_OP_DESTBUFFER_INFO ((0x3<<29)|(0x1d<<24)|(0x8e<<16)|1)
-#define READ_BREADCRUMB(dev_priv) (((u32*)(dev_priv->hw_status_page))[5])
-
+#define READ_BREADCRUMB(dev_priv) (((volatile u32*)(dev_priv->hw_status_page))[5])
+#define READ_HWSP(dev_priv, reg) (((volatile u32*)(dev_priv->hw_status_page))[reg])
#endif
diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index 14213b58..08d3140b 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -56,8 +56,12 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
- if (temp & USER_INT_FLAG)
+ if (temp & USER_INT_FLAG) {
DRM_WAKEUP(&dev_priv->irq_queue);
+#ifdef I915_HAVE_FENCE
+ i915_fence_handler(dev);
+#endif
+ }
if (temp & (VSYNC_PIPEA_FLAG | VSYNC_PIPEB_FLAG)) {
atomic_inc(&dev->vbl_received);
@@ -68,7 +72,7 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
return IRQ_HANDLED;
}
-static int i915_emit_irq(drm_device_t * dev)
+int i915_emit_irq(drm_device_t * dev)
{
drm_i915_private_t *dev_priv = dev->dev_private;
@@ -260,7 +264,7 @@ void i915_driver_irq_preinstall(drm_device_t * dev)
{
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- I915_WRITE16(I915REG_HWSTAM, 0xfffe);
+ I915_WRITE16(I915REG_HWSTAM, 0xeffe);
I915_WRITE16(I915REG_INT_MASK_R, 0x0);
I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-10 15:02:59 +0000