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Diffstat (limited to 'shared-core/nv40_graph.c')
-rw-r--r--shared-core/nv40_graph.c191
1 files changed, 189 insertions, 2 deletions
diff --git a/shared-core/nv40_graph.c b/shared-core/nv40_graph.c
index 510ffa76..792734ed 100644
--- a/shared-core/nv40_graph.c
+++ b/shared-core/nv40_graph.c
@@ -10,6 +10,7 @@
*/
#define NV40_GRCTX_SIZE (175*1024)
#define NV43_GRCTX_SIZE (70*1024)
+#define NV46_GRCTX_SIZE (70*1024) /* probably ~64KiB */
#define NV4A_GRCTX_SIZE (64*1024)
#define NV4C_GRCTX_SIZE (25*1024)
#define NV4E_GRCTX_SIZE (25*1024)
@@ -274,6 +275,156 @@ nv43_graph_context_init(drm_device_t *dev, struct mem_block *ctx)
INSTANCE_WR(ctx, i/4, 0x3f800000);
};
+static void nv46_graph_context_init(drm_device_t *dev, struct mem_block *ctx)
+{
+ drm_nouveau_private_t *dev_priv = dev->dev_private;
+ int i;
+
+ INSTANCE_WR(ctx, 0x00000/4, nouveau_chip_instance_get(dev, ctx));
+ INSTANCE_WR(ctx, 0x00040/4, 0x0000ffff);
+ INSTANCE_WR(ctx, 0x00044/4, 0x0000ffff);
+ INSTANCE_WR(ctx, 0x0004c/4, 0x00000001);
+ INSTANCE_WR(ctx, 0x00138/4, 0x20010001);
+ INSTANCE_WR(ctx, 0x0013c/4, 0x0f73ef00);
+ INSTANCE_WR(ctx, 0x00144/4, 0x02008821);
+ INSTANCE_WR(ctx, 0x00174/4, 0x00000001);
+ INSTANCE_WR(ctx, 0x00178/4, 0x00000001);
+ INSTANCE_WR(ctx, 0x0017c/4, 0x00000001);
+ INSTANCE_WR(ctx, 0x00180/4, 0x00000001);
+ INSTANCE_WR(ctx, 0x00184/4, 0x00000001);
+ INSTANCE_WR(ctx, 0x00188/4, 0x00000001);
+ INSTANCE_WR(ctx, 0x0018c/4, 0x00000001);
+ INSTANCE_WR(ctx, 0x00190/4, 0x00000001);
+ INSTANCE_WR(ctx, 0x00194/4, 0x00000040);
+ INSTANCE_WR(ctx, 0x00198/4, 0x00000040);
+ INSTANCE_WR(ctx, 0x0019c/4, 0x00000040);
+ INSTANCE_WR(ctx, 0x001a4/4, 0x00000040);
+ INSTANCE_WR(ctx, 0x001ec/4, 0x0b0b0b0c);
+ INSTANCE_WR(ctx, 0x0035c/4, 0x00040000);
+ INSTANCE_WR(ctx, 0x0036c/4, 0x55555555);
+ INSTANCE_WR(ctx, 0x00370/4, 0x55555555);
+ INSTANCE_WR(ctx, 0x00374/4, 0x55555555);
+ INSTANCE_WR(ctx, 0x00378/4, 0x55555555);
+ INSTANCE_WR(ctx, 0x003a4/4, 0x00000008);
+ INSTANCE_WR(ctx, 0x003b8/4, 0x00003010);
+ INSTANCE_WR(ctx, 0x003dc/4, 0x00000111);
+ INSTANCE_WR(ctx, 0x003e0/4, 0x00000111);
+ INSTANCE_WR(ctx, 0x003e4/4, 0x00000111);
+ INSTANCE_WR(ctx, 0x003e8/4, 0x00000111);
+ INSTANCE_WR(ctx, 0x003ec/4, 0x00000111);
+ INSTANCE_WR(ctx, 0x003f0/4, 0x00000111);
+ INSTANCE_WR(ctx, 0x003f4/4, 0x00000111);
+ INSTANCE_WR(ctx, 0x003f8/4, 0x00000111);
+ INSTANCE_WR(ctx, 0x003fc/4, 0x00000111);
+ INSTANCE_WR(ctx, 0x00400/4, 0x00000111);
+ INSTANCE_WR(ctx, 0x00404/4, 0x00000111);
+ INSTANCE_WR(ctx, 0x00408/4, 0x00000111);
+ INSTANCE_WR(ctx, 0x0040c/4, 0x00000111);
+ INSTANCE_WR(ctx, 0x00410/4, 0x00000111);
+ INSTANCE_WR(ctx, 0x00414/4, 0x00000111);
+ INSTANCE_WR(ctx, 0x00418/4, 0x00000111);
+ INSTANCE_WR(ctx, 0x004b0/4, 0x00000111);
+ INSTANCE_WR(ctx, 0x004b4/4, 0x00080060);
+ INSTANCE_WR(ctx, 0x004d0/4, 0x00000080);
+ INSTANCE_WR(ctx, 0x004d4/4, 0xffff0000);
+ INSTANCE_WR(ctx, 0x004d8/4, 0x00000001);
+ INSTANCE_WR(ctx, 0x004ec/4, 0x46400000);
+ INSTANCE_WR(ctx, 0x004fc/4, 0xffff0000);
+ INSTANCE_WR(ctx, 0x00500/4, 0x88888888);
+ INSTANCE_WR(ctx, 0x00504/4, 0x88888888);
+ INSTANCE_WR(ctx, 0x00508/4, 0x88888888);
+ INSTANCE_WR(ctx, 0x0050c/4, 0x88888888);
+ INSTANCE_WR(ctx, 0x00510/4, 0x88888888);
+ INSTANCE_WR(ctx, 0x00514/4, 0x88888888);
+ INSTANCE_WR(ctx, 0x00518/4, 0x88888888);
+ INSTANCE_WR(ctx, 0x0051c/4, 0x88888888);
+ INSTANCE_WR(ctx, 0x00520/4, 0x88888888);
+ INSTANCE_WR(ctx, 0x00524/4, 0x88888888);
+ INSTANCE_WR(ctx, 0x00528/4, 0x88888888);
+ INSTANCE_WR(ctx, 0x0052c/4, 0x88888888);
+ INSTANCE_WR(ctx, 0x00530/4, 0x88888888);
+ INSTANCE_WR(ctx, 0x00534/4, 0x88888888);
+ INSTANCE_WR(ctx, 0x00538/4, 0x88888888);
+ INSTANCE_WR(ctx, 0x0053c/4, 0x88888888);
+ INSTANCE_WR(ctx, 0x00550/4, 0x0fff0000);
+ INSTANCE_WR(ctx, 0x00554/4, 0x0fff0000);
+ INSTANCE_WR(ctx, 0x0055c/4, 0x00011100);
+ for (i=0x00578; i<0x005b4; i+=4)
+ INSTANCE_WR(ctx, i/4, 0x07ff0000);
+ INSTANCE_WR(ctx, 0x005c0/4, 0x4b7fffff);
+ INSTANCE_WR(ctx, 0x005e8/4, 0x30201000);
+ INSTANCE_WR(ctx, 0x005ec/4, 0x70605040);
+ INSTANCE_WR(ctx, 0x005f0/4, 0xb8a89888);
+ INSTANCE_WR(ctx, 0x005f4/4, 0xf8e8d8c8);
+ INSTANCE_WR(ctx, 0x00608/4, 0x40100000);
+ INSTANCE_WR(ctx, 0x00624/4, 0x0000ffff);
+ INSTANCE_WR(ctx, 0x00658/4, 0x435185d6);
+ INSTANCE_WR(ctx, 0x0065c/4, 0x2155b699);
+ INSTANCE_WR(ctx, 0x00660/4, 0xfedcba98);
+ INSTANCE_WR(ctx, 0x00664/4, 0x00000098);
+ INSTANCE_WR(ctx, 0x00674/4, 0xffffffff);
+ INSTANCE_WR(ctx, 0x00678/4, 0x00ff7000);
+ INSTANCE_WR(ctx, 0x0067c/4, 0x0000ffff);
+ INSTANCE_WR(ctx, 0x0068c/4, 0x00ff0000);
+ INSTANCE_WR(ctx, 0x006c8/4, 0x00ffff00);
+ for (i=0x0070c; i<=0x00748; i+=4)
+ INSTANCE_WR(ctx, i/4, 0x00018488);
+ for (i=0x0074c; i<=0x00788; i+=4)
+ INSTANCE_WR(ctx, i/4, 0x00028202);
+ for (i=0x007cc; i<=0x00808; i+=4)
+ INSTANCE_WR(ctx, i/4, 0x0000aae4);
+ for (i=0x0080c; i<=0x00848; i+=4)
+ INSTANCE_WR(ctx, i/4, 0x01012000);
+ for (i=0x0084c; i<=0x00888; i+=4)
+ INSTANCE_WR(ctx, i/4, 0x00080008);
+ for (i=0x008cc; i<=0x00908; i+=4)
+ INSTANCE_WR(ctx, i/4, 0x00100008);
+ for (i=0x0095c; i<=0x00968; i+=4)
+ INSTANCE_WR(ctx, i/4, 0x0001bc80);
+ for (i=0x0096c; i<=0x00978; i+=4)
+ INSTANCE_WR(ctx, i/4, 0x00000202);
+ for (i=0x0098c; i<=0x00998; i+=4)
+ INSTANCE_WR(ctx, i/4, 0x00000008);
+ for (i=0x009ac; i<=0x009b8; i+=4)
+ INSTANCE_WR(ctx, i/4, 0x00080008);
+ INSTANCE_WR(ctx, 0x009cc/4, 0x00000002);
+ INSTANCE_WR(ctx, 0x00a00/4, 0x00000421);
+ INSTANCE_WR(ctx, 0x00a04/4, 0x030c30c3);
+ INSTANCE_WR(ctx, 0x00a08/4, 0x00011001);
+ INSTANCE_WR(ctx, 0x00a14/4, 0x3e020200);
+ INSTANCE_WR(ctx, 0x00a18/4, 0x00ffffff);
+ INSTANCE_WR(ctx, 0x00a1c/4, 0x0c103f00);
+ INSTANCE_WR(ctx, 0x00a28/4, 0x00040000);
+ INSTANCE_WR(ctx, 0x00a60/4, 0x00008100);
+ INSTANCE_WR(ctx, 0x00aec/4, 0x00000001);
+ INSTANCE_WR(ctx, 0x00b30/4, 0x00001001);
+ INSTANCE_WR(ctx, 0x00b38/4, 0x00000003);
+ INSTANCE_WR(ctx, 0x00b3c/4, 0x00888001);
+ INSTANCE_WR(ctx, 0x00bc0/4, 0x00000005);
+ INSTANCE_WR(ctx, 0x00bcc/4, 0x0000ffff);
+ INSTANCE_WR(ctx, 0x00be8/4, 0x00005555);
+ INSTANCE_WR(ctx, 0x00bec/4, 0x00005555);
+ INSTANCE_WR(ctx, 0x00bf0/4, 0x00005555);
+ INSTANCE_WR(ctx, 0x00bf4/4, 0x00000001);
+ INSTANCE_WR(ctx, 0x00c2c/4, 0x00000001);
+ INSTANCE_WR(ctx, 0x00c30/4, 0x08e00001);
+ INSTANCE_WR(ctx, 0x00c34/4, 0x000e3000);
+ for (i=0x017f8; i<=0x01870; i+=8)
+ INSTANCE_WR(ctx, i/4, 0x3f800000);
+ for (i=0x035b8; i<=0x057a8; i+=24)
+ INSTANCE_WR(ctx, i/4, 0x00000001);
+ for (i=0x057b8; i<=0x05ba8; i+=16)
+ INSTANCE_WR(ctx, i/4, 0x3f800000);
+ for (i=0x07f38; i<=0x0a128; i+=24)
+ INSTANCE_WR(ctx, i/4, 0x00000001);
+ for (i=0x0a138; i<=0x0a528; i+=16)
+ INSTANCE_WR(ctx, i/4, 0x3f800000);
+ for (i=0x0c8b8; i<=0x0eaa8; i+=24)
+ INSTANCE_WR(ctx, i/4, 0x00000001);
+ for (i=0x0eab8; i<=0x0eea8; i+=16)
+ INSTANCE_WR(ctx, i/4, 0x3f800000);
+}
+
static void nv4a_graph_context_init(drm_device_t *dev, struct mem_block *ctx)
{
drm_nouveau_private_t *dev_priv = dev->dev_private;
@@ -622,6 +773,10 @@ nv40_graph_context_create(drm_device_t *dev, int channel)
ctx_size = NV43_GRCTX_SIZE;
ctx_init = nv43_graph_context_init;
break;
+ case 0x46:
+ ctx_size = NV46_GRCTX_SIZE;
+ ctx_init = nv46_graph_context_init;
+ break;
case 0x4a:
ctx_size = NV4A_GRCTX_SIZE;
ctx_init = nv4a_graph_context_init;
@@ -821,6 +976,37 @@ static uint32_t nv43_ctx_voodoo[] = {
~0
};
+static uint32_t nv46_ctx_voodoo[] = {
+ 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001,
+ 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00408f65, 0x00409306,
+ 0x0040a068, 0x0040198f, 0x00200001, 0x0060000a, 0x00700080, 0x00104042,
+ 0x00200001, 0x0060000a, 0x00700000, 0x001040c5, 0x00401826, 0x00401968,
+ 0x0060000d, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080,
+ 0x004020e6, 0x007000a0, 0x00500060, 0x00200008, 0x0060000a, 0x0011814d,
+ 0x00110158, 0x00105401, 0x0020003a, 0x00100051, 0x001040c5, 0x0010c1c4,
+ 0x001041c9, 0x0010c1dc, 0x00150210, 0x0012c225, 0x00108238, 0x0010823e,
+ 0x001242c0, 0x00200040, 0x00100280, 0x00128100, 0x00128120, 0x00128143,
+ 0x0011415f, 0x0010815c, 0x0010c140, 0x00104029, 0x00110400, 0x00104d10,
+ 0x00500060, 0x00403f87, 0x0060000d, 0x004079e6, 0x002000f7, 0x0060000a,
+ 0x00200045, 0x00100620, 0x00104668, 0x0017466d, 0x0011068b, 0x00168691,
+ 0x001046ae, 0x001046b0, 0x001206b4, 0x001046c4, 0x001146c6, 0x00200022,
+ 0x001006cc, 0x001246f0, 0x002000c0, 0x00100700, 0x0010c3d7, 0x001043e1,
+ 0x00500060, 0x0020027f, 0x0060000a, 0x00104800, 0x00108901, 0x00104910,
+ 0x00124920, 0x0020001f, 0x00100940, 0x00140965, 0x00148a00, 0x00108a14,
+ 0x00160b00, 0x00134b2c, 0x0010cd00, 0x0010cd04, 0x0010cd08, 0x00104d80,
+ 0x00104e00, 0x0012d600, 0x00105c00, 0x00104f06, 0x00105406, 0x00105709,
+ 0x00200316, 0x0060000a, 0x00300000, 0x00200080, 0x00407200, 0x00200084,
+ 0x00800001, 0x0020055e, 0x0060000a, 0x002037e0, 0x0040788a, 0x00201320,
+ 0x00800029, 0x00408900, 0x00600006, 0x004085e6, 0x00700080, 0x00200081,
+ 0x0060000a, 0x00104280, 0x00200316, 0x0060000a, 0x00200004, 0x00800001,
+ 0x00700000, 0x00200000, 0x0060000a, 0x00106002, 0x0040a068, 0x00700000,
+ 0x00200000, 0x0060000a, 0x00106002, 0x00700080, 0x00400a68, 0x00500060,
+ 0x00600007, 0x00409388, 0x0060000f, 0x00500060, 0x00200000, 0x0060000a,
+ 0x00700000, 0x00106001, 0x00910880, 0x00901ffe, 0x01940000, 0x00200020,
+ 0x0060000b, 0x00500069, 0x0060000c, 0x00402168, 0x0040a206, 0x0040a305,
+ 0x00600009, 0x00700005, 0x00700006, 0x0060000e, ~0
+};
+
static uint32_t nv4a_ctx_voodoo[] = {
0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001,
0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409965, 0x00409e06,
@@ -891,7 +1077,7 @@ static uint32_t nv4e_ctx_voodoo[] = {
* G70 0x47
* G71 0x49
* NV45 0x48
- * G72 0x46
+ * G72[M] 0x46
* G73 0x4b
* C51_G7X 0x4c
* C51 0x4e
@@ -913,6 +1099,7 @@ nv40_graph_init(drm_device_t *dev)
switch (dev_priv->chipset) {
case 0x40: ctx_voodoo = nv40_ctx_voodoo; break;
case 0x43: ctx_voodoo = nv43_ctx_voodoo; break;
+ case 0x46: ctx_voodoo = nv46_ctx_voodoo; break;
case 0x4a: ctx_voodoo = nv4a_ctx_voodoo; break;
case 0x4e: ctx_voodoo = nv4e_ctx_voodoo; break;
default:
@@ -947,7 +1134,7 @@ nv40_graph_init(drm_device_t *dev)
NV_WRITE(NV10_PGRAPH_DEBUG_4, 0x00008000);
NV_WRITE(NV04_PGRAPH_LIMIT_VIOL_PIX, 0x00be3c5f);
- NV_WRITE(NV04_PGRAPH_CTX_CONTROL, 0x10010100);
+ NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10010100);
NV_WRITE(NV10_PGRAPH_STATE , 0xFFFFFFFF);
NV_WRITE(NV04_PGRAPH_FIFO , 0x00000001);