summaryrefslogtreecommitdiff
path: root/shared-core/nouveau_reg.h
diff options
context:
space:
mode:
Diffstat (limited to 'shared-core/nouveau_reg.h')
-rw-r--r--shared-core/nouveau_reg.h10
1 files changed, 8 insertions, 2 deletions
diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h
index 966600cf..e7ab3804 100644
--- a/shared-core/nouveau_reg.h
+++ b/shared-core/nouveau_reg.h
@@ -32,12 +32,20 @@
# define NV40_RAMHT_CONTEXT_ENGINE_SHIFT 20
# define NV40_RAMHT_CONTEXT_INSTANCE_SHIFT 0
+/* DMA object defines */
#define NV_DMA_ACCESS_RW 0
#define NV_DMA_ACCESS_RO 1
#define NV_DMA_ACCESS_WO 2
#define NV_DMA_TARGET_VIDMEM 0
+#define NV_DMA_TARGET_PCI 2
#define NV_DMA_TARGET_AGP 3
+/* Some object classes we care about in the drm */
+#define NV_CLASS_DMA_FROM_MEMORY 0x00000002
+#define NV_CLASS_DMA_TO_MEMORY 0x00000003
+#define NV_CLASS_NULL 0x00000030
+#define NV_CLASS_DMA_IN_MEMORY 0x0000003D
+
#define NV03_FIFO_SIZE 0x8000UL
#define NV_MAX_FIFO_NUMBER 32
#define NV03_FIFO_REGS_SIZE 0x10000
@@ -88,8 +96,6 @@
#define NV10_PGRAPH_CTX_CACHE4 0x004001C0
#define NV04_PGRAPH_CTX_CACHE4 0x004001E0
#define NV10_PGRAPH_CTX_CACHE5 0x004001E0
-#define NV40_PGRAPH_UNK220 0x00400220
-# define NV40_PGRAPH_UNK220_FB_INSTANCE 0xFFFFFFFF
#define NV03_PGRAPH_ABS_X_RAM 0x00400400
#define NV03_PGRAPH_ABS_Y_RAM 0x00400480
#define NV03_PGRAPH_X_MISC 0x00400500