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-rw-r--r--bsd/Makefile2
-rw-r--r--bsd/Makefile.bsd2
-rw-r--r--bsd/drm/auth.c4
-rw-r--r--bsd/drm/lists.c20
-rw-r--r--bsd/drm/lock.c9
-rw-r--r--bsd/drm/memory.c4
-rw-r--r--bsd/gamma/Makefile2
-rw-r--r--bsd/mga/mga_context.c6
-rw-r--r--bsd/mga/mga_dma.c95
-rw-r--r--bsd/mga/mga_drv.c4
-rw-r--r--bsd/mga/mga_drv.h82
-rw-r--r--bsd/mga/mga_state.c183
-rw-r--r--bsd/tdfx/Makefile2
-rw-r--r--bsd/tdfx/tdfx_drv.c5
14 files changed, 266 insertions, 154 deletions
diff --git a/bsd/Makefile b/bsd/Makefile
index ff26c762..61cba175 100644
--- a/bsd/Makefile
+++ b/bsd/Makefile
@@ -1,5 +1,5 @@
# $FreeBSD$
-SUBDIR = drm tdfx gamma
+SUBDIR = drm tdfx mga gamma
.include <bsd.subdir.mk>
diff --git a/bsd/Makefile.bsd b/bsd/Makefile.bsd
index ff26c762..61cba175 100644
--- a/bsd/Makefile.bsd
+++ b/bsd/Makefile.bsd
@@ -1,5 +1,5 @@
# $FreeBSD$
-SUBDIR = drm tdfx gamma
+SUBDIR = drm tdfx mga gamma
.include <bsd.subdir.mk>
diff --git a/bsd/drm/auth.c b/bsd/drm/auth.c
index a2699011..37d17be5 100644
--- a/bsd/drm/auth.c
+++ b/bsd/drm/auth.c
@@ -135,12 +135,12 @@ int drm_getmagic(dev_t kdev, u_long cmd, caddr_t data,
if (priv->magic) {
auth.magic = priv->magic;
} else {
- simple_lock(&lock);
do {
+ simple_lock(&lock);
if (!sequence) ++sequence; /* reserve 0 */
auth.magic = sequence++;
- } while (drm_find_file(dev, auth.magic));
simple_unlock(&lock);
+ } while (drm_find_file(dev, auth.magic));
priv->magic = auth.magic;
drm_add_magic(dev, priv, auth.magic);
}
diff --git a/bsd/drm/lists.c b/bsd/drm/lists.c
index 61becaa1..b9722973 100644
--- a/bsd/drm/lists.c
+++ b/bsd/drm/lists.c
@@ -121,6 +121,7 @@ int drm_freelist_create(drm_freelist_t *bl, int count)
bl->low_mark = 0;
bl->high_mark = 0;
atomic_set(&bl->wfh, 0);
+/* bl->lock = SPIN_LOCK_UNLOCKED; */
++bl->initialized;
return 0;
}
@@ -159,6 +160,7 @@ int drm_freelist_put(drm_device_t *dev, drm_freelist_t *bl, drm_buf_t *buf)
drm_histogram_compute(dev, buf);
#endif
buf->list = DRM_LIST_FREE;
+/*
do {
old = (unsigned long)bl->next;
buf->next = (void *)old;
@@ -169,6 +171,13 @@ int drm_freelist_put(drm_device_t *dev, drm_freelist_t *bl, drm_buf_t *buf)
return 1;
}
} while (failed);
+*/
+
+ simple_lock(&bl->lock);
+ buf->next = bl->next;
+ bl->next = buf;
+ simple_unlock(&bl->lock);
+
atomic_inc(&bl->count);
if (atomic_read(&bl->count) > dma->buf_count) {
DRM_ERROR("%d of %d buffers free after addition of %d\n",
@@ -195,6 +204,7 @@ static drm_buf_t *drm_freelist_try(drm_freelist_t *bl)
if (!bl) return NULL;
/* Get buffer */
+/*
do {
old = (unsigned int)bl->next;
if (!old) {
@@ -210,6 +220,16 @@ static drm_buf_t *drm_freelist_try(drm_freelist_t *bl)
atomic_dec(&bl->count);
buf = (drm_buf_t *)old;
+*/
+ simple_lock(&bl->lock);
+ if(!bl->next){
+ simple_unlock(&bl->lock);
+ return NULL;
+ }
+ buf = bl->next;
+ bl->next = bl->next->next;
+ simple_unlock(&bl->lock);
+ atomic_dec(&bl->count);
buf->next = NULL;
buf->list = DRM_LIST_NONE;
DRM_DEBUG("%d, count = %d, wfh = %d, w%d, p%d\n",
diff --git a/bsd/drm/lock.c b/bsd/drm/lock.c
index 1affcd1d..ec295b2b 100644
--- a/bsd/drm/lock.c
+++ b/bsd/drm/lock.c
@@ -135,9 +135,12 @@ static int drm_flush_queue(drm_device_t *dev, int context)
if (atomic_read(&q->use_count) > 1) {
atomic_inc(&q->block_write);
atomic_inc(&q->block_count);
- error = tsleep(&q->flush_queue, PCATCH|PZERO, "drmfq", 0);
- if (error)
- return error;
+ for (;;) {
+ if (!DRM_BUFCOUNT(&q->waitlist)) break;
+ error = tsleep(&q->flush_queue, PCATCH|PZERO, "drmfq", 0);
+ if (error)
+ return error;
+ }
atomic_dec(&q->block_count);
}
atomic_dec(&q->use_count);
diff --git a/bsd/drm/memory.c b/bsd/drm/memory.c
index 81c1b1a0..f60e2128 100644
--- a/bsd/drm/memory.c
+++ b/bsd/drm/memory.c
@@ -95,7 +95,7 @@ void drm_mem_init(void)
/* drm_mem_info is called whenever a process reads /dev/drm/mem. */
-static int _drm_mem_info SYSCTL_HANDLER_ARGS
+static int _drm_mem_info DRM_SYSCTL_HANDLER_ARGS
{
drm_mem_stats_t *pt;
char buf[128];
@@ -127,7 +127,7 @@ static int _drm_mem_info SYSCTL_HANDLER_ARGS
return 0;
}
-int drm_mem_info SYSCTL_HANDLER_ARGS
+int drm_mem_info DRM_SYSCTL_HANDLER_ARGS
{
int ret;
diff --git a/bsd/gamma/Makefile b/bsd/gamma/Makefile
index f5635910..37f3f5e7 100644
--- a/bsd/gamma/Makefile
+++ b/bsd/gamma/Makefile
@@ -3,7 +3,7 @@
KMOD = gamma
SRCS = gamma_drv.c gamma_dma.c
SRCS += device_if.h bus_if.h pci_if.h
-CFLAGS += ${DEBUG_FLAGS} -I..
+CFLAGS += ${DEBUG_FLAGS} -I. -I..
KMODDEPS = drm
@:
diff --git a/bsd/mga/mga_context.c b/bsd/mga/mga_context.c
index 63f1b42b..63515bab 100644
--- a/bsd/mga/mga_context.c
+++ b/bsd/mga/mga_context.c
@@ -188,7 +188,11 @@ int mga_rmctx(dev_t kdev, u_long cmd, caddr_t data, int flags, struct proc *p)
ctx = *(drm_ctx_t *) data;
DRM_DEBUG("%d\n", ctx.handle);
- if(ctx.handle != DRM_KERNEL_CONTEXT) {
+/*
+ if(ctx.handle == DRM_KERNEL_CONTEXT+1)
+ priv->remove_auth_on_close = 1;
+*/
+ if(ctx.handle != DRM_KERNEL_CONTEXT ) {
drm_ctxbitmap_free(dev, ctx.handle);
}
diff --git a/bsd/mga/mga_dma.c b/bsd/mga/mga_dma.c
index 7055d28d..85c29df7 100644
--- a/bsd/mga/mga_dma.c
+++ b/bsd/mga/mga_dma.c
@@ -130,7 +130,6 @@ static int mga_freelist_init(drm_device_t *dev)
item->buf = buf;
buf_priv->my_freelist = item;
buf_priv->discard = 0;
- buf_priv->dispatched = 0;
dev_priv->head->next = item;
}
@@ -176,7 +175,7 @@ static __inline void mga_dma_quiescent(drm_device_t *dev)
atomic_read(&dev->total_irq),
atomic_read(&dma->total_lost));
DRM_ERROR("lockup\n");
- goto out_nolock;
+ return;
}
for (i = 0 ; i < 2000 ; i++) mga_delay();
}
@@ -188,15 +187,15 @@ static __inline void mga_dma_quiescent(drm_device_t *dev)
atomic_read(&dev->total_irq),
atomic_read(&dma->total_lost));
DRM_ERROR("lockup\n");
- goto out_status;
+ clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
+ return;
}
for (i = 0 ; i < 2000 ; i++) mga_delay();
}
sarea_priv->dirty |= MGA_DMA_FLUSH;
-out_status:
clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
-out_nolock:
+ DRM_DEBUG("exit, dispatch_status = 0x%02x\n",dev_priv->dispatch_status);
}
static void mga_reset_freelist(drm_device_t *dev)
@@ -236,20 +235,22 @@ drm_buf_t *mga_freelist_get(drm_device_t *dev)
set_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status);
for (;;) {
mga_dma_schedule(dev, 0);
- if(!test_bit(MGA_IN_GETBUF,
- &dev_priv->dispatch_status))
+/* if(!test_bit(MGA_IN_GETBUF,
+ &dev_priv->dispatch_status)) */
+ if(dev_priv->tail->age < dev_priv->last_prim_age)
break;
atomic_inc(&dev->total_sleeps);
ret = tsleep(&dev_priv->buf_queue, PZERO|PCATCH,
"mgafg", 0);
- if (ret) {
+ if (ret == EINTR) {
clear_bit(MGA_IN_GETBUF,
&dev_priv->dispatch_status);
- splx(s);
- goto failed_getbuf;
+ break;
}
}
splx(s);
+ clear_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status);
+ if (ret) return NULL;
}
if(dev_priv->tail->age < dev_priv->last_prim_age) {
@@ -263,7 +264,6 @@ drm_buf_t *mga_freelist_get(drm_device_t *dev)
return next->buf;
}
-failed_getbuf:
failed++;
return NULL;
}
@@ -520,61 +520,55 @@ int mga_advance_primary(drm_device_t *dev)
static __inline int mga_decide_to_fire(drm_device_t *dev)
{
drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
- drm_device_dma_t *dma = dev->dma;
DRM_DEBUG("%s\n", __FUNCTION__);
if(test_bit(MGA_BUF_FORCE_FIRE, &dev_priv->next_prim->buffer_status)) {
- atomic_inc(&dma->total_prio);
return 1;
}
if (test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status) &&
dev_priv->next_prim->num_dwords) {
- atomic_inc(&dma->total_prio);
return 1;
}
if (test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) &&
dev_priv->next_prim->num_dwords) {
- atomic_inc(&dma->total_prio);
return 1;
}
if(atomic_read(&dev_priv->pending_bufs) <= MGA_NUM_PRIM_BUFS - 1) {
if(test_bit(MGA_BUF_SWAP_PENDING,
&dev_priv->next_prim->buffer_status)) {
- atomic_inc(&dma->total_dmas);
return 1;
}
}
if(atomic_read(&dev_priv->pending_bufs) <= MGA_NUM_PRIM_BUFS / 2) {
if(dev_priv->next_prim->sec_used >= MGA_DMA_BUF_NR / 8) {
- atomic_inc(&dma->total_hit);
return 1;
}
}
if(atomic_read(&dev_priv->pending_bufs) >= MGA_NUM_PRIM_BUFS / 2) {
if(dev_priv->next_prim->sec_used >= MGA_DMA_BUF_NR / 4) {
- atomic_inc(&dma->total_missed_free);
return 1;
}
}
- atomic_inc(&dma->total_tried);
return 0;
}
int mga_dma_schedule(drm_device_t *dev, int locked)
{
drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
- drm_device_dma_t *dma = dev->dma;
+ int retval =0 ;
+
+ if (!dev_priv) return EBUSY;
if (test_and_set_bit(0, &dev->dma_flag)) {
- atomic_inc(&dma->total_missed_dma);
- return EBUSY;
+ retval = EBUSY;
+ goto sch_out_wakeup;
}
DRM_DEBUG("%s\n", __FUNCTION__);
@@ -591,17 +585,15 @@ int mga_dma_schedule(drm_device_t *dev, int locked)
if (!locked &&
!drm_lock_take(&dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT)) {
- atomic_inc(&dma->total_missed_lock);
clear_bit(0, &dev->dma_flag);
DRM_DEBUG("Not locked\n");
- return EBUSY;
+ retval = EBUSY;
+ goto sch_out_wakeup;
}
- DRM_DEBUG("I'm locked\n");
if(!test_and_set_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status)) {
/* Fire dma buffer */
if(mga_decide_to_fire(dev)) {
- DRM_DEBUG("idx :%d\n", dev_priv->next_prim->idx);
clear_bit(MGA_BUF_FORCE_FIRE,
&dev_priv->next_prim->buffer_status);
if(dev_priv->current_prim == dev_priv->next_prim) {
@@ -613,8 +605,6 @@ int mga_dma_schedule(drm_device_t *dev, int locked)
} else {
clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
}
- } else {
- DRM_DEBUG("I can't get the dispatch lock\n");
}
if (!locked) {
@@ -623,9 +613,9 @@ int mga_dma_schedule(drm_device_t *dev, int locked)
DRM_ERROR("\n");
}
}
-
+ clear_bit(0, &dev->dma_flag);
+sch_out_wakeup:
if(test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) &&
- dev_priv->next_prim->num_dwords == 0 &&
atomic_read(&dev_priv->pending_bufs) == 0) {
/* Everything has been processed by the hardware */
clear_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status);
@@ -633,18 +623,10 @@ int mga_dma_schedule(drm_device_t *dev, int locked)
}
if(test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status) &&
- dev_priv->tail->age < dev_priv->last_prim_age) {
- clear_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status);
- DRM_DEBUG("Waking up buf queue\n");
+ dev_priv->tail->age < dev_priv->last_prim_age)
wakeup(&dev_priv->buf_queue);
- } else if (test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status)) {
- DRM_DEBUG("Not waking buf_queue on %d %d\n",
- atomic_read(&dev->total_irq),
- dev_priv->last_prim_age);
- }
- clear_bit(0, &dev->dma_flag);
- return 0;
+ return retval;
}
static void mga_dma_service(void *arg)
@@ -653,7 +635,6 @@ static void mga_dma_service(void *arg)
drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
drm_mga_prim_buf_t *last_prim_buffer;
- DRM_DEBUG("%s\n", __FUNCTION__);
atomic_inc(&dev->total_irq);
if((MGA_READ(MGAREG_STATUS) & 0x00000001) != 0x00000001) return;
MGA_WRITE(MGAREG_ICLEAR, 0x00000001);
@@ -663,11 +644,11 @@ static void mga_dma_service(void *arg)
dev_priv->sarea_priv->last_dispatch =
dev_priv->last_prim_age = last_prim_buffer->prim_age;
clear_bit(MGA_BUF_IN_USE, &last_prim_buffer->buffer_status);
- wakeup(&dev_priv->wait_queue);
clear_bit(MGA_BUF_SWAP_PENDING, &last_prim_buffer->buffer_status);
clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
atomic_dec(&dev_priv->pending_bufs);
taskqueue_enqueue(taskqueue_swi, &dev->task);
+ wakeup(&dev_priv->wait_queue);
}
static void mga_dma_task_queue(void *device, int pending)
@@ -684,6 +665,8 @@ int mga_dma_cleanup(drm_device_t *dev)
drm_mga_private_t *dev_priv =
(drm_mga_private_t *) dev->dev_private;
+ if (dev->irq) mga_flush_queue(dev);
+ mga_dma_quiescent(dev);
if(dev_priv->ioremap) {
int temp = (dev_priv->warp_ucode_size +
dev_priv->primary_size +
@@ -723,9 +706,6 @@ int mga_dma_cleanup(drm_device_t *dev)
static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
drm_mga_private_t *dev_priv;
drm_map_t *sarea_map = NULL;
- int i;
-
- DRM_DEBUG("%s\n", __FUNCTION__);
dev_priv = drm_alloc(sizeof(drm_mga_private_t), DRM_MEM_DRIVER);
if(dev_priv == NULL) return ENOMEM;
@@ -760,8 +740,8 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
dev_priv->mAccess = init->mAccess;
dev_priv->flush_queue = 0;
- dev_priv->buf_queue = 0;
- dev_priv->WarpPipe = -1;
+ dev_priv->WarpPipe = 0xff000000;
+ dev_priv->vertexsize = 0;
DRM_DEBUG("chipset: %d ucode_size: %d backOffset: %x depthOffset: %x\n",
dev_priv->chipset, dev_priv->warp_ucode_size,
@@ -773,13 +753,6 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
memcpy(&dev_priv->WarpIndex, &init->WarpIndex,
sizeof(drm_mga_warp_index_t) * MGA_MAX_WARP_PIPES);
- for (i = 0 ; i < MGA_MAX_WARP_PIPES ; i++)
- DRM_DEBUG("warp pipe %d: installed: %d phys: %lx size: %x\n",
- i,
- dev_priv->WarpIndex[i].installed,
- dev_priv->WarpIndex[i].phys_addr,
- dev_priv->WarpIndex[i].size);
-
if(mga_init_primary_bufs(dev, init) != 0) {
DRM_ERROR("Can not initialize primary buffers\n");
mga_dma_cleanup(dev);
@@ -951,9 +924,7 @@ static int mga_flush_queue(drm_device_t *dev)
DRM_DEBUG("%s\n", __FUNCTION__);
- if(dev_priv == NULL) {
- return 0;
- }
+ if(!dev_priv) return 0;
if(dev_priv->next_prim->num_dwords != 0) {
s = splsofttq();
@@ -1065,7 +1036,7 @@ int mga_lock(dev_t kdev, u_long cmd, caddr_t data,
}
}
- DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
+ if (ret) DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
return ret;
}
@@ -1086,16 +1057,16 @@ int mga_flush_ioctl(dev_t kdev, u_long cmd, caddr_t data,
}
if(lock.flags & _DRM_LOCK_FLUSH || lock.flags & _DRM_LOCK_FLUSH_ALL) {
- drm_mga_prim_buf_t *temp_buf =
- dev_priv->prim_bufs[dev_priv->current_prim_idx];
+ drm_mga_prim_buf_t *temp_buf;
+ temp_buf = dev_priv->current_prim;
- if(temp_buf && temp_buf->num_dwords) {
s = splsofttq();
+ if(temp_buf && temp_buf->num_dwords) {
set_bit(MGA_BUF_FORCE_FIRE, &temp_buf->buffer_status);
mga_advance_primary(dev);
+ }
mga_dma_schedule(dev, 1);
splx(s);
- }
}
if(lock.flags & _DRM_LOCK_QUIESCENT) {
mga_flush_queue(dev);
diff --git a/bsd/mga/mga_drv.c b/bsd/mga/mga_drv.c
index 09937201..77d7c440 100644
--- a/bsd/mga/mga_drv.c
+++ b/bsd/mga/mga_drv.c
@@ -40,8 +40,8 @@ MODULE_DEPEND(mga, agp, 1, 1, 1);
#define MGA_NAME "mga"
#define MGA_DESC "Matrox g200/g400"
-#define MGA_DATE "19991213"
-#define MGA_MAJOR 1
+#define MGA_DATE "20000928"
+#define MGA_MAJOR 2
#define MGA_MINOR 0
#define MGA_PATCHLEVEL 0
diff --git a/bsd/mga/mga_drv.h b/bsd/mga/mga_drv.h
index 05c4d9d2..9e51a20d 100644
--- a/bsd/mga/mga_drv.h
+++ b/bsd/mga/mga_drv.h
@@ -39,8 +39,8 @@
typedef struct {
u_int32_t buffer_status;
- unsigned int num_dwords;
- unsigned int max_dwords;
+ int num_dwords;
+ int max_dwords;
u_int32_t *current_dma_ptr;
u_int32_t *head;
u_int32_t phys_head;
@@ -50,7 +50,7 @@ typedef struct {
} drm_mga_prim_buf_t;
typedef struct _drm_mga_freelist {
- unsigned int age;
+ __volatile__ unsigned int age;
drm_buf_t *buf;
struct _drm_mga_freelist *next;
struct _drm_mga_freelist *prev;
@@ -82,6 +82,7 @@ typedef struct _drm_mga_private {
int use_agp;
drm_mga_warp_index_t WarpIndex[MGA_MAX_G400_PIPES];
unsigned int WarpPipe;
+ unsigned int vertexsize;
atomic_t pending_bufs;
void *status_page;
unsigned long real_status_page;
@@ -191,12 +192,20 @@ typedef struct {
&tmp_buf->buffer_status)) { \
mga_advance_primary(dev); \
mga_dma_schedule(dev, 1); \
+ tmp_buf = dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
} else if( tmp_buf->max_dwords - tmp_buf->num_dwords < length ||\
tmp_buf->sec_used > MGA_DMA_BUF_NR/2) { \
set_bit(MGA_BUF_FORCE_FIRE, &tmp_buf->buffer_status); \
mga_advance_primary(dev); \
mga_dma_schedule(dev, 1); \
+ tmp_buf = dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
} \
+ if(MGA_VERBOSE) \
+ DRM_DEBUG("PRIMGETPTR in %s\n", __FUNCTION__); \
+ dma_ptr = tmp_buf->current_dma_ptr; \
+ num_dwords = tmp_buf->num_dwords; \
+ phys_head = tmp_buf->phys_head; \
+ outcount = 0; \
} while(0)
#define PRIMGETPTR(dev_priv) do { \
@@ -344,6 +353,73 @@ drm_mga_prim_buf_t *tmp_buf = \
#define MGAREG_YTOP 0x1c98
#define MGAREG_ZORG 0x1c0c
+/* Warp registers */
+#define MGAREG_WR0 0x2d00
+#define MGAREG_WR1 0x2d04
+#define MGAREG_WR2 0x2d08
+#define MGAREG_WR3 0x2d0c
+#define MGAREG_WR4 0x2d10
+#define MGAREG_WR5 0x2d14
+#define MGAREG_WR6 0x2d18
+#define MGAREG_WR7 0x2d1c
+#define MGAREG_WR8 0x2d20
+#define MGAREG_WR9 0x2d24
+#define MGAREG_WR10 0x2d28
+#define MGAREG_WR11 0x2d2c
+#define MGAREG_WR12 0x2d30
+#define MGAREG_WR13 0x2d34
+#define MGAREG_WR14 0x2d38
+#define MGAREG_WR15 0x2d3c
+#define MGAREG_WR16 0x2d40
+#define MGAREG_WR17 0x2d44
+#define MGAREG_WR18 0x2d48
+#define MGAREG_WR19 0x2d4c
+#define MGAREG_WR20 0x2d50
+#define MGAREG_WR21 0x2d54
+#define MGAREG_WR22 0x2d58
+#define MGAREG_WR23 0x2d5c
+#define MGAREG_WR24 0x2d60
+#define MGAREG_WR25 0x2d64
+#define MGAREG_WR26 0x2d68
+#define MGAREG_WR27 0x2d6c
+#define MGAREG_WR28 0x2d70
+#define MGAREG_WR29 0x2d74
+#define MGAREG_WR30 0x2d78
+#define MGAREG_WR31 0x2d7c
+#define MGAREG_WR32 0x2d80
+#define MGAREG_WR33 0x2d84
+#define MGAREG_WR34 0x2d88
+#define MGAREG_WR35 0x2d8c
+#define MGAREG_WR36 0x2d90
+#define MGAREG_WR37 0x2d94
+#define MGAREG_WR38 0x2d98
+#define MGAREG_WR39 0x2d9c
+#define MGAREG_WR40 0x2da0
+#define MGAREG_WR41 0x2da4
+#define MGAREG_WR42 0x2da8
+#define MGAREG_WR43 0x2dac
+#define MGAREG_WR44 0x2db0
+#define MGAREG_WR45 0x2db4
+#define MGAREG_WR46 0x2db8
+#define MGAREG_WR47 0x2dbc
+#define MGAREG_WR48 0x2dc0
+#define MGAREG_WR49 0x2dc4
+#define MGAREG_WR50 0x2dc8
+#define MGAREG_WR51 0x2dcc
+#define MGAREG_WR52 0x2dd0
+#define MGAREG_WR53 0x2dd4
+#define MGAREG_WR54 0x2dd8
+#define MGAREG_WR55 0x2ddc
+#define MGAREG_WR56 0x2de0
+#define MGAREG_WR57 0x2de4
+#define MGAREG_WR58 0x2de8
+#define MGAREG_WR59 0x2dec
+#define MGAREG_WR60 0x2df0
+#define MGAREG_WR61 0x2df4
+#define MGAREG_WR62 0x2df8
+#define MGAREG_WR63 0x2dfc
+
+
#define PDEA_pagpxfer_enable 0x2
#define WIA_wmode_suspend 0x0
diff --git a/bsd/mga/mga_state.c b/bsd/mga/mga_state.c
index 73029bbe..fb365631 100644
--- a/bsd/mga/mga_state.c
+++ b/bsd/mga/mga_state.c
@@ -37,6 +37,20 @@
typedef u_int16_t u16;
typedef u_int32_t u32;
+#define MGAEMITCLIP_SIZE 10
+#define MGAEMITCTX_SIZE 20
+#define MGAG200EMITTEX_SIZE 20
+#define MGAG400EMITTEX0_SIZE 30
+#define MGAG400EMITTEX1_SIZE 25
+#define MGAG400EMITPIPE_SIZE 50
+#define MGAG200EMITPIPE_SIZE 15
+
+#define MAX_STATE_SIZE ((MGAEMITCLIP_SIZE * MGA_NR_SAREA_CLIPRECTS) + \
+ MGAEMITCTX_SIZE + MGAG400EMITTEX0_SIZE + \
+ MGAG400EMITTEX1_SIZE + MGAG400EMITPIPE_SIZE)
+
+
+
static void mgaEmitClipRect(drm_mga_private_t * dev_priv,
drm_clip_rect_t * box)
{
@@ -49,6 +63,7 @@ static void mgaEmitClipRect(drm_mga_private_t * dev_priv,
PRIMGETPTR(dev_priv);
/* Force reset of dwgctl (eliminates clip disable) */
+ if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
#if 0
PRIMOUTREG(MGAREG_DMAPAD, 0);
PRIMOUTREG(MGAREG_DWGSYNC, 0);
@@ -60,11 +75,11 @@ static void mgaEmitClipRect(drm_mga_private_t * dev_priv,
PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0x80000000);
#endif
-
+ }
PRIMOUTREG(MGAREG_DMAPAD, 0);
PRIMOUTREG(MGAREG_CXBNDRY, ((box->x2) << 16) | (box->x1));
- PRIMOUTREG(MGAREG_YTOP, box->y1 * dev_priv->stride / 2);
- PRIMOUTREG(MGAREG_YBOT, box->y2 * dev_priv->stride / 2);
+ PRIMOUTREG(MGAREG_YTOP, box->y1 * dev_priv->stride / dev_priv->cpp);
+ PRIMOUTREG(MGAREG_YBOT, box->y2 * dev_priv->stride / dev_priv->cpp);
PRIMADVANCE(dev_priv);
}
@@ -76,7 +91,7 @@ static void mgaEmitContext(drm_mga_private_t * dev_priv)
PRIMLOCALS;
DRM_DEBUG("%s\n", __FUNCTION__);
- /* This takes a max of 15 dwords */
+ /* This takes a max of 20 dwords */
PRIMGETPTR(dev_priv);
PRIMOUTREG(MGAREG_DSTORG, regs[MGA_CTXREG_DSTORG]);
@@ -94,6 +109,12 @@ static void mgaEmitContext(drm_mga_private_t * dev_priv)
PRIMOUTREG(MGAREG_TDUALSTAGE0, regs[MGA_CTXREG_TDUAL0]);
PRIMOUTREG(MGAREG_TDUALSTAGE1, regs[MGA_CTXREG_TDUAL1]);
PRIMOUTREG(MGAREG_FCOL, regs[MGA_CTXREG_FCOL]);
+
+ PRIMOUTREG(MGAREG_STENCIL, regs[MGA_CTXREG_STENCIL]);
+ PRIMOUTREG(MGAREG_STENCILCTL, regs[MGA_CTXREG_STENCILCTL]);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+
} else {
PRIMOUTREG(MGAREG_FCOL, regs[MGA_CTXREG_FCOL]);
PRIMOUTREG(MGAREG_DMAPAD, 0);
@@ -128,9 +149,9 @@ static void mgaG200EmitTex(drm_mga_private_t * dev_priv)
PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4]);
PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH]);
PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT]);
- PRIMOUTREG(0x2d00 + 24 * 4, regs[MGA_TEXREG_WIDTH]);
+ PRIMOUTREG(MGAREG_WR24, regs[MGA_TEXREG_WIDTH]);
- PRIMOUTREG(0x2d00 + 34 * 4, regs[MGA_TEXREG_HEIGHT]);
+ PRIMOUTREG(MGAREG_WR34, regs[MGA_TEXREG_HEIGHT]);
PRIMOUTREG(MGAREG_TEXTRANS, 0xffff);
PRIMOUTREG(MGAREG_TEXTRANSHIGH, 0xffff);
PRIMOUTREG(MGAREG_DMAPAD, 0);
@@ -138,11 +159,12 @@ static void mgaG200EmitTex(drm_mga_private_t * dev_priv)
PRIMADVANCE(dev_priv);
}
+#define TMC_dualtex_enable 0x80
+
static void mgaG400EmitTex0(drm_mga_private_t * dev_priv)
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
unsigned int *regs = sarea_priv->TexState[0];
- int multitex = sarea_priv->WarpPipe & MGA_T2;
PRIMLOCALS;
DRM_DEBUG("%s\n", __FUNCTION__);
@@ -163,22 +185,21 @@ static void mgaG400EmitTex0(drm_mga_private_t * dev_priv)
PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4]);
PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH]);
PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT]);
- PRIMOUTREG(0x2d00 + 49 * 4, 0);
+ PRIMOUTREG(MGAREG_WR49, 0);
+
+ PRIMOUTREG(MGAREG_WR57, 0);
+ PRIMOUTREG(MGAREG_WR53, 0);
+ PRIMOUTREG(MGAREG_WR61, 0);
+ PRIMOUTREG(MGAREG_WR52, 0x40);
- PRIMOUTREG(0x2d00 + 57 * 4, 0);
- PRIMOUTREG(0x2d00 + 53 * 4, 0);
- PRIMOUTREG(0x2d00 + 61 * 4, 0);
+ PRIMOUTREG(MGAREG_WR60, 0x40);
+ PRIMOUTREG(MGAREG_WR54, regs[MGA_TEXREG_WIDTH] | 0x40);
+ PRIMOUTREG(MGAREG_WR62, regs[MGA_TEXREG_HEIGHT] | 0x40);
PRIMOUTREG(MGAREG_DMAPAD, 0);
- if (!multitex) {
- PRIMOUTREG(0x2d00 + 52 * 4, 0x40);
- PRIMOUTREG(0x2d00 + 60 * 4, 0x40);
PRIMOUTREG(MGAREG_DMAPAD, 0);
PRIMOUTREG(MGAREG_DMAPAD, 0);
- }
- PRIMOUTREG(0x2d00 + 54 * 4, regs[MGA_TEXREG_WIDTH] | 0x40);
- PRIMOUTREG(0x2d00 + 62 * 4, regs[MGA_TEXREG_HEIGHT] | 0x40);
PRIMOUTREG(MGAREG_TEXTRANS, 0xffff);
PRIMOUTREG(MGAREG_TEXTRANSHIGH, 0xffff);
@@ -212,14 +233,15 @@ static void mgaG400EmitTex1(drm_mga_private_t * dev_priv)
PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4]);
PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH]);
PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT]);
- PRIMOUTREG(0x2d00 + 49 * 4, 0);
+ PRIMOUTREG(MGAREG_WR49, 0);
+
+ PRIMOUTREG(MGAREG_WR57, 0);
+ PRIMOUTREG(MGAREG_WR53, 0);
+ PRIMOUTREG(MGAREG_WR61, 0);
+ PRIMOUTREG(MGAREG_WR52, regs[MGA_TEXREG_WIDTH] | 0x40);
- PRIMOUTREG(0x2d00 + 57 * 4, 0);
- PRIMOUTREG(0x2d00 + 53 * 4, 0);
- PRIMOUTREG(0x2d00 + 61 * 4, 0);
- PRIMOUTREG(0x2d00 + 52 * 4, regs[MGA_TEXREG_WIDTH] | 0x40);
+ PRIMOUTREG(MGAREG_WR60, regs[MGA_TEXREG_HEIGHT] | 0x40);
- PRIMOUTREG(0x2d00 + 60 * 4, regs[MGA_TEXREG_HEIGHT] | 0x40);
PRIMOUTREG(MGAREG_TEXTRANS, 0xffff);
PRIMOUTREG(MGAREG_TEXTRANSHIGH, 0xffff);
PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] | 0x00008000);
@@ -227,12 +249,17 @@ static void mgaG400EmitTex1(drm_mga_private_t * dev_priv)
PRIMADVANCE(dev_priv);
}
+#define MAGIC_FPARAM_HEX_VALUE 0x46480000
+/* This is the hex value of 12800.0f which is a magic value we must
+ * set in wr56.
+ */
+
+
#define EMIT_PIPE 50
static void mgaG400EmitPipe(drm_mga_private_t * dev_priv)
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
unsigned int pipe = sarea_priv->WarpPipe;
- float fParam = 12800.0f;
PRIMLOCALS;
DRM_DEBUG("%s\n", __FUNCTION__);
@@ -266,14 +293,14 @@ static void mgaG400EmitPipe(drm_mga_private_t * dev_priv)
PRIMOUTREG(MGAREG_DWGCTL, MGA_FLUSH_CMD);
PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 1);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
-
- PRIMOUTREG(MGAREG_TEXCTL2, 0 | 0x00008000);
+ PRIMOUTREG(MGAREG_TEXCTL2, 0x00008000);
PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
+
PRIMOUTREG(MGAREG_TEXCTL2, 0x80 | 0x00008000);
PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
+ PRIMOUTREG(MGAREG_TEXCTL2, 0x00008000);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
}
PRIMOUTREG(MGAREG_WVRTXSZ, 0x00001807);
@@ -289,18 +316,20 @@ static void mgaG400EmitPipe(drm_mga_private_t * dev_priv)
PRIMOUTREG(MGAREG_WFLAG, 0);
PRIMOUTREG(MGAREG_WFLAG1, 0);
- PRIMOUTREG(0x2d00 + 56 * 4, *((u32 *) (&fParam)));
+ PRIMOUTREG(MGAREG_WR56, MAGIC_FPARAM_HEX_VALUE);
PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(0x2d00 + 49 * 4, 0); /* Tex stage 0 */
- PRIMOUTREG(0x2d00 + 57 * 4, 0); /* Tex stage 0 */
- PRIMOUTREG(0x2d00 + 53 * 4, 0); /* Tex stage 1 */
- PRIMOUTREG(0x2d00 + 61 * 4, 0); /* Tex stage 1 */
+ PRIMOUTREG(MGAREG_WR49, 0); /* Tex stage 0 */
+ PRIMOUTREG(MGAREG_WR57, 0); /* Tex stage 0 */
+ PRIMOUTREG(MGAREG_WR53, 0); /* Tex stage 1 */
+ PRIMOUTREG(MGAREG_WR61, 0); /* Tex stage 1 */
+
+
+ PRIMOUTREG(MGAREG_WR54, 0x40); /* Tex stage 0 : w */
+ PRIMOUTREG(MGAREG_WR62, 0x40); /* Tex stage 0 : h */
+ PRIMOUTREG(MGAREG_WR52, 0x40); /* Tex stage 1 : w */
+ PRIMOUTREG(MGAREG_WR60, 0x40); /* Tex stage 1 : h */
- PRIMOUTREG(0x2d00 + 54 * 4, 0x40); /* Tex stage 0 : w */
- PRIMOUTREG(0x2d00 + 62 * 4, 0x40); /* Tex stage 0 : h */
- PRIMOUTREG(0x2d00 + 52 * 4, 0x40); /* Tex stage 1 : w */
- PRIMOUTREG(0x2d00 + 60 * 4, 0x40); /* Tex stage 1 : h */
/* Dma pading required due to hw bug */
PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
@@ -326,12 +355,12 @@ static void mgaG200EmitPipe(drm_mga_private_t * dev_priv)
PRIMOUTREG(MGAREG_WIADDR, WIA_wmode_suspend);
PRIMOUTREG(MGAREG_WVRTXSZ, 7);
PRIMOUTREG(MGAREG_WFLAG, 0);
- PRIMOUTREG(0x2d00 + 24 * 4, 0); /* tex w/h */
+ PRIMOUTREG(MGAREG_WR24, 0); /* tex w/h */
- PRIMOUTREG(0x2d00 + 25 * 4, 0x100);
- PRIMOUTREG(0x2d00 + 34 * 4, 0); /* tex w/h */
- PRIMOUTREG(0x2d00 + 42 * 4, 0xFFFF);
- PRIMOUTREG(0x2d00 + 60 * 4, 0xFFFF);
+ PRIMOUTREG(MGAREG_WR25, 0x100);
+ PRIMOUTREG(MGAREG_WR34, 0); /* tex w/h */
+ PRIMOUTREG(MGAREG_WR42, 0xFFFF);
+ PRIMOUTREG(MGAREG_WR60, 0xFFFF);
/* Dma pading required due to hw bug */
PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
@@ -495,7 +524,6 @@ static void mga_dma_dispatch_tex_blit(drm_device_t * dev,
y2 = length / 64;
PRIM_OVERFLOW(dev, dev_priv, 30);
- PRIMGETPTR(dev_priv);
PRIMOUTREG(MGAREG_DSTORG, destOrg);
PRIMOUTREG(MGAREG_MACCESS, 0x00000000);
@@ -513,10 +541,11 @@ static void mga_dma_dispatch_tex_blit(drm_device_t * dev,
PRIMOUTREG(MGAREG_FXBNDRY, (63 << 16));
PRIMOUTREG(MGAREG_YDSTLEN + MGAREG_MGA_EXEC, y2);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
PRIMOUTREG(MGAREG_SRCORG, 0);
PRIMOUTREG(MGAREG_PITCH, dev_priv->stride / dev_priv->cpp);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
+
PRIMADVANCE(dev_priv);
}
@@ -529,7 +558,6 @@ static void mga_dma_dispatch_vertex(drm_device_t * dev, drm_buf_t * buf)
int length = buf->used;
int use_agp = PDEA_pagpxfer_enable;
int i = 0;
- int primary_needed;
PRIMLOCALS;
DRM_DEBUG("%s\n", __FUNCTION__);
@@ -545,11 +573,16 @@ static void mga_dma_dispatch_vertex(drm_device_t * dev, drm_buf_t * buf)
* these numbers (Overestimating this doesn't hurt).
*/
buf_priv->dispatched = 1;
- primary_needed = (50 + 15 + 15 + 30 + 25 +
- 10 + 15 * MGA_NR_SAREA_CLIPRECTS);
- PRIM_OVERFLOW(dev, dev_priv, primary_needed);
+ PRIM_OVERFLOW(dev, dev_priv,
+ (MAX_STATE_SIZE + (5 * MGA_NR_SAREA_CLIPRECTS)));
mgaEmitState(dev_priv);
+#if 0
+ length = dev_priv->vertexsize * 3 * 4;
+#endif
+
+
+
do {
if (i < sarea_priv->nbox) {
DRM_DEBUG("idx %d Emit box %d/%d:"
@@ -597,7 +630,6 @@ static void mga_dma_dispatch_indices(drm_device_t * dev,
unsigned int address = (unsigned int) buf->bus_address;
int use_agp = PDEA_pagpxfer_enable;
int i = 0;
- int primary_needed;
PRIMLOCALS;
DRM_DEBUG("%s\n", __FUNCTION__);
@@ -611,9 +643,9 @@ static void mga_dma_dispatch_indices(drm_device_t * dev,
* these numbers (Overestimating this doesn't hurt).
*/
buf_priv->dispatched = 1;
- primary_needed = (50 + 15 + 15 + 30 + 25 +
- 10 + 15 * MGA_NR_SAREA_CLIPRECTS);
- PRIM_OVERFLOW(dev, dev_priv, primary_needed);
+ PRIM_OVERFLOW(dev, dev_priv,
+ (MAX_STATE_SIZE + (5 * MGA_NR_SAREA_CLIPRECTS)));
+
mgaEmitState(dev_priv);
do {
@@ -639,6 +671,7 @@ static void mga_dma_dispatch_indices(drm_device_t * dev,
SETADD_mode_vertlist));
PRIMOUTREG(MGAREG_SETUPEND,
((address + end) | use_agp));
+
PRIMADVANCE(dev_priv);
} while (++i < sarea_priv->nbox);
}
@@ -653,7 +686,10 @@ static void mga_dma_dispatch_indices(drm_device_t * dev,
static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
unsigned int clear_color,
- unsigned int clear_zval)
+ unsigned int clear_zval,
+ unsigned int clear_colormask,
+ unsigned int clear_depthmask)
+
{
drm_mga_private_t *dev_priv = dev->dev_private;
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -662,7 +698,6 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
drm_clip_rect_t *pbox = sarea_priv->boxes;
unsigned int cmd;
int i;
- int primary_needed;
PRIMLOCALS;
DRM_DEBUG("%s\n", __FUNCTION__);
@@ -671,11 +706,7 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
else
cmd = MGA_CLEAR_CMD | DC_atype_rstr;
- primary_needed = nbox * 70;
- if (primary_needed == 0)
- primary_needed = 70;
- PRIM_OVERFLOW(dev, dev_priv, primary_needed);
- PRIMGETPTR(dev_priv);
+ PRIM_OVERFLOW(dev, dev_priv, 35 * MGA_NR_SAREA_CLIPRECTS);
for (i = 0; i < nbox; i++) {
unsigned int height = pbox[i].y2 - pbox[i].y1;
@@ -687,7 +718,7 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
if (flags & MGA_FRONT) {
DRM_DEBUG("clear front\n");
PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_PLNWT, clear_colormask);
PRIMOUTREG(MGAREG_YDSTLEN,
(pbox[i].y1 << 16) | height);
PRIMOUTREG(MGAREG_FXBNDRY,
@@ -702,7 +733,7 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
if (flags & MGA_BACK) {
DRM_DEBUG("clear back\n");
PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_PLNWT, clear_colormask);
PRIMOUTREG(MGAREG_YDSTLEN,
(pbox[i].y1 << 16) | height);
PRIMOUTREG(MGAREG_FXBNDRY,
@@ -717,7 +748,7 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
if (flags & MGA_DEPTH) {
DRM_DEBUG("clear depth\n");
PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_PLNWT, clear_depthmask);
PRIMOUTREG(MGAREG_YDSTLEN,
(pbox[i].y1 << 16) | height);
PRIMOUTREG(MGAREG_FXBNDRY,
@@ -746,31 +777,32 @@ static void mga_dma_dispatch_swap(drm_device_t * dev)
int nbox = sarea_priv->nbox;
drm_clip_rect_t *pbox = sarea_priv->boxes;
int i;
- int primary_needed;
+ int pixel_stride = dev_priv->stride / dev_priv->cpp;
+
PRIMLOCALS;
DRM_DEBUG("%s\n", __FUNCTION__);
- primary_needed = nbox * 5;
- primary_needed += 60;
- PRIM_OVERFLOW(dev, dev_priv, primary_needed);
- PRIMGETPTR(dev_priv);
+ PRIM_OVERFLOW(dev, dev_priv, (MGA_NR_SAREA_CLIPRECTS * 5) + 20);
+
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DWGSYNC, 0x7100);
+ PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
PRIMOUTREG(MGAREG_DSTORG, dev_priv->frontOffset);
PRIMOUTREG(MGAREG_MACCESS, dev_priv->mAccess);
PRIMOUTREG(MGAREG_SRCORG, dev_priv->backOffset);
- PRIMOUTREG(MGAREG_AR5, dev_priv->stride / 2);
+ PRIMOUTREG(MGAREG_AR5, pixel_stride);
PRIMOUTREG(MGAREG_DMAPAD, 0);
PRIMOUTREG(MGAREG_DMAPAD, 0);
PRIMOUTREG(MGAREG_DMAPAD, 0);
PRIMOUTREG(MGAREG_DWGCTL, MGA_COPY_CMD);
+
for (i = 0; i < nbox; i++) {
unsigned int h = pbox[i].y2 - pbox[i].y1;
- unsigned int start = pbox[i].y1 * dev_priv->stride / 2;
-
- DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
- pbox[i].x1, pbox[i].y1, pbox[i].x2, pbox[i].y2);
+ unsigned int start = pbox[i].y1 * pixel_stride;
PRIMOUTREG(MGAREG_AR0, start + pbox[i].x2 - 1);
PRIMOUTREG(MGAREG_AR3, start + pbox[i].x1);
@@ -814,7 +846,10 @@ int mga_clear_bufs(dev_t kdev, u_long cmd, caddr_t data,
*/
dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CTX;
mga_dma_dispatch_clear(dev, clear.flags,
- clear.clear_color, clear.clear_depth);
+ clear.clear_color,
+ clear.clear_depth,
+ clear.clear_color_mask,
+ clear.clear_depth_mask);
PRIMUPDATE(dev_priv);
mga_flush_write_combine();
s = splsofttq();
diff --git a/bsd/tdfx/Makefile b/bsd/tdfx/Makefile
index 471a5fbf..4362a5ba 100644
--- a/bsd/tdfx/Makefile
+++ b/bsd/tdfx/Makefile
@@ -3,7 +3,7 @@
KMOD = tdfx
SRCS = tdfx_drv.c tdfx_context.c
SRCS += device_if.h bus_if.h pci_if.h
-CFLAGS += ${DEBUG_FLAGS} -I..
+CFLAGS += ${DEBUG_FLAGS} -I. -I..
KMODDEPS = drm
@:
diff --git a/bsd/tdfx/tdfx_drv.c b/bsd/tdfx/tdfx_drv.c
index 91e7d560..202df7c3 100644
--- a/bsd/tdfx/tdfx_drv.c
+++ b/bsd/tdfx/tdfx_drv.c
@@ -42,7 +42,7 @@ MODULE_DEPEND(tdfx, agp, 1, 1, 1);
#define TDFX_NAME "tdfx"
#define TDFX_DESC "tdfx"
-#define TDFX_DATE "19991009"
+#define TDFX_DATE "20000928"
#define TDFX_MAJOR 1
#define TDFX_MINOR 0
#define TDFX_PATCHLEVEL 0
@@ -64,6 +64,9 @@ static int tdfx_probe(device_t dev)
case 0x0005121a:
s = "3Dfx Voodoo 3 graphics accelerator";
break;
+ case 0x0009121a:
+ s = "3Dfx Voodoo 5 graphics accelerator";
+ break;
}
if (s) {
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-25 07:51:21 +0000