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-rw-r--r--linux-core/Makefile.kernel2
-rw-r--r--linux-core/i915_compat.c141
-rw-r--r--shared-core/i915_dma.c6
-rw-r--r--shared-core/i915_drv.h5
4 files changed, 153 insertions, 1 deletions
diff --git a/linux-core/Makefile.kernel b/linux-core/Makefile.kernel
index 79136431..f1ae28e6 100644
--- a/linux-core/Makefile.kernel
+++ b/linux-core/Makefile.kernel
@@ -19,7 +19,7 @@ r128-objs := r128_drv.o r128_cce.o r128_state.o r128_irq.o
mga-objs := mga_drv.o mga_dma.o mga_state.o mga_warp.o mga_irq.o
i810-objs := i810_drv.o i810_dma.o
i915-objs := i915_drv.o i915_dma.o i915_irq.o i915_mem.o i915_fence.o \
- i915_buffer.o
+ i915_buffer.o i915_compat.o
nouveau-objs := nouveau_drv.o nouveau_state.o nouveau_fifo.o nouveau_mem.o \
nouveau_object.o nouveau_irq.o nouveau_notifier.o nouveau_swmthd.o \
nouveau_sgdma.o nouveau_dma.o \
diff --git a/linux-core/i915_compat.c b/linux-core/i915_compat.c
new file mode 100644
index 00000000..86eb1e1c
--- /dev/null
+++ b/linux-core/i915_compat.c
@@ -0,0 +1,141 @@
+#include "drmP.h"
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
+
+#define PCI_DEVICE_ID_INTEL_82946GZ_HB 0x2970
+#define PCI_DEVICE_ID_INTEL_82965G_1_HB 0x2980
+#define PCI_DEVICE_ID_INTEL_82965Q_HB 0x2990
+#define PCI_DEVICE_ID_INTEL_82965G_HB 0x29A0
+#define PCI_DEVICE_ID_INTEL_82965GM_HB 0x2A00
+#define PCI_DEVICE_ID_INTEL_82965GME_HB 0x2A10
+#define PCI_DEVICE_ID_INTEL_82945GME_HB 0x27AC
+#define PCI_DEVICE_ID_INTEL_G33_HB 0x29C0
+#define PCI_DEVICE_ID_INTEL_Q35_HB 0x29B0
+#define PCI_DEVICE_ID_INTEL_Q33_HB 0x29D0
+
+#define IS_I965 (agp_dev->device == PCI_DEVICE_ID_INTEL_82946GZ_HB || \
+ agp_dev->device == PCI_DEVICE_ID_INTEL_82965G_1_HB || \
+ agp_dev->device == PCI_DEVICE_ID_INTEL_82965Q_HB || \
+ agp_dev->device == PCI_DEVICE_ID_INTEL_82965G_HB || \
+ agp_dev->device == PCI_DEVICE_ID_INTEL_82965GM_HB || \
+ agp_dev->device == PCI_DEVICE_ID_INTEL_82965GME_HB)
+
+#define IS_G33 (agp_dev->device == PCI_DEVICE_ID_INTEL_G33_HB || \
+ agp_dev->device == PCI_DEVICE_ID_INTEL_Q35_HB || \
+ agp_dev->device == PCI_DEVICE_ID_INTEL_Q33_HB)
+
+#define I915_IFPADDR 0x60
+#define I965_IFPADDR 0x70
+
+static struct _intel_private_compat {
+ void __iomem *flush_page;
+ struct resource ifp_resource;
+} intel_private;
+
+static void
+intel_compat_align_resource(void *data, struct resource *res,
+ resource_size_t size, resource_size_t align)
+{
+ return;
+}
+
+
+static int intel_alloc_chipset_flush_resource(struct pci_dev *pdev)
+{
+ int ret;
+ ret = pci_bus_alloc_resource(pdev->bus, &intel_private.ifp_resource, PAGE_SIZE,
+ PAGE_SIZE, PCIBIOS_MIN_MEM, 0,
+ intel_compat_align_resource, pdev);
+ if (ret != 0)
+ return ret;
+
+ return 0;
+}
+
+static void intel_i915_setup_chipset_flush(struct pci_dev *pdev)
+{
+ int ret;
+ u32 temp;
+
+ pci_read_config_dword(pdev, I915_IFPADDR, &temp);
+ if (!(temp & 0x1)) {
+ intel_alloc_chipset_flush_resource(pdev);
+
+ pci_write_config_dword(pdev, I915_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1);
+ } else {
+ temp &= ~1;
+
+ intel_private.ifp_resource.start = temp;
+ intel_private.ifp_resource.end = temp + PAGE_SIZE;
+ ret = request_resource(&iomem_resource, &intel_private.ifp_resource);
+ if (ret) {
+ intel_private.ifp_resource.start = 0;
+ printk("Failed inserting resource into tree\n");
+ }
+ }
+}
+
+static void intel_i965_g33_setup_chipset_flush(struct pci_dev *pdev)
+{
+ u32 temp_hi, temp_lo;
+ int ret;
+
+ pci_read_config_dword(pdev, I965_IFPADDR + 4, &temp_hi);
+ pci_read_config_dword(pdev, I965_IFPADDR, &temp_lo);
+
+ if (!(temp_lo & 0x1)) {
+
+ intel_alloc_chipset_flush_resource(pdev);
+
+ pci_write_config_dword(pdev, I965_IFPADDR + 4, (intel_private.ifp_resource.start >> 32));
+ pci_write_config_dword(pdev, I965_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1);
+ intel_private.flush_page = ioremap_nocache(intel_private.ifp_resource.start, PAGE_SIZE);
+ } else {
+ u64 l64;
+
+ temp_lo &= ~0x1;
+ l64 = ((u64)temp_hi << 32) | temp_lo;
+
+ intel_private.ifp_resource.start = l64;
+ intel_private.ifp_resource.end = l64 + PAGE_SIZE;
+ ret = request_resource(&iomem_resource, &intel_private.ifp_resource);
+ if (!ret) {
+ intel_private.ifp_resource.start = 0;
+ printk("Failed inserting resource into tree\n");
+ }
+ }
+}
+
+void intel_init_chipset_flush_compat(struct drm_device *dev)
+{
+ struct pci_dev *agp_dev = dev->agp->agp_info.device;
+
+ intel_private.ifp_resource.name = "GMCH IFPBAR";
+ intel_private.ifp_resource.flags = IORESOURCE_MEM;
+
+ /* Setup chipset flush for 915 */
+ if (IS_I965 || IS_G33) {
+ intel_i965_g33_setup_chipset_flush(agp_dev);
+ } else {
+ intel_i915_setup_chipset_flush(agp_dev);
+ }
+
+ if (intel_private.ifp_resource.start) {
+ intel_private.flush_page = ioremap_nocache(intel_private.ifp_resource.start, PAGE_SIZE);
+ if (!intel_private.flush_page)
+ printk("unable to ioremap flush page - no chipset flushing");
+ }
+}
+
+void intel_fini_chipset_flush_compat(struct drm_device *dev)
+{
+ iounmap(intel_private.flush_page);
+ release_resource(&intel_private.ifp_resource);
+}
+
+void drm_agp_chipset_flush(struct drm_device *dev)
+{
+ if (intel_private.flush_page)
+ writel(1, intel_private.flush_page);
+}
+#endif
diff --git a/shared-core/i915_dma.c b/shared-core/i915_dma.c
index 24a4ec4a..5d0c0001 100644
--- a/shared-core/i915_dma.c
+++ b/shared-core/i915_dma.c
@@ -1317,6 +1317,9 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
ret = drm_addmap(dev, base, size, _DRM_REGISTERS, _DRM_KERNEL,
&dev_priv->mmio_map);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
+ intel_init_chipset_flush_compat(dev);
+#endif
return ret;
}
@@ -1329,6 +1332,9 @@ int i915_driver_unload(struct drm_device *dev)
drm_free(dev->dev_private, sizeof(drm_i915_private_t),
DRM_MEM_DRIVER);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
+ intel_fini_chipset_flush_compat(dev);
+#endif
return 0;
}
diff --git a/shared-core/i915_drv.h b/shared-core/i915_drv.h
index 9f69d841..6ff34eb7 100644
--- a/shared-core/i915_drv.h
+++ b/shared-core/i915_drv.h
@@ -313,6 +313,11 @@ extern int i915_move(struct drm_buffer_object *bo, int evict,
void i915_flush_ttm(struct drm_ttm *ttm);
#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
+extern void intel_init_chipset_flush_compat(struct drm_device *dev);
+extern void intel_fini_chipset_flush_compat(struct drm_device *dev);
+#endif
+
#define I915_READ(reg) DRM_READ32(dev_priv->mmio_map, (reg))
#define I915_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio_map, (reg), (val))
#define I915_READ16(reg) DRM_READ16(dev_priv->mmio_map, (reg))
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-25 07:26:42 +0000