diff options
| -rw-r--r-- | shared-core/nv04_timer.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/shared-core/nv04_timer.c b/shared-core/nv04_timer.c index 88dff36d..fbf185b4 100644 --- a/shared-core/nv04_timer.c +++ b/shared-core/nv04_timer.c @@ -11,8 +11,15 @@ nv04_timer_init(struct drm_device *dev) NV_WRITE(NV04_PTIMER_INTR_EN_0, 0x00000000); NV_WRITE(NV04_PTIMER_INTR_0, 0xFFFFFFFF); + /* Just use the pre-existing values for now; these regs are not written + * in nv (driver writer missed a /4 on the address), and writing 8 and 3 + * to the correct regs breaks the timings on the LVDS hardware + * sequencing microcode. + * A correct solution (involving calculations with the GPU PLL) can + * be done when kernel modesetting lands NV_WRITE(NV04_PTIMER_NUMERATOR, 0x00000008); NV_WRITE(NV04_PTIMER_DENOMINATOR, 0x00000003); + */ return 0; } |