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-rw-r--r--bsd-core/ati_pcigart.c2
-rw-r--r--bsd-core/drm_os_freebsd.h20
-rw-r--r--bsd-core/drm_os_netbsd.h20
-rw-r--r--bsd/ati_pcigart.h2
-rw-r--r--bsd/drm_os_freebsd.h20
-rw-r--r--bsd/drm_os_netbsd.h20
-rw-r--r--linux-core/drm_os_linux.h5
-rw-r--r--linux/drm_os_linux.h5
-rw-r--r--shared-core/mga_drv.h8
-rw-r--r--shared-core/r128_drv.h2
-rw-r--r--shared-core/radeon_drv.h2
-rw-r--r--shared/mga_drv.h8
-rw-r--r--shared/r128_drv.h2
-rw-r--r--shared/radeon_drv.h2
14 files changed, 82 insertions, 36 deletions
diff --git a/bsd-core/ati_pcigart.c b/bsd-core/ati_pcigart.c
index 0cc63a3a..b5fe35c8 100644
--- a/bsd-core/ati_pcigart.c
+++ b/bsd-core/ati_pcigart.c
@@ -86,6 +86,8 @@ int DRM(ati_pcigart_init)( drm_device_t *dev,
}
}
+ DRM_MEMORYBARRIER();
+
ret = 1;
done:
diff --git a/bsd-core/drm_os_freebsd.h b/bsd-core/drm_os_freebsd.h
index 8331d246..7b19acc2 100644
--- a/bsd-core/drm_os_freebsd.h
+++ b/bsd-core/drm_os_freebsd.h
@@ -114,7 +114,6 @@
#define DRM_DEVICE drm_device_t *dev = kdev->si_drv1
#define DRM_MALLOC(size) malloc( size, DRM(M_DRM), M_NOWAIT )
#define DRM_FREE(pt,size) free( pt, DRM(M_DRM) )
-#define DRM_VTOPHYS(addr) vtophys(addr)
/* Read/write from bus space, with byteswapping to le if necessary */
#define DRM_READ8(map, offset) *(volatile u_int8_t *) (((unsigned long)(map)->handle) + (offset))
@@ -206,10 +205,21 @@ while (!condition) { \
#define DRM_GET_USER_UNCHECKED(val, uaddr) \
((val) = fuword(uaddr), 0)
-#define DRM_WRITEMEMORYBARRIER( map ) \
- bus_space_barrier((map)->iot, (map)->ioh, 0, (map)->size, 0);
-#define DRM_READMEMORYBARRIER( map ) \
- bus_space_barrier((map)->iot, (map)->ioh, 0, (map)->size, BUS_SPACE_BARRIER_READ);
+/* DRM_READMEMORYBARRIER() prevents reordering of reads.
+ * DRM_WRITEMEMORYBARRIER() prevents reordering of writes.
+ * DRM_MEMORYBARRIER() prevents reordering of reads and writes.
+ */
+#if defined(__i386__)
+#define DRM_READMEMORYBARRIER() __asm __volatile( \
+ "lock; addl $0,0(%%esp)" : : : "memory");
+#define DRM_WRITEMEMORYBARRIER() __asm __volatile("" : : : "memory");
+#define DRM_MEMORYBARRIER() __asm __volatile( \
+ "lock; addl $0,0(%%esp)" : : : "memory");
+#elif defined(__alpha__)
+#define DRM_READMEMORYBARRIER() alpha_mb();
+#define DRM_WRITEMEMORYBARRIER() alpha_wmb();
+#define DRM_MEMORYBARRIER() alpha_mb();
+#endif
#define PAGE_ALIGN(addr) round_page(addr)
diff --git a/bsd-core/drm_os_netbsd.h b/bsd-core/drm_os_netbsd.h
index 7a6f9821..246ebdc6 100644
--- a/bsd-core/drm_os_netbsd.h
+++ b/bsd-core/drm_os_netbsd.h
@@ -94,7 +94,6 @@ extern const int DRM(M_DRM) = M_DEVBUF;
#endif /* __NetBSD_Version__ */
#define DRM_MALLOC(size) malloc( size, DRM(M_DRM), M_NOWAIT )
#define DRM_FREE(pt,size) free( pt, DRM(M_DRM) )
-#define DRM_VTOPHYS(addr) vtophys(addr)
#define DRM_READ8(map, offset) bus_space_read_1( (map)->iot, (map)->ioh, (offset) )
#define DRM_READ32(map, offset) bus_space_read_4( (map)->iot, (map)->ioh, (offset) )
@@ -173,10 +172,21 @@ while (!condition) { \
#define DRM_GET_USER_UNCHECKED(val, uaddr) \
((val) = fuword(uaddr), 0)
-#define DRM_WRITEMEMORYBARRIER( map ) \
- bus_space_barrier((map)->iot, (map)->ioh, 0, (map)->size, 0);
-#define DRM_READMEMORYBARRIER( map ) \
- bus_space_barrier((map)->iot, (map)->ioh, 0, (map)->size, BUS_SPACE_BARRIER_READ);
+/* DRM_READMEMORYBARRIER() prevents reordering of reads.
+ * DRM_WRITEMEMORYBARRIER() prevents reordering of writes.
+ * DRM_MEMORYBARRIER() prevents reordering of reads and writes.
+ */
+#if defined(__i386__)
+#define DRM_READMEMORYBARRIER() __asm __volatile( \
+ "lock; addl $0,0(%%esp)" : : : "memory");
+#define DRM_WRITEMEMORYBARRIER() __asm __volatile("" : : : "memory");
+#define DRM_MEMORYBARRIER() __asm __volatile( \
+ "lock; addl $0,0(%%esp)" : : : "memory");
+#elif defined(__alpha__)
+#define DRM_READMEMORYBARRIER() alpha_mb();
+#define DRM_WRITEMEMORYBARRIER() alpha_wmb();
+#define DRM_MEMORYBARRIER() alpha_mb();
+#endif
#define DRM_WAKEUP(w) wakeup((void *)w)
#define DRM_WAKEUP_INT(w) wakeup(w)
diff --git a/bsd/ati_pcigart.h b/bsd/ati_pcigart.h
index 0cc63a3a..b5fe35c8 100644
--- a/bsd/ati_pcigart.h
+++ b/bsd/ati_pcigart.h
@@ -86,6 +86,8 @@ int DRM(ati_pcigart_init)( drm_device_t *dev,
}
}
+ DRM_MEMORYBARRIER();
+
ret = 1;
done:
diff --git a/bsd/drm_os_freebsd.h b/bsd/drm_os_freebsd.h
index 8331d246..7b19acc2 100644
--- a/bsd/drm_os_freebsd.h
+++ b/bsd/drm_os_freebsd.h
@@ -114,7 +114,6 @@
#define DRM_DEVICE drm_device_t *dev = kdev->si_drv1
#define DRM_MALLOC(size) malloc( size, DRM(M_DRM), M_NOWAIT )
#define DRM_FREE(pt,size) free( pt, DRM(M_DRM) )
-#define DRM_VTOPHYS(addr) vtophys(addr)
/* Read/write from bus space, with byteswapping to le if necessary */
#define DRM_READ8(map, offset) *(volatile u_int8_t *) (((unsigned long)(map)->handle) + (offset))
@@ -206,10 +205,21 @@ while (!condition) { \
#define DRM_GET_USER_UNCHECKED(val, uaddr) \
((val) = fuword(uaddr), 0)
-#define DRM_WRITEMEMORYBARRIER( map ) \
- bus_space_barrier((map)->iot, (map)->ioh, 0, (map)->size, 0);
-#define DRM_READMEMORYBARRIER( map ) \
- bus_space_barrier((map)->iot, (map)->ioh, 0, (map)->size, BUS_SPACE_BARRIER_READ);
+/* DRM_READMEMORYBARRIER() prevents reordering of reads.
+ * DRM_WRITEMEMORYBARRIER() prevents reordering of writes.
+ * DRM_MEMORYBARRIER() prevents reordering of reads and writes.
+ */
+#if defined(__i386__)
+#define DRM_READMEMORYBARRIER() __asm __volatile( \
+ "lock; addl $0,0(%%esp)" : : : "memory");
+#define DRM_WRITEMEMORYBARRIER() __asm __volatile("" : : : "memory");
+#define DRM_MEMORYBARRIER() __asm __volatile( \
+ "lock; addl $0,0(%%esp)" : : : "memory");
+#elif defined(__alpha__)
+#define DRM_READMEMORYBARRIER() alpha_mb();
+#define DRM_WRITEMEMORYBARRIER() alpha_wmb();
+#define DRM_MEMORYBARRIER() alpha_mb();
+#endif
#define PAGE_ALIGN(addr) round_page(addr)
diff --git a/bsd/drm_os_netbsd.h b/bsd/drm_os_netbsd.h
index 7a6f9821..246ebdc6 100644
--- a/bsd/drm_os_netbsd.h
+++ b/bsd/drm_os_netbsd.h
@@ -94,7 +94,6 @@ extern const int DRM(M_DRM) = M_DEVBUF;
#endif /* __NetBSD_Version__ */
#define DRM_MALLOC(size) malloc( size, DRM(M_DRM), M_NOWAIT )
#define DRM_FREE(pt,size) free( pt, DRM(M_DRM) )
-#define DRM_VTOPHYS(addr) vtophys(addr)
#define DRM_READ8(map, offset) bus_space_read_1( (map)->iot, (map)->ioh, (offset) )
#define DRM_READ32(map, offset) bus_space_read_4( (map)->iot, (map)->ioh, (offset) )
@@ -173,10 +172,21 @@ while (!condition) { \
#define DRM_GET_USER_UNCHECKED(val, uaddr) \
((val) = fuword(uaddr), 0)
-#define DRM_WRITEMEMORYBARRIER( map ) \
- bus_space_barrier((map)->iot, (map)->ioh, 0, (map)->size, 0);
-#define DRM_READMEMORYBARRIER( map ) \
- bus_space_barrier((map)->iot, (map)->ioh, 0, (map)->size, BUS_SPACE_BARRIER_READ);
+/* DRM_READMEMORYBARRIER() prevents reordering of reads.
+ * DRM_WRITEMEMORYBARRIER() prevents reordering of writes.
+ * DRM_MEMORYBARRIER() prevents reordering of reads and writes.
+ */
+#if defined(__i386__)
+#define DRM_READMEMORYBARRIER() __asm __volatile( \
+ "lock; addl $0,0(%%esp)" : : : "memory");
+#define DRM_WRITEMEMORYBARRIER() __asm __volatile("" : : : "memory");
+#define DRM_MEMORYBARRIER() __asm __volatile( \
+ "lock; addl $0,0(%%esp)" : : : "memory");
+#elif defined(__alpha__)
+#define DRM_READMEMORYBARRIER() alpha_mb();
+#define DRM_WRITEMEMORYBARRIER() alpha_wmb();
+#define DRM_MEMORYBARRIER() alpha_mb();
+#endif
#define DRM_WAKEUP(w) wakeup((void *)w)
#define DRM_WAKEUP_INT(w) wakeup(w)
diff --git a/linux-core/drm_os_linux.h b/linux-core/drm_os_linux.h
index eed91766..e804399a 100644
--- a/linux-core/drm_os_linux.h
+++ b/linux-core/drm_os_linux.h
@@ -12,8 +12,9 @@
#define DRM_READ32(map, offset) readl(((unsigned long)(map)->handle) + (offset))
#define DRM_WRITE8(map, offset, val) writeb(val, ((unsigned long)(map)->handle) + (offset))
#define DRM_WRITE32(map, offset, val) writel(val, ((unsigned long)(map)->handle) + (offset))
-#define DRM_READMEMORYBARRIER(map) mb()
-#define DRM_WRITEMEMORYBARRIER(map) wmb()
+#define DRM_READMEMORYBARRIER() rmb()
+#define DRM_WRITEMEMORYBARRIER() wmb()
+#define DRM_MEMORYBARRIER() mb()
#define DRM_DEVICE drm_file_t *priv = filp->private_data; \
drm_device_t *dev = priv->dev
diff --git a/linux/drm_os_linux.h b/linux/drm_os_linux.h
index eed91766..e804399a 100644
--- a/linux/drm_os_linux.h
+++ b/linux/drm_os_linux.h
@@ -12,8 +12,9 @@
#define DRM_READ32(map, offset) readl(((unsigned long)(map)->handle) + (offset))
#define DRM_WRITE8(map, offset, val) writeb(val, ((unsigned long)(map)->handle) + (offset))
#define DRM_WRITE32(map, offset, val) writel(val, ((unsigned long)(map)->handle) + (offset))
-#define DRM_READMEMORYBARRIER(map) mb()
-#define DRM_WRITEMEMORYBARRIER(map) wmb()
+#define DRM_READMEMORYBARRIER() rmb()
+#define DRM_WRITEMEMORYBARRIER() wmb()
+#define DRM_MEMORYBARRIER() mb()
#define DRM_DEVICE drm_file_t *priv = filp->private_data; \
drm_device_t *dev = priv->dev
diff --git a/shared-core/mga_drv.h b/shared-core/mga_drv.h
index 7efc89bc..feb389d6 100644
--- a/shared-core/mga_drv.h
+++ b/shared-core/mga_drv.h
@@ -131,7 +131,7 @@ extern int mga_getparam( DRM_IOCTL_ARGS );
extern int mga_warp_install_microcode( drm_mga_private_t *dev_priv );
extern int mga_warp_init( drm_mga_private_t *dev_priv );
-#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER(dev_priv->primary)
+#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER()
#if defined(__linux__) && defined(__alpha__)
#define MGA_BASE( reg ) ((unsigned long)(dev_priv->mmio->handle))
@@ -142,12 +142,12 @@ extern int mga_warp_init( drm_mga_private_t *dev_priv );
#define MGA_READ( reg ) (_MGA_READ((u32 *)MGA_ADDR(reg)))
#define MGA_READ8( reg ) (_MGA_READ((u8 *)MGA_ADDR(reg)))
-#define MGA_WRITE( reg, val ) do { DRM_WRITEMEMORYBARRIER(dev_priv->mmio); MGA_DEREF( reg ) = val; } while (0)
-#define MGA_WRITE8( reg, val ) do { DRM_WRITEMEMORYBARRIER(dev_priv->mmio); MGA_DEREF8( reg ) = val; } while (0)
+#define MGA_WRITE( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF( reg ) = val; } while (0)
+#define MGA_WRITE8( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8( reg ) = val; } while (0)
static inline u32 _MGA_READ(u32 *addr)
{
- DRM_READMEMORYBARRIER(dev_priv->mmio);
+ DRM_MEMORYBARRIER();
return *(volatile u32 *)addr;
}
#else
diff --git a/shared-core/r128_drv.h b/shared-core/r128_drv.h
index bd913878..3dee2e94 100644
--- a/shared-core/r128_drv.h
+++ b/shared-core/r128_drv.h
@@ -440,7 +440,7 @@ do { \
#if defined(__powerpc__)
#define r128_flush_write_combine() (void) GET_RING_HEAD( &dev_priv->ring )
#else
-#define r128_flush_write_combine() DRM_WRITEMEMORYBARRIER(dev_priv->ring_rptr)
+#define r128_flush_write_combine() DRM_WRITEMEMORYBARRIER()
#endif
diff --git a/shared-core/radeon_drv.h b/shared-core/radeon_drv.h
index ecf7cce0..07d747a6 100644
--- a/shared-core/radeon_drv.h
+++ b/shared-core/radeon_drv.h
@@ -852,7 +852,7 @@ do { \
#define COMMIT_RING() do { \
/* Flush writes to ring */ \
- DRM_READMEMORYBARRIER( dev_priv->mmio ); \
+ DRM_MEMORYBARRIER(); \
GET_RING_HEAD( dev_priv ); \
RADEON_WRITE( RADEON_CP_RB_WPTR, dev_priv->ring.tail ); \
/* read from PCI bus to ensure correct posting */ \
diff --git a/shared/mga_drv.h b/shared/mga_drv.h
index 7efc89bc..feb389d6 100644
--- a/shared/mga_drv.h
+++ b/shared/mga_drv.h
@@ -131,7 +131,7 @@ extern int mga_getparam( DRM_IOCTL_ARGS );
extern int mga_warp_install_microcode( drm_mga_private_t *dev_priv );
extern int mga_warp_init( drm_mga_private_t *dev_priv );
-#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER(dev_priv->primary)
+#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER()
#if defined(__linux__) && defined(__alpha__)
#define MGA_BASE( reg ) ((unsigned long)(dev_priv->mmio->handle))
@@ -142,12 +142,12 @@ extern int mga_warp_init( drm_mga_private_t *dev_priv );
#define MGA_READ( reg ) (_MGA_READ((u32 *)MGA_ADDR(reg)))
#define MGA_READ8( reg ) (_MGA_READ((u8 *)MGA_ADDR(reg)))
-#define MGA_WRITE( reg, val ) do { DRM_WRITEMEMORYBARRIER(dev_priv->mmio); MGA_DEREF( reg ) = val; } while (0)
-#define MGA_WRITE8( reg, val ) do { DRM_WRITEMEMORYBARRIER(dev_priv->mmio); MGA_DEREF8( reg ) = val; } while (0)
+#define MGA_WRITE( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF( reg ) = val; } while (0)
+#define MGA_WRITE8( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8( reg ) = val; } while (0)
static inline u32 _MGA_READ(u32 *addr)
{
- DRM_READMEMORYBARRIER(dev_priv->mmio);
+ DRM_MEMORYBARRIER();
return *(volatile u32 *)addr;
}
#else
diff --git a/shared/r128_drv.h b/shared/r128_drv.h
index bd913878..3dee2e94 100644
--- a/shared/r128_drv.h
+++ b/shared/r128_drv.h
@@ -440,7 +440,7 @@ do { \
#if defined(__powerpc__)
#define r128_flush_write_combine() (void) GET_RING_HEAD( &dev_priv->ring )
#else
-#define r128_flush_write_combine() DRM_WRITEMEMORYBARRIER(dev_priv->ring_rptr)
+#define r128_flush_write_combine() DRM_WRITEMEMORYBARRIER()
#endif
diff --git a/shared/radeon_drv.h b/shared/radeon_drv.h
index ecf7cce0..07d747a6 100644
--- a/shared/radeon_drv.h
+++ b/shared/radeon_drv.h
@@ -852,7 +852,7 @@ do { \
#define COMMIT_RING() do { \
/* Flush writes to ring */ \
- DRM_READMEMORYBARRIER( dev_priv->mmio ); \
+ DRM_MEMORYBARRIER(); \
GET_RING_HEAD( dev_priv ); \
RADEON_WRITE( RADEON_CP_RB_WPTR, dev_priv->ring.tail ); \
/* read from PCI bus to ensure correct posting */ \
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-01 04:04:21 +0000