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-rw-r--r--linux/mga_dma.c6
-rw-r--r--linux/mga_state.c14
-rw-r--r--linux/r128_dma.c6
3 files changed, 3 insertions, 23 deletions
diff --git a/linux/mga_dma.c b/linux/mga_dma.c
index ca35a9f4..f80fb489 100644
--- a/linux/mga_dma.c
+++ b/linux/mga_dma.c
@@ -416,9 +416,7 @@ void mga_fire_primary(drm_device_t *dev, drm_mga_prim_buf_t *prim)
}
}
-#ifdef __i386__
mga_flush_write_combine();
-#endif
atomic_inc(&dev_priv->pending_bufs);
MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL);
MGA_WRITE(MGAREG_PRIMEND, (phys_head + num_dwords * 4) | use_agp);
@@ -815,10 +813,8 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
/* Poll for the first buffer to insure that
* the status register will be correct
*/
-
-#ifdef __i386__
+
mga_flush_write_combine();
-#endif
MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL);
MGA_WRITE(MGAREG_PRIMEND, ((phys_head + num_dwords * 4) |
diff --git a/linux/mga_state.c b/linux/mga_state.c
index 8925cbff..0c2f5729 100644
--- a/linux/mga_state.c
+++ b/linux/mga_state.c
@@ -218,8 +218,8 @@ static void mgaG400EmitTex1(drm_mga_private_t * dev_priv, int source )
/* This takes 25 dwords */
- PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] | TMC_map1_enable |
- 0x00008000);
+ PRIMOUTREG(MGAREG_TEXCTL2,
+ regs[MGA_TEXREG_CTL2] | TMC_map1_enable | 0x00008000);
PRIMOUTREG(MGAREG_TEXCTL, regs[MGA_TEXREG_CTL]);
PRIMOUTREG(MGAREG_TEXFILTER, regs[MGA_TEXREG_FILTER]);
PRIMOUTREG(MGAREG_TEXBORDERCOL, regs[MGA_TEXREG_BORDERCOL]);
@@ -873,9 +873,7 @@ int mga_clear_bufs(struct inode *inode, struct file *filp,
clear.clear_color_mask,
clear.clear_depth_mask);
PRIMUPDATE(dev_priv);
-#ifdef __i386__
mga_flush_write_combine();
-#endif
mga_dma_schedule(dev, 1);
return 0;
}
@@ -905,9 +903,7 @@ int mga_swap_bufs(struct inode *inode, struct file *filp,
PRIMUPDATE(dev_priv);
set_bit(MGA_BUF_SWAP_PENDING,
&dev_priv->current_prim->buffer_status);
-#ifdef __i386__
mga_flush_write_combine();
-#endif
mga_dma_schedule(dev, 1);
return 0;
}
@@ -955,9 +951,7 @@ int mga_iload(struct inode *inode, struct file *filp,
AGEBUF(dev_priv, buf_priv);
buf_priv->discard = 1;
mga_freelist_put(dev, buf);
-#ifdef __i386__
mga_flush_write_combine();
-#endif
mga_dma_schedule(dev, 1);
return 0;
}
@@ -1005,9 +999,7 @@ int mga_vertex(struct inode *inode, struct file *filp,
mga_dma_dispatch_vertex(dev, buf);
PRIMUPDATE(dev_priv);
-#ifdef __i386__
mga_flush_write_combine();
-#endif
mga_dma_schedule(dev, 1);
return 0;
}
@@ -1054,9 +1046,7 @@ int mga_indices(struct inode *inode, struct file *filp,
mga_dma_dispatch_indices(dev, buf, indices.start, indices.end);
PRIMUPDATE(dev_priv);
-#ifdef __i386__
mga_flush_write_combine();
-#endif
mga_dma_schedule(dev, 1);
return 0;
}
diff --git a/linux/r128_dma.c b/linux/r128_dma.c
index 696353d6..bcba6782 100644
--- a/linux/r128_dma.c
+++ b/linux/r128_dma.c
@@ -480,10 +480,8 @@ static int r128_submit_packets_ring_secure(drm_device_t *dev,
dev_priv->ring_start,
write * sizeof(u32));
-#ifdef __i386__
/* Make sure WC cache has been flushed */
r128_flush_write_combine();
-#endif
dev_priv->sarea_priv->ring_write = write;
R128_WRITE(R128_PM4_BUFFER_DL_WPTR, write);
@@ -585,10 +583,8 @@ static int r128_submit_packets_ring(drm_device_t *dev,
dev_priv->ring_start,
write * sizeof(u32));
-#ifdef __i386__
/* Make sure WC cache has been flushed */
r128_flush_write_combine();
-#endif
dev_priv->sarea_priv->ring_write = write;
R128_WRITE(R128_PM4_BUFFER_DL_WPTR, write);
@@ -756,10 +752,8 @@ static int r128_send_vertbufs(drm_device_t *dev, drm_r128_vertex_t *v)
r128_mark_vertbufs_done(dev);
}
-#ifdef __i386__
/* Make sure WC cache has been flushed (if in PIO mode) */
if (!dev_priv->cce_is_bm_mode) r128_flush_write_combine();
-#endif
/* FIXME: Add support for sending vertex buffer to the CCE here
instead of in client code. The v->prim holds the primitive