diff options
29 files changed, 691 insertions, 613 deletions
diff --git a/linux-core/drmP.h b/linux-core/drmP.h index c274f1fa..2bbc6200 100644 --- a/linux-core/drmP.h +++ b/linux-core/drmP.h @@ -1048,6 +1048,9 @@ extern unsigned long drm_get_resource_start(drm_device_t *dev, unsigned int resource); extern unsigned long drm_get_resource_len(drm_device_t *dev, unsigned int resource); +extern drm_map_list_t *drm_find_matching_map(drm_device_t *dev, + drm_local_map_t *map); + /* DMA support (drm_dma.h) */ extern int drm_dma_setup(drm_device_t * dev); diff --git a/linux-core/drm_bufs.c b/linux-core/drm_bufs.c index a2c8a75e..2f3e4b2a 100644 --- a/linux-core/drm_bufs.c +++ b/linux-core/drm_bufs.c @@ -48,8 +48,7 @@ unsigned long drm_get_resource_len(drm_device_t *dev, unsigned int resource) } EXPORT_SYMBOL(drm_get_resource_len); -static drm_map_list_t *drm_find_matching_map(drm_device_t *dev, - drm_local_map_t *map) +drm_map_list_t *drm_find_matching_map(drm_device_t *dev, drm_local_map_t *map) { drm_map_list_t *entry; list_for_each_entry(entry, &dev->maplist, head) { @@ -62,6 +61,7 @@ static drm_map_list_t *drm_find_matching_map(drm_device_t *dev, return NULL; } +EXPORT_SYMBOL(drm_find_matching_map); static int drm_map_handle(drm_device_t *dev, drm_hash_item_t *hash, unsigned long user_token, int hashed_handle) diff --git a/shared-core/nouveau_drm.h b/shared-core/nouveau_drm.h index 7abe82e0..b39a7932 100644 --- a/shared-core/nouveau_drm.h +++ b/shared-core/nouveau_drm.h @@ -25,9 +25,9 @@ #ifndef __NOUVEAU_DRM_H__ #define __NOUVEAU_DRM_H__ -#define NOUVEAU_DRM_HEADER_PATCHLEVEL 8 +#define NOUVEAU_DRM_HEADER_PATCHLEVEL 9 -typedef struct drm_nouveau_fifo_alloc { +struct drm_nouveau_fifo_alloc { uint32_t fb_ctxdma_handle; uint32_t tt_ctxdma_handle; @@ -42,27 +42,24 @@ typedef struct drm_nouveau_fifo_alloc { /* Notifier memory */ drm_handle_t notifier; int notifier_size; -} -drm_nouveau_fifo_alloc_t; +}; -typedef struct drm_nouveau_grobj_alloc { +struct drm_nouveau_grobj_alloc { int channel; uint32_t handle; int class; -} -drm_nouveau_grobj_alloc_t; +}; #define NOUVEAU_MEM_ACCESS_RO 1 #define NOUVEAU_MEM_ACCESS_WO 2 #define NOUVEAU_MEM_ACCESS_RW 3 -typedef struct drm_nouveau_notifier_alloc { +struct drm_nouveau_notifier_alloc { int channel; uint32_t handle; int count; uint32_t offset; -} -drm_nouveau_notifier_alloc_t; +}; #define NOUVEAU_MEM_FB 0x00000001 #define NOUVEAU_MEM_AGP 0x00000002 @@ -76,19 +73,18 @@ drm_nouveau_notifier_alloc_t; #define NOUVEAU_MEM_INSTANCE 0x00000200 /* internal */ #define NOUVEAU_MEM_NOTIFIER 0x00000400 /* internal */ -typedef struct drm_nouveau_mem_alloc { +struct drm_nouveau_mem_alloc { int flags; int alignment; uint64_t size; // in bytes - uint64_t region_offset; -} -drm_nouveau_mem_alloc_t; + uint64_t offset; + drm_handle_t map_handle; +}; -typedef struct drm_nouveau_mem_free { - uint64_t region_offset; +struct drm_nouveau_mem_free { + uint64_t offset; int flags; -} -drm_nouveau_mem_free_t; +}; /* FIXME : maybe unify {GET,SET}PARAMs */ #define NOUVEAU_GETPARAM_PCI_VENDOR 3 @@ -99,19 +95,17 @@ drm_nouveau_mem_free_t; #define NOUVEAU_GETPARAM_FB_SIZE 8 #define NOUVEAU_GETPARAM_AGP_SIZE 9 #define NOUVEAU_GETPARAM_PCI_PHYSICAL 10 -typedef struct drm_nouveau_getparam { +struct drm_nouveau_getparam { uint64_t param; uint64_t value; -} -drm_nouveau_getparam_t; +}; #define NOUVEAU_SETPARAM_CMDBUF_LOCATION 1 #define NOUVEAU_SETPARAM_CMDBUF_SIZE 2 -typedef struct drm_nouveau_setparam { +struct drm_nouveau_setparam { uint64_t param; uint64_t value; -} -drm_nouveau_setparam_t; +}; enum nouveau_card_type { NV_UNKNOWN =0, @@ -120,8 +114,8 @@ enum nouveau_card_type { NV_04 =4, NV_05 =5, NV_10 =10, - NV_11 =10, - NV_15 =10, + NV_11 =11, + NV_15 =11, NV_17 =17, NV_20 =20, NV_25 =20, @@ -141,12 +135,11 @@ enum nouveau_bus_type { #define NOUVEAU_MAX_SAREA_CLIPRECTS 16 -typedef struct drm_nouveau_sarea { +struct drm_nouveau_sarea { /* the cliprects */ drm_clip_rect_t boxes[NOUVEAU_MAX_SAREA_CLIPRECTS]; unsigned int nbox; -} -drm_nouveau_sarea_t; +}; #define DRM_NOUVEAU_FIFO_ALLOC 0x00 #define DRM_NOUVEAU_GROBJ_ALLOC 0x01 diff --git a/shared-core/nouveau_drv.h b/shared-core/nouveau_drv.h index ea03fe37..4fa979e6 100644 --- a/shared-core/nouveau_drv.h +++ b/shared-core/nouveau_drv.h @@ -34,7 +34,7 @@ #define DRIVER_MAJOR 0 #define DRIVER_MINOR 0 -#define DRIVER_PATCHLEVEL 8 +#define DRIVER_PATCHLEVEL 9 #define NOUVEAU_FAMILY 0x0000FFFF #define NOUVEAU_FLAGS 0xFFFF0000 @@ -50,6 +50,7 @@ struct mem_block { DRMFILE filp; /* 0: free, -1: heap, other: real files */ int flags; drm_local_map_t *map; + drm_handle_t map_handle; }; enum nouveau_flags { @@ -65,7 +66,7 @@ enum nouveau_flags { #define NVOBJ_FLAG_ZERO_ALLOC (1 << 1) #define NVOBJ_FLAG_ZERO_FREE (1 << 2) #define NVOBJ_FLAG_FAKE (1 << 3) -typedef struct nouveau_gpuobj { +struct nouveau_gpuobj { struct nouveau_gpuobj *next; struct nouveau_gpuobj *prev; @@ -79,17 +80,17 @@ typedef struct nouveau_gpuobj { uint32_t engine; uint32_t class; -} nouveau_gpuobj_t; +}; -typedef struct nouveau_gpuobj_ref { +struct nouveau_gpuobj_ref { struct nouveau_gpuobj_ref *next; - nouveau_gpuobj_t *gpuobj; + struct nouveau_gpuobj *gpuobj; uint32_t instance; int channel; int handle; -} nouveau_gpuobj_ref_t; +}; struct nouveau_fifo { @@ -101,9 +102,9 @@ struct nouveau_fifo drm_local_map_t *regs; /* DMA push buffer */ - nouveau_gpuobj_ref_t *pushbuf; - struct mem_block *pushbuf_mem; - uint32_t pushbuf_base; + struct nouveau_gpuobj_ref *pushbuf; + struct mem_block *pushbuf_mem; + uint32_t pushbuf_base; /* Notifier memory */ struct mem_block *notifier_block; @@ -111,17 +112,17 @@ struct nouveau_fifo drm_local_map_t *notifier_map; /* PFIFO context */ - nouveau_gpuobj_ref_t *ramfc; + struct nouveau_gpuobj_ref *ramfc; /* PGRAPH context */ - nouveau_gpuobj_ref_t *ramin_grctx; + struct nouveau_gpuobj_ref *ramin_grctx; uint32_t pgraph_ctx [340]; /* XXX dynamic alloc ? */ /* Objects */ - nouveau_gpuobj_ref_t *ramin; /* Private instmem */ - struct mem_block *ramin_heap; /* Private PRAMIN heap */ - nouveau_gpuobj_ref_t *ramht; /* Hash table */ - nouveau_gpuobj_ref_t *ramht_refs; /* Objects referenced by RAMHT */ + struct nouveau_gpuobj_ref *ramin; /* Private instmem */ + struct mem_block *ramin_heap; /* Private PRAMIN heap */ + struct nouveau_gpuobj_ref *ramht; /* Hash table */ + struct nouveau_gpuobj_ref *ramht_refs; /* Objects referenced by RAMHT */ }; struct nouveau_config { @@ -131,59 +132,59 @@ struct nouveau_config { } cmdbuf; }; -typedef struct nouveau_engine_func { +struct nouveau_engine_func { struct { void *priv; - int (*init)(drm_device_t *dev); - void (*takedown)(drm_device_t *dev); + int (*init)(struct drm_device *dev); + void (*takedown)(struct drm_device *dev); - int (*populate)(drm_device_t *, nouveau_gpuobj_t *, + int (*populate)(struct drm_device *, struct nouveau_gpuobj *, uint32_t *size); - void (*clear)(drm_device_t *, nouveau_gpuobj_t *); - int (*bind)(drm_device_t *, nouveau_gpuobj_t *); - int (*unbind)(drm_device_t *, nouveau_gpuobj_t *); + void (*clear)(struct drm_device *, struct nouveau_gpuobj *); + int (*bind)(struct drm_device *, struct nouveau_gpuobj *); + int (*unbind)(struct drm_device *, struct nouveau_gpuobj *); } instmem; struct { - int (*init)(drm_device_t *dev); - void (*takedown)(drm_device_t *dev); + int (*init)(struct drm_device *dev); + void (*takedown)(struct drm_device *dev); } mc; struct { - int (*init)(drm_device_t *dev); - void (*takedown)(drm_device_t *dev); + int (*init)(struct drm_device *dev); + void (*takedown)(struct drm_device *dev); } timer; struct { - int (*init)(drm_device_t *dev); - void (*takedown)(drm_device_t *dev); + int (*init)(struct drm_device *dev); + void (*takedown)(struct drm_device *dev); } fb; struct { - int (*init)(drm_device_t *); - void (*takedown)(drm_device_t *); + int (*init)(struct drm_device *); + void (*takedown)(struct drm_device *); - int (*create_context)(drm_device_t *, int channel); - void (*destroy_context)(drm_device_t *, int channel); - int (*load_context)(drm_device_t *, int channel); - int (*save_context)(drm_device_t *, int channel); + int (*create_context)(struct drm_device *, int channel); + void (*destroy_context)(struct drm_device *, int channel); + int (*load_context)(struct drm_device *, int channel); + int (*save_context)(struct drm_device *, int channel); } graph; struct { void *priv; - int (*init)(drm_device_t *); - void (*takedown)(drm_device_t *); + int (*init)(struct drm_device *); + void (*takedown)(struct drm_device *); - int (*create_context)(drm_device_t *, int channel); - void (*destroy_context)(drm_device_t *, int channel); - int (*load_context)(drm_device_t *, int channel); - int (*save_context)(drm_device_t *, int channel); + int (*create_context)(struct drm_device *, int channel); + void (*destroy_context)(struct drm_device *, int channel); + int (*load_context)(struct drm_device *, int channel); + int (*save_context)(struct drm_device *, int channel); } fifo; -} nouveau_engine_func_t; +}; -typedef struct drm_nouveau_private { +struct drm_nouveau_private { enum { NOUVEAU_CARD_INIT_DOWN, NOUVEAU_CARD_INIT_DONE, @@ -206,7 +207,7 @@ typedef struct drm_nouveau_private { struct nouveau_engine_func Engine; /* RAMIN configuration, RAMFC, RAMHT and RAMRO offsets */ - nouveau_gpuobj_t *ramht; + struct nouveau_gpuobj *ramht; uint32_t ramin_rsvd_vram; uint32_t ramht_offset; uint32_t ramht_size; @@ -233,16 +234,15 @@ typedef struct drm_nouveau_private { /* context table pointed to be NV_PGRAPH_CHANNEL_CTX_TABLE (0x400780) */ uint32_t ctx_table_size; - nouveau_gpuobj_ref_t *ctx_table; + struct nouveau_gpuobj_ref *ctx_table; struct nouveau_config config; - nouveau_gpuobj_t *gpuobj_all; -} -drm_nouveau_private_t; + struct nouveau_gpuobj *gpuobj_all; +}; /* nouveau_state.c */ -extern void nouveau_preclose(drm_device_t * dev, DRMFILE filp); +extern void nouveau_preclose(struct drm_device * dev, DRMFILE filp); extern int nouveau_load(struct drm_device *dev, unsigned long flags); extern int nouveau_firstopen(struct drm_device *dev); extern void nouveau_lastclose(struct drm_device *dev); @@ -270,172 +270,175 @@ extern int nouveau_mem_init(struct drm_device *dev); extern void nouveau_mem_close(struct drm_device *dev); /* nouveau_notifier.c */ -extern int nouveau_notifier_init_channel(drm_device_t *, int channel, DRMFILE); -extern void nouveau_notifier_takedown_channel(drm_device_t *, int channel); -extern int nouveau_notifier_alloc(drm_device_t *, int channel, +extern int nouveau_notifier_init_channel(struct drm_device *, int channel, DRMFILE); +extern void nouveau_notifier_takedown_channel(struct drm_device *, int channel); +extern int nouveau_notifier_alloc(struct drm_device *, int channel, uint32_t handle, int cout, uint32_t *offset); extern int nouveau_ioctl_notifier_alloc(DRM_IOCTL_ARGS); /* nouveau_fifo.c */ -extern int nouveau_fifo_init(drm_device_t *dev); -extern int nouveau_fifo_number(drm_device_t *dev); -extern int nouveau_fifo_ctx_size(drm_device_t *dev); -extern void nouveau_fifo_cleanup(drm_device_t *dev, DRMFILE filp); -extern int nouveau_fifo_owner(drm_device_t *dev, DRMFILE filp, int channel); -extern void nouveau_fifo_free(drm_device_t *dev, int channel); +extern int nouveau_fifo_init(struct drm_device *dev); +extern int nouveau_fifo_number(struct drm_device *dev); +extern int nouveau_fifo_ctx_size(struct drm_device *dev); +extern void nouveau_fifo_cleanup(struct drm_device *dev, DRMFILE filp); +extern int nouveau_fifo_owner(struct drm_device *dev, DRMFILE filp, int channel); +extern void nouveau_fifo_free(struct drm_device *dev, int channel); /* nouveau_object.c */ -extern void nouveau_gpuobj_takedown(drm_device_t *dev); -extern int nouveau_gpuobj_channel_init(drm_device_t *, int channel, +extern void nouveau_gpuobj_takedown(struct drm_device *dev); +extern int nouveau_gpuobj_channel_init(struct drm_device *, int channel, uint32_t vram_h, uint32_t tt_h); -extern void nouveau_gpuobj_channel_takedown(drm_device_t *, int channel); -extern int nouveau_gpuobj_new(drm_device_t *, int channel, int size, int align, - uint32_t flags, nouveau_gpuobj_t **); -extern int nouveau_gpuobj_del(drm_device_t *, nouveau_gpuobj_t **); -extern int nouveau_gpuobj_ref_add(drm_device_t *, int channel, uint32_t handle, - nouveau_gpuobj_t *, nouveau_gpuobj_ref_t **); -extern int nouveau_gpuobj_ref_del(drm_device_t *, nouveau_gpuobj_ref_t **); -extern int nouveau_gpuobj_new_ref(drm_device_t *, int chan_obj, int chan_ref, +extern void nouveau_gpuobj_channel_takedown(struct drm_device *, int channel); +extern int nouveau_gpuobj_new(struct drm_device *, int channel, int size, int align, + uint32_t flags, struct nouveau_gpuobj **); +extern int nouveau_gpuobj_del(struct drm_device *, struct nouveau_gpuobj **); +extern int nouveau_gpuobj_ref_add(struct drm_device *, int channel, uint32_t handle, + struct nouveau_gpuobj *, + struct nouveau_gpuobj_ref **); +extern int nouveau_gpuobj_ref_del(struct drm_device *, struct nouveau_gpuobj_ref **); +extern int nouveau_gpuobj_new_ref(struct drm_device *, int chan_obj, int chan_ref, uint32_t handle, int size, int align, - uint32_t flags, nouveau_gpuobj_ref_t **); -extern int nouveau_gpuobj_new_fake(drm_device_t *, uint32_t offset, + uint32_t flags, struct nouveau_gpuobj_ref **); +extern int nouveau_gpuobj_new_fake(struct drm_device *, uint32_t offset, uint32_t size, uint32_t flags, - nouveau_gpuobj_t**, nouveau_gpuobj_ref_t**); -extern int nouveau_gpuobj_dma_new(drm_device_t *, int channel, int class, + struct nouveau_gpuobj**, + struct nouveau_gpuobj_ref**); +extern int nouveau_gpuobj_dma_new(struct drm_device *, int channel, int class, uint64_t offset, uint64_t size, - int access, int target, nouveau_gpuobj_t **); -extern int nouveau_gpuobj_gr_new(drm_device_t *, int channel, int class, - nouveau_gpuobj_t **); + int access, int target, + struct nouveau_gpuobj **); +extern int nouveau_gpuobj_gr_new(struct drm_device *, int channel, int class, + struct nouveau_gpuobj **); extern int nouveau_ioctl_grobj_alloc(DRM_IOCTL_ARGS); /* nouveau_irq.c */ extern irqreturn_t nouveau_irq_handler(DRM_IRQ_ARGS); -extern void nouveau_irq_preinstall(drm_device_t*); -extern void nouveau_irq_postinstall(drm_device_t*); -extern void nouveau_irq_uninstall(drm_device_t*); +extern void nouveau_irq_preinstall(struct drm_device*); +extern void nouveau_irq_postinstall(struct drm_device*); +extern void nouveau_irq_uninstall(struct drm_device*); /* nv04_fb.c */ -extern int nv04_fb_init(drm_device_t *dev); -extern void nv04_fb_takedown(drm_device_t *dev); +extern int nv04_fb_init(struct drm_device *dev); +extern void nv04_fb_takedown(struct drm_device *dev); /* nv10_fb.c */ -extern int nv10_fb_init(drm_device_t *dev); -extern void nv10_fb_takedown(drm_device_t *dev); +extern int nv10_fb_init(struct drm_device *dev); +extern void nv10_fb_takedown(struct drm_device *dev); /* nv40_fb.c */ -extern int nv40_fb_init(drm_device_t *dev); -extern void nv40_fb_takedown(drm_device_t *dev); +extern int nv40_fb_init(struct drm_device *dev); +extern void nv40_fb_takedown(struct drm_device *dev); /* nv04_fifo.c */ -extern int nv04_fifo_create_context(drm_device_t *dev, int channel); -extern void nv04_fifo_destroy_context(drm_device_t *dev, int channel); -extern int nv04_fifo_load_context(drm_device_t *dev, int channel); -extern int nv04_fifo_save_context(drm_device_t *dev, int channel); +extern int nv04_fifo_create_context(struct drm_device *dev, int channel); +extern void nv04_fifo_destroy_context(struct drm_device *dev, int channel); +extern int nv04_fifo_load_context(struct drm_device *dev, int channel); +extern int nv04_fifo_save_context(struct drm_device *dev, int channel); /* nv10_fifo.c */ -extern int nv10_fifo_create_context(drm_device_t *dev, int channel); -extern void nv10_fifo_destroy_context(drm_device_t *dev, int channel); -extern int nv10_fifo_load_context(drm_device_t *dev, int channel); -extern int nv10_fifo_save_context(drm_device_t *dev, int channel); +extern int nv10_fifo_create_context(struct drm_device *dev, int channel); +extern void nv10_fifo_destroy_context(struct drm_device *dev, int channel); +extern int nv10_fifo_load_context(struct drm_device *dev, int channel); +extern int nv10_fifo_save_context(struct drm_device *dev, int channel); /* nv40_fifo.c */ -extern int nv40_fifo_create_context(drm_device_t *, int channel); -extern void nv40_fifo_destroy_context(drm_device_t *, int channel); -extern int nv40_fifo_load_context(drm_device_t *, int channel); -extern int nv40_fifo_save_context(drm_device_t *, int channel); +extern int nv40_fifo_create_context(struct drm_device *, int channel); +extern void nv40_fifo_destroy_context(struct drm_device *, int channel); +extern int nv40_fifo_load_context(struct drm_device *, int channel); +extern int nv40_fifo_save_context(struct drm_device *, int channel); /* nv50_fifo.c */ -extern int nv50_fifo_init(drm_device_t *); -extern void nv50_fifo_takedown(drm_device_t *); -extern int nv50_fifo_create_context(drm_device_t *, int channel); -extern void nv50_fifo_destroy_context(drm_device_t *, int channel); -extern int nv50_fifo_load_context(drm_device_t *, int channel); -extern int nv50_fifo_save_context(drm_device_t *, int channel); +extern int nv50_fifo_init(struct drm_device *); +extern void nv50_fifo_takedown(struct drm_device *); +extern int nv50_fifo_create_context(struct drm_device *, int channel); +extern void nv50_fifo_destroy_context(struct drm_device *, int channel); +extern int nv50_fifo_load_context(struct drm_device *, int channel); +extern int nv50_fifo_save_context(struct drm_device *, int channel); /* nv04_graph.c */ -extern void nouveau_nv04_context_switch(drm_device_t *dev); -extern int nv04_graph_init(drm_device_t *dev); -extern void nv04_graph_takedown(drm_device_t *dev); -extern int nv04_graph_create_context(drm_device_t *dev, int channel); -extern void nv04_graph_destroy_context(drm_device_t *dev, int channel); -extern int nv04_graph_load_context(drm_device_t *dev, int channel); -extern int nv04_graph_save_context(drm_device_t *dev, int channel); +extern void nouveau_nv04_context_switch(struct drm_device *dev); +extern int nv04_graph_init(struct drm_device *dev); +extern void nv04_graph_takedown(struct drm_device *dev); +extern int nv04_graph_create_context(struct drm_device *dev, int channel); +extern void nv04_graph_destroy_context(struct drm_device *dev, int channel); +extern int nv04_graph_load_context(struct drm_device *dev, int channel); +extern int nv04_graph_save_context(struct drm_device *dev, int channel); /* nv10_graph.c */ -extern void nouveau_nv10_context_switch(drm_device_t *dev); -extern int nv10_graph_init(drm_device_t *dev); -extern void nv10_graph_takedown(drm_device_t *dev); -extern int nv10_graph_create_context(drm_device_t *dev, int channel); -extern void nv10_graph_destroy_context(drm_device_t *dev, int channel); -extern int nv10_graph_load_context(drm_device_t *dev, int channel); -extern int nv10_graph_save_context(drm_device_t *dev, int channel); +extern void nouveau_nv10_context_switch(struct drm_device *dev); +extern int nv10_graph_init(struct drm_device *dev); +extern void nv10_graph_takedown(struct drm_device *dev); +extern int nv10_graph_create_context(struct drm_device *dev, int channel); +extern void nv10_graph_destroy_context(struct drm_device *dev, int channel); +extern int nv10_graph_load_context(struct drm_device *dev, int channel); +extern int nv10_graph_save_context(struct drm_device *dev, int channel); /* nv20_graph.c */ -extern void nouveau_nv20_context_switch(drm_device_t *dev); -extern int nv20_graph_init(drm_device_t *dev); -extern void nv20_graph_takedown(drm_device_t *dev); -extern int nv20_graph_create_context(drm_device_t *dev, int channel); -extern void nv20_graph_destroy_context(drm_device_t *dev, int channel); -extern int nv20_graph_load_context(drm_device_t *dev, int channel); -extern int nv20_graph_save_context(drm_device_t *dev, int channel); +extern void nouveau_nv20_context_switch(struct drm_device *dev); +extern int nv20_graph_init(struct drm_device *dev); +extern void nv20_graph_takedown(struct drm_device *dev); +extern int nv20_graph_create_context(struct drm_device *dev, int channel); +extern void nv20_graph_destroy_context(struct drm_device *dev, int channel); +extern int nv20_graph_load_context(struct drm_device *dev, int channel); +extern int nv20_graph_save_context(struct drm_device *dev, int channel); /* nv30_graph.c */ -extern int nv30_graph_init(drm_device_t *dev); -extern void nv30_graph_takedown(drm_device_t *dev); -extern int nv30_graph_create_context(drm_device_t *, int channel); -extern void nv30_graph_destroy_context(drm_device_t *, int channel); -extern int nv30_graph_load_context(drm_device_t *, int channel); -extern int nv30_graph_save_context(drm_device_t *, int channel); +extern int nv30_graph_init(struct drm_device *dev); +extern void nv30_graph_takedown(struct drm_device *dev); +extern int nv30_graph_create_context(struct drm_device *, int channel); +extern void nv30_graph_destroy_context(struct drm_device *, int channel); +extern int nv30_graph_load_context(struct drm_device *, int channel); +extern int nv30_graph_save_context(struct drm_device *, int channel); /* nv40_graph.c */ -extern int nv40_graph_init(drm_device_t *); -extern void nv40_graph_takedown(drm_device_t *); -extern int nv40_graph_create_context(drm_device_t *, int channel); -extern void nv40_graph_destroy_context(drm_device_t *, int channel); -extern int nv40_graph_load_context(drm_device_t *, int channel); -extern int nv40_graph_save_context(drm_device_t *, int channel); +extern int nv40_graph_init(struct drm_device *); +extern void nv40_graph_takedown(struct drm_device *); +extern int nv40_graph_create_context(struct drm_device *, int channel); +extern void nv40_graph_destroy_context(struct drm_device *, int channel); +extern int nv40_graph_load_context(struct drm_device *, int channel); +extern int nv40_graph_save_context(struct drm_device *, int channel); /* nv50_graph.c */ -extern int nv50_graph_init(drm_device_t *); -extern void nv50_graph_takedown(drm_device_t *); -extern int nv50_graph_create_context(drm_device_t *, int channel); -extern void nv50_graph_destroy_context(drm_device_t *, int channel); -extern int nv50_graph_load_context(drm_device_t *, int channel); -extern int nv50_graph_save_context(drm_device_t *, int channel); +extern int nv50_graph_init(struct drm_device *); +extern void nv50_graph_takedown(struct drm_device *); +extern int nv50_graph_create_context(struct drm_device *, int channel); +extern void nv50_graph_destroy_context(struct drm_device *, int channel); +extern int nv50_graph_load_context(struct drm_device *, int channel); +extern int nv50_graph_save_context(struct drm_device *, int channel); /* nv04_instmem.c */ -extern int nv04_instmem_init(drm_device_t *dev); -extern void nv04_instmem_takedown(drm_device_t *dev); -extern int nv04_instmem_populate(drm_device_t*, nouveau_gpuobj_t*, +extern int nv04_instmem_init(struct drm_device *dev); +extern void nv04_instmem_takedown(struct drm_device *dev); +extern int nv04_instmem_populate(struct drm_device*, struct nouveau_gpuobj*, uint32_t *size); -extern void nv04_instmem_clear(drm_device_t*, nouveau_gpuobj_t*); -extern int nv04_instmem_bind(drm_device_t*, nouveau_gpuobj_t*); -extern int nv04_instmem_unbind(drm_device_t*, nouveau_gpuobj_t*); +extern void nv04_instmem_clear(struct drm_device*, struct nouveau_gpuobj*); +extern int nv04_instmem_bind(struct drm_device*, struct nouveau_gpuobj*); +extern int nv04_instmem_unbind(struct drm_device*, struct nouveau_gpuobj*); /* nv50_instmem.c */ -extern int nv50_instmem_init(drm_device_t *dev); -extern void nv50_instmem_takedown(drm_device_t *dev); -extern int nv50_instmem_populate(drm_device_t*, nouveau_gpuobj_t*, +extern int nv50_instmem_init(struct drm_device *dev); +extern void nv50_instmem_takedown(struct drm_device *dev); +extern int nv50_instmem_populate(struct drm_device*, struct nouveau_gpuobj*, uint32_t *size); -extern void nv50_instmem_clear(drm_device_t*, nouveau_gpuobj_t*); -extern int nv50_instmem_bind(drm_device_t*, nouveau_gpuobj_t*); -extern int nv50_instmem_unbind(drm_device_t*, nouveau_gpuobj_t*); +extern void nv50_instmem_clear(struct drm_device*, struct nouveau_gpuobj*); +extern int nv50_instmem_bind(struct drm_device*, struct nouveau_gpuobj*); +extern int nv50_instmem_unbind(struct drm_device*, struct nouveau_gpuobj*); /* nv04_mc.c */ -extern int nv04_mc_init(drm_device_t *dev); -extern void nv04_mc_takedown(drm_device_t *dev); +extern int nv04_mc_init(struct drm_device *dev); +extern void nv04_mc_takedown(struct drm_device *dev); /* nv40_mc.c */ -extern int nv40_mc_init(drm_device_t *dev); -extern void nv40_mc_takedown(drm_device_t *dev); +extern int nv40_mc_init(struct drm_device *dev); +extern void nv40_mc_takedown(struct drm_device *dev); /* nv50_mc.c */ -extern int nv50_mc_init(drm_device_t *dev); -extern void nv50_mc_takedown(drm_device_t *dev); +extern int nv50_mc_init(struct drm_device *dev); +extern void nv50_mc_takedown(struct drm_device *dev); /* nv04_timer.c */ -extern int nv04_timer_init(drm_device_t *dev); -extern void nv04_timer_takedown(drm_device_t *dev); +extern int nv04_timer_init(struct drm_device *dev); +extern void nv04_timer_takedown(struct drm_device *dev); extern long nouveau_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg); diff --git a/shared-core/nouveau_fifo.c b/shared-core/nouveau_fifo.c index bc3a9948..236dd4a1 100644 --- a/shared-core/nouveau_fifo.c +++ b/shared-core/nouveau_fifo.c @@ -29,9 +29,9 @@ /* returns the number of hw fifos */ -int nouveau_fifo_number(drm_device_t* dev) +int nouveau_fifo_number(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv=dev->dev_private; + struct drm_nouveau_private *dev_priv=dev->dev_private; switch(dev_priv->card_type) { case NV_03: @@ -47,9 +47,9 @@ int nouveau_fifo_number(drm_device_t* dev) } /* returns the size of fifo context */ -int nouveau_fifo_ctx_size(drm_device_t* dev) +int nouveau_fifo_ctx_size(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv=dev->dev_private; + struct drm_nouveau_private *dev_priv=dev->dev_private; if (dev_priv->card_type >= NV_40) return 128; @@ -68,9 +68,9 @@ int nouveau_fifo_ctx_size(drm_device_t* dev) * voir nv_driver.c : NVPreInit */ -static int nouveau_fifo_instmem_configure(drm_device_t *dev) +static int nouveau_fifo_instmem_configure(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; NV_WRITE(NV03_PFIFO_RAMHT, (0x03 << 24) /* search 128 */ | @@ -99,6 +99,7 @@ static int nouveau_fifo_instmem_configure(drm_device_t *dev) (1 << 16) /* 64 Bytes entry*/); /* XXX nvidia blob set bit 18, 21,23 for nv20 & nv30 */ break; + case NV_11: case NV_10: case NV_04: case NV_03: @@ -109,9 +110,9 @@ static int nouveau_fifo_instmem_configure(drm_device_t *dev) return 0; } -int nouveau_fifo_init(drm_device_t *dev) +int nouveau_fifo_init(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int ret; NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) & @@ -187,12 +188,12 @@ int nouveau_fifo_init(drm_device_t *dev) static int nouveau_fifo_cmdbuf_alloc(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; struct nouveau_config *config = &dev_priv->config; struct mem_block *cb; int cb_min_size = max(NV03_FIFO_SIZE,PAGE_SIZE); - nouveau_gpuobj_t *pushbuf = NULL; + struct nouveau_gpuobj *pushbuf = NULL; int ret; /* Defaults for unconfigured values */ @@ -213,11 +214,10 @@ nouveau_fifo_cmdbuf_alloc(struct drm_device *dev, int channel) DRM_DEBUG("Creating CB in AGP memory\n"); ret = nouveau_gpuobj_dma_new(dev, channel, NV_CLASS_DMA_IN_MEMORY, - cb->start - dev_priv->agp_phys, - cb->size, + cb->start, cb->size, NV_DMA_ACCESS_RO, NV_DMA_TARGET_AGP, &pushbuf); } else if ( cb->flags & NOUVEAU_MEM_PCI) { - DRM_DEBUG("Creating CB in PCI memory starting at virt 0x%08llx size %d\n", cb->start, cb->size); + DRM_DEBUG("Creating CB in PCI memory\n"); ret = nouveau_gpuobj_dma_new(dev, channel, NV_CLASS_DMA_IN_MEMORY, cb->start, @@ -226,7 +226,7 @@ nouveau_fifo_cmdbuf_alloc(struct drm_device *dev, int channel) } else if (dev_priv->card_type != NV_04) { ret = nouveau_gpuobj_dma_new (dev, channel, NV_CLASS_DMA_IN_MEMORY, - cb->start - drm_get_resource_start(dev, 1), + cb->start, cb->size, NV_DMA_ACCESS_RO, NV_DMA_TARGET_VIDMEM, &pushbuf); } else { @@ -236,7 +236,8 @@ nouveau_fifo_cmdbuf_alloc(struct drm_device *dev, int channel) */ ret = nouveau_gpuobj_dma_new (dev, channel, NV_CLASS_DMA_IN_MEMORY, - cb->start, cb->size, NV_DMA_ACCESS_RO, + cb->start + drm_get_resource_start(dev, 1), + cb->size, NV_DMA_ACCESS_RO, NV_DMA_TARGET_PCI, &pushbuf); } @@ -258,12 +259,12 @@ nouveau_fifo_cmdbuf_alloc(struct drm_device *dev, int channel) } /* allocates and initializes a fifo for user space consumption */ -int nouveau_fifo_alloc(drm_device_t* dev, int *chan_ret, DRMFILE filp, +int nouveau_fifo_alloc(struct drm_device *dev, int *chan_ret, DRMFILE filp, uint32_t vram_handle, uint32_t tt_handle) { int ret; - drm_nouveau_private_t *dev_priv = dev->dev_private; - nouveau_engine_func_t *engine = &dev_priv->Engine; + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_engine_func *engine = &dev_priv->Engine; struct nouveau_fifo *chan; int channel; @@ -392,10 +393,10 @@ int nouveau_fifo_alloc(drm_device_t* dev, int *chan_ret, DRMFILE filp, } /* stops a fifo */ -void nouveau_fifo_free(drm_device_t* dev, int channel) +void nouveau_fifo_free(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; - nouveau_engine_func_t *engine = &dev_priv->Engine; + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_engine_func *engine = &dev_priv->Engine; struct nouveau_fifo *chan = dev_priv->fifos[channel]; if (!chan) { @@ -436,10 +437,10 @@ void nouveau_fifo_free(drm_device_t* dev, int channel) } /* cleanups all the fifos from filp */ -void nouveau_fifo_cleanup(drm_device_t* dev, DRMFILE filp) +void nouveau_fifo_cleanup(struct drm_device *dev, DRMFILE filp) { int i; - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; DRM_DEBUG("clearing FIFO enables from filp\n"); for(i=0;i<nouveau_fifo_number(dev);i++) @@ -448,9 +449,9 @@ void nouveau_fifo_cleanup(drm_device_t* dev, DRMFILE filp) } int -nouveau_fifo_owner(drm_device_t *dev, DRMFILE filp, int channel) +nouveau_fifo_owner(struct drm_device *dev, DRMFILE filp, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; if (channel >= nouveau_fifo_number(dev)) return 0; @@ -466,14 +467,19 @@ nouveau_fifo_owner(drm_device_t *dev, DRMFILE filp, int channel) static int nouveau_ioctl_fifo_alloc(DRM_IOCTL_ARGS) { DRM_DEVICE; - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct drm_nouveau_fifo_alloc init; + drm_map_list_t *entry; struct nouveau_fifo *chan; - drm_nouveau_fifo_alloc_t init; int res; - DRM_COPY_FROM_USER_IOCTL(init, (drm_nouveau_fifo_alloc_t __user *) data, + DRM_COPY_FROM_USER_IOCTL(init, + (struct drm_nouveau_fifo_alloc __user *) data, sizeof(init)); + if (init.fb_ctxdma_handle == ~0 || init.tt_ctxdma_handle == ~0) + return DRM_ERR(EINVAL); + res = nouveau_fifo_alloc(dev, &init.channel, filp, init.fb_ctxdma_handle, init.tt_ctxdma_handle); @@ -498,15 +504,20 @@ static int nouveau_ioctl_fifo_alloc(DRM_IOCTL_ARGS) if (res != 0) return res; + entry = drm_find_matching_map(dev, chan->regs); + if (!entry) + return DRM_ERR(EINVAL); + init.ctrl = entry->user_token; + /* pass back FIFO map info to the caller */ - init.cmdbuf = chan->pushbuf_mem->start; + init.cmdbuf = chan->pushbuf_mem->map_handle; init.cmdbuf_size = chan->pushbuf_mem->size; /* and the notifier block */ - init.notifier = chan->notifier_block->start; + init.notifier = chan->notifier_block->map_handle; init.notifier_size = chan->notifier_block->size; - DRM_COPY_TO_USER_IOCTL((drm_nouveau_fifo_alloc_t __user *)data, + DRM_COPY_TO_USER_IOCTL((struct drm_nouveau_fifo_alloc __user *)data, init, sizeof(init)); return 0; } diff --git a/shared-core/nouveau_irq.c b/shared-core/nouveau_irq.c index b4102dd8..84319219 100644 --- a/shared-core/nouveau_irq.c +++ b/shared-core/nouveau_irq.c @@ -36,9 +36,9 @@ #include "nouveau_drv.h" #include "nouveau_reg.h" -void nouveau_irq_preinstall(drm_device_t *dev) +void nouveau_irq_preinstall(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; DRM_DEBUG("IRQ: preinst\n"); @@ -71,9 +71,9 @@ void nouveau_irq_preinstall(drm_device_t *dev) NV_WRITE(NV03_PMC_INTR_EN_0, 0); } -void nouveau_irq_postinstall(drm_device_t *dev) +void nouveau_irq_postinstall(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; if (!dev_priv) { DRM_ERROR("AIII, no dev_priv\n"); @@ -107,9 +107,9 @@ void nouveau_irq_postinstall(drm_device_t *dev) NV_WRITE(NV03_PMC_INTR_EN_0, NV_PMC_INTR_EN_0_MASTER_ENABLE); } -void nouveau_irq_uninstall(drm_device_t *dev) +void nouveau_irq_uninstall(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; if (!dev_priv) { DRM_ERROR("AIII, no dev_priv\n"); @@ -138,10 +138,10 @@ void nouveau_irq_uninstall(drm_device_t *dev) NV_WRITE(NV03_PMC_INTR_EN_0, 0); } -static void nouveau_fifo_irq_handler(drm_device_t *dev) +static void nouveau_fifo_irq_handler(struct drm_device *dev) { uint32_t status, chmode, chstat, channel; - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; status = NV_READ(NV03_PFIFO_INTR_0); if (!status) @@ -200,9 +200,9 @@ static void nouveau_fifo_irq_handler(drm_device_t *dev) } #if 0 -static void nouveau_nv04_context_switch(drm_device_t *dev) +static void nouveau_nv04_context_switch(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t channel,i; uint32_t max=0; NV_WRITE(NV04_PGRAPH_FIFO,0x0); @@ -247,9 +247,9 @@ static void nouveau_nv04_context_switch(drm_device_t *dev) #endif static void -nouveau_graph_dump_trap_info(drm_device_t *dev) +nouveau_graph_dump_trap_info(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t address; uint32_t channel, class; uint32_t method, subc, data; @@ -273,10 +273,10 @@ nouveau_graph_dump_trap_info(drm_device_t *dev) ); } -static void nouveau_pgraph_irq_handler(drm_device_t *dev) +static void nouveau_pgraph_irq_handler(struct drm_device *dev) { uint32_t status; - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; status = NV_READ(NV03_PGRAPH_INTR); if (!status) @@ -355,6 +355,7 @@ static void nouveau_pgraph_irq_handler(drm_device_t *dev) nouveau_nv04_context_switch(dev); break; case NV_10: + case NV_11: case NV_17: nouveau_nv10_context_switch(dev); break; @@ -379,9 +380,9 @@ static void nouveau_pgraph_irq_handler(drm_device_t *dev) NV_WRITE(NV03_PMC_INTR_0, NV_PMC_INTR_0_PGRAPH_PENDING); } -static void nouveau_crtc_irq_handler(drm_device_t *dev, int crtc) +static void nouveau_crtc_irq_handler(struct drm_device *dev, int crtc) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; if (crtc&1) { NV_WRITE(NV_CRTC0_INTSTAT, NV_CRTC_INTR_VBLANK); } @@ -393,8 +394,8 @@ static void nouveau_crtc_irq_handler(drm_device_t *dev, int crtc) irqreturn_t nouveau_irq_handler(DRM_IRQ_ARGS) { - drm_device_t *dev = (drm_device_t*)arg; - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_device *dev = (struct drm_device*)arg; + struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t status; status = NV_READ(NV03_PMC_INTR_0); diff --git a/shared-core/nouveau_mem.c b/shared-core/nouveau_mem.c index 79f94fd4..f09bcea7 100644 --- a/shared-core/nouveau_mem.c +++ b/shared-core/nouveau_mem.c @@ -208,7 +208,7 @@ void nouveau_mem_takedown(struct mem_block **heap) void nouveau_mem_close(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; nouveau_mem_takedown(&dev_priv->agp_heap); nouveau_mem_takedown(&dev_priv->fb_heap); if ( dev_priv->pci_heap ) @@ -220,7 +220,7 @@ void nouveau_mem_close(struct drm_device *dev) /* returns the amount of FB ram in bytes */ uint64_t nouveau_mem_fb_amount(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv=dev->dev_private; + struct drm_nouveau_private *dev_priv=dev->dev_private; switch(dev_priv->card_type) { case NV_03: @@ -253,6 +253,7 @@ uint64_t nouveau_mem_fb_amount(struct drm_device *dev) } break; case NV_10: + case NV_11: case NV_17: case NV_20: case NV_30: @@ -285,7 +286,7 @@ uint64_t nouveau_mem_fb_amount(struct drm_device *dev) int nouveau_mem_init(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t fb_size; drm_scatter_gather_t sgreq; dev_priv->agp_phys=0; @@ -339,16 +340,18 @@ int nouveau_mem_init(struct drm_device *dev) } if (nouveau_mem_init_heap(&dev_priv->agp_heap, - info.aperture_base, - info.aperture_size)) + 0, info.aperture_size)) goto no_agp; dev_priv->agp_phys = info.aperture_base; dev_priv->agp_available_size = info.aperture_size; + goto have_agp; } -goto have_agp; no_agp: + + if ( dev_priv->card_type >= NV_50 ) goto no_pci; + dev_priv->pci_heap = NULL; DRM_DEBUG("Allocating sg memory for PCI DMA\n"); if ( drm_sg_alloc(dev, &sgreq) ) @@ -357,8 +360,8 @@ no_agp: goto no_pci; } - DRM_DEBUG("Got %d KiB\n", (dev->sg->pages * PAGE_SIZE) >> 10); - if ( nouveau_mem_init_heap(&dev_priv->pci_heap, dev->sg->virtual, dev->sg->pages * PAGE_SIZE)) + if ( nouveau_mem_init_heap(&dev_priv->pci_heap, 0, + dev->sg->pages * PAGE_SIZE)) { DRM_ERROR("Unable to initialize pci_heap!"); goto no_pci; @@ -385,18 +388,13 @@ have_agp: /* On cards with > 256Mb, you can't map everything. * So we create a second FB heap for that type of memory */ if (nouveau_mem_init_heap(&dev_priv->fb_heap, - drm_get_resource_start(dev,1), - 256*1024*1024)) + 0, 256*1024*1024)) return DRM_ERR(ENOMEM); if (nouveau_mem_init_heap(&dev_priv->fb_nomap_heap, - drm_get_resource_start(dev,1) + - 256*1024*1024, - fb_size-256*1024*1024)) + 256*1024*1024, fb_size-256*1024*1024)) return DRM_ERR(ENOMEM); } else { - if (nouveau_mem_init_heap(&dev_priv->fb_heap, - drm_get_resource_start(dev,1), - fb_size)) + if (nouveau_mem_init_heap(&dev_priv->fb_heap, 0, fb_size)) return DRM_ERR(ENOMEM); dev_priv->fb_nomap_heap=NULL; } @@ -408,7 +406,7 @@ struct mem_block* nouveau_mem_alloc(struct drm_device *dev, int alignment, uint6 { struct mem_block *block; int type; - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; /* * Make things easier on ourselves: all allocations are page-aligned. @@ -471,23 +469,32 @@ alloc_ok: if (flags&NOUVEAU_MEM_MAPPED) { + drm_map_list_t *entry; int ret = 0; block->flags|=NOUVEAU_MEM_MAPPED; if (type == NOUVEAU_MEM_AGP) - ret = drm_addmap(dev, block->start - dev->agp->base, block->size, - _DRM_AGP, 0, &block->map); - else if (type == NOUVEAU_MEM_FB) ret = drm_addmap(dev, block->start, block->size, - _DRM_FRAME_BUFFER, 0, &block->map); + _DRM_AGP, 0, &block->map); + else if (type == NOUVEAU_MEM_FB) + ret = drm_addmap(dev, block->start + dev_priv->fb_phys, + block->size, _DRM_FRAME_BUFFER, + 0, &block->map); else if (type == NOUVEAU_MEM_PCI) - ret = drm_addmap(dev, block->start - (unsigned long int)dev->sg->virtual, block->size, - _DRM_SCATTER_GATHER, 0, &block->map); + ret = drm_addmap(dev, block->start, block->size, + _DRM_SCATTER_GATHER, 0, &block->map); if (ret) { nouveau_mem_free_block(block); return NULL; } + + entry = drm_find_matching_map(dev, block->map); + if (!entry) { + nouveau_mem_free_block(block); + return NULL; + } + block->map_handle = entry->user_token; } DRM_INFO("allocated 0x%llx\n", block->start); @@ -509,8 +516,8 @@ void nouveau_mem_free(struct drm_device* dev, struct mem_block* block) int nouveau_ioctl_mem_alloc(DRM_IOCTL_ARGS) { DRM_DEVICE; - drm_nouveau_private_t *dev_priv = dev->dev_private; - drm_nouveau_mem_alloc_t alloc; + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct drm_nouveau_mem_alloc alloc; struct mem_block *block; if (!dev_priv) { @@ -518,16 +525,19 @@ int nouveau_ioctl_mem_alloc(DRM_IOCTL_ARGS) return DRM_ERR(EINVAL); } - DRM_COPY_FROM_USER_IOCTL(alloc, (drm_nouveau_mem_alloc_t __user *) data, + DRM_COPY_FROM_USER_IOCTL(alloc, + (struct drm_nouveau_mem_alloc_t __user *) data, sizeof(alloc)); block=nouveau_mem_alloc(dev, alloc.alignment, alloc.size, alloc.flags, filp); if (!block) return DRM_ERR(ENOMEM); - alloc.region_offset=block->start; + alloc.map_handle=block->map_handle; + alloc.offset=block->start; alloc.flags=block->flags; - DRM_COPY_TO_USER_IOCTL((drm_nouveau_mem_alloc_t __user *) data, alloc, sizeof(alloc)); + DRM_COPY_TO_USER_IOCTL((struct drm_nouveau_mem_alloc __user *)data, + alloc, sizeof(alloc)); return 0; } @@ -535,18 +545,21 @@ int nouveau_ioctl_mem_alloc(DRM_IOCTL_ARGS) int nouveau_ioctl_mem_free(DRM_IOCTL_ARGS) { DRM_DEVICE; - drm_nouveau_private_t *dev_priv = dev->dev_private; - drm_nouveau_mem_free_t memfree; + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct drm_nouveau_mem_free memfree; struct mem_block *block; - DRM_COPY_FROM_USER_IOCTL(memfree, (drm_nouveau_mem_free_t __user *) data, + DRM_COPY_FROM_USER_IOCTL(memfree, + (struct drm_nouveau_mem_free_t __user *)data, sizeof(memfree)); block=NULL; if (memfree.flags&NOUVEAU_MEM_FB) - block = find_block(dev_priv->fb_heap, memfree.region_offset); + block = find_block(dev_priv->fb_heap, memfree.offset); else if (memfree.flags&NOUVEAU_MEM_AGP) - block = find_block(dev_priv->agp_heap, memfree.region_offset); + block = find_block(dev_priv->agp_heap, memfree.offset); + else if (memfree.flags&NOUVEAU_MEM_PCI) + block = find_block(dev_priv->pci_heap, memfree.offset); if (!block) return DRM_ERR(EFAULT); if (block->filp != filp) diff --git a/shared-core/nouveau_notifier.c b/shared-core/nouveau_notifier.c index 30216293..36dba654 100644 --- a/shared-core/nouveau_notifier.c +++ b/shared-core/nouveau_notifier.c @@ -30,9 +30,9 @@ #include "nouveau_drv.h" int -nouveau_notifier_init_channel(drm_device_t *dev, int channel, DRMFILE filp) +nouveau_notifier_init_channel(struct drm_device *dev, int channel, DRMFILE filp) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; int flags, ret; @@ -56,9 +56,9 @@ nouveau_notifier_init_channel(drm_device_t *dev, int channel, DRMFILE filp) } void -nouveau_notifier_takedown_channel(drm_device_t *dev, int channel) +nouveau_notifier_takedown_channel(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; if (chan->notifier_block) { @@ -70,12 +70,12 @@ nouveau_notifier_takedown_channel(drm_device_t *dev, int channel) } int -nouveau_notifier_alloc(drm_device_t *dev, int channel, uint32_t handle, +nouveau_notifier_alloc(struct drm_device *dev, int channel, uint32_t handle, int count, uint32_t *b_offset) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; - nouveau_gpuobj_t *nobj = NULL; + struct nouveau_gpuobj *nobj = NULL; struct mem_block *mem; uint32_t offset; int target, ret; @@ -95,10 +95,8 @@ nouveau_notifier_alloc(drm_device_t *dev, int channel, uint32_t handle, offset = chan->notifier_block->start + mem->start; if (chan->notifier_block->flags & NOUVEAU_MEM_FB) { - offset -= drm_get_resource_start(dev, 1); target = NV_DMA_TARGET_VIDMEM; } else if (chan->notifier_block->flags & NOUVEAU_MEM_AGP) { - offset -= dev_priv->agp_phys; target = NV_DMA_TARGET_AGP; } else { DRM_ERROR("Bad DMA target, flags 0x%08x!\n", @@ -129,11 +127,12 @@ int nouveau_ioctl_notifier_alloc(DRM_IOCTL_ARGS) { DRM_DEVICE; - drm_nouveau_notifier_alloc_t na; + struct drm_nouveau_notifier_alloc na; int ret; - DRM_COPY_FROM_USER_IOCTL(na, (drm_nouveau_notifier_alloc_t __user*)data, - sizeof(na)); + DRM_COPY_FROM_USER_IOCTL(na, + (struct drm_nouveau_notifier_alloc __user*)data, + sizeof(na)); if (!nouveau_fifo_owner(dev, filp, na.channel)) { DRM_ERROR("pid %d doesn't own channel %d\n", @@ -146,7 +145,7 @@ nouveau_ioctl_notifier_alloc(DRM_IOCTL_ARGS) if (ret) return ret; - DRM_COPY_TO_USER_IOCTL((drm_nouveau_notifier_alloc_t __user*)data, + DRM_COPY_TO_USER_IOCTL((struct drm_nouveau_notifier_alloc __user*)data, na, sizeof(na)); return 0; } diff --git a/shared-core/nouveau_object.c b/shared-core/nouveau_object.c index dcb29b40..146c4f1c 100644 --- a/shared-core/nouveau_object.c +++ b/shared-core/nouveau_object.c @@ -66,9 +66,9 @@ is given as: */ static uint32_t -nouveau_ramht_hash_handle(drm_device_t *dev, int channel, uint32_t handle) +nouveau_ramht_hash_handle(struct drm_device *dev, int channel, uint32_t handle) { - drm_nouveau_private_t *dev_priv=dev->dev_private; + struct drm_nouveau_private *dev_priv=dev->dev_private; uint32_t hash = 0; int i; @@ -85,10 +85,10 @@ nouveau_ramht_hash_handle(drm_device_t *dev, int channel, uint32_t handle) } static int -nouveau_ramht_entry_valid(drm_device_t *dev, nouveau_gpuobj_t *ramht, +nouveau_ramht_entry_valid(struct drm_device *dev, struct nouveau_gpuobj *ramht, uint32_t offset) { - drm_nouveau_private_t *dev_priv=dev->dev_private; + struct drm_nouveau_private *dev_priv=dev->dev_private; uint32_t ctx = INSTANCE_RD(ramht, (offset + 4)/4); if (dev_priv->card_type < NV_40) @@ -97,12 +97,12 @@ nouveau_ramht_entry_valid(drm_device_t *dev, nouveau_gpuobj_t *ramht, } static int -nouveau_ramht_insert(drm_device_t* dev, nouveau_gpuobj_ref_t *ref) +nouveau_ramht_insert(struct drm_device *dev, struct nouveau_gpuobj_ref *ref) { - drm_nouveau_private_t *dev_priv=dev->dev_private; + struct drm_nouveau_private *dev_priv=dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[ref->channel]; - nouveau_gpuobj_t *ramht = chan->ramht ? chan->ramht->gpuobj : NULL; - nouveau_gpuobj_t *gpuobj = ref->gpuobj; + struct nouveau_gpuobj *ramht = chan->ramht ? chan->ramht->gpuobj : NULL; + struct nouveau_gpuobj *gpuobj = ref->gpuobj; uint32_t ctx, co, ho; if (!ramht) { @@ -146,11 +146,11 @@ nouveau_ramht_insert(drm_device_t* dev, nouveau_gpuobj_ref_t *ref) } static void -nouveau_ramht_remove(drm_device_t* dev, nouveau_gpuobj_ref_t *ref) +nouveau_ramht_remove(struct drm_device *dev, struct nouveau_gpuobj_ref *ref) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[ref->channel]; - nouveau_gpuobj_t *ramht = chan->ramht ? chan->ramht->gpuobj : NULL; + struct nouveau_gpuobj *ramht = chan->ramht ? chan->ramht->gpuobj : NULL; uint32_t co, ho; if (!ramht) { @@ -180,13 +180,13 @@ nouveau_ramht_remove(drm_device_t* dev, nouveau_gpuobj_ref_t *ref) } int -nouveau_gpuobj_new(drm_device_t *dev, int channel, int size, int align, - uint32_t flags, nouveau_gpuobj_t **gpuobj_ret) +nouveau_gpuobj_new(struct drm_device *dev, int channel, int size, int align, + uint32_t flags, struct nouveau_gpuobj **gpuobj_ret) { - drm_nouveau_private_t *dev_priv = dev->dev_private; - nouveau_engine_func_t *engine = &dev_priv->Engine; + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_engine_func *engine = &dev_priv->Engine; struct nouveau_fifo *chan = NULL; - nouveau_gpuobj_t *gpuobj; + struct nouveau_gpuobj *gpuobj; struct mem_block *pramin = NULL; int ret; @@ -270,10 +270,10 @@ nouveau_gpuobj_new(drm_device_t *dev, int channel, int size, int align, return 0; } -void nouveau_gpuobj_takedown(drm_device_t *dev) +void nouveau_gpuobj_takedown(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; - nouveau_gpuobj_t *gpuobj = NULL; + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_gpuobj *gpuobj = NULL; DRM_DEBUG("\n"); @@ -285,11 +285,11 @@ void nouveau_gpuobj_takedown(drm_device_t *dev) } } -int nouveau_gpuobj_del(drm_device_t *dev, nouveau_gpuobj_t **pgpuobj) +int nouveau_gpuobj_del(struct drm_device *dev, struct nouveau_gpuobj **pgpuobj) { - drm_nouveau_private_t *dev_priv = dev->dev_private; - nouveau_engine_func_t *engine = &dev_priv->Engine; - nouveau_gpuobj_t *gpuobj; + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_engine_func *engine = &dev_priv->Engine; + struct nouveau_gpuobj *gpuobj; DRM_DEBUG("gpuobj %p\n", pgpuobj ? *pgpuobj : NULL); @@ -325,11 +325,11 @@ int nouveau_gpuobj_del(drm_device_t *dev, nouveau_gpuobj_t **pgpuobj) } static int -nouveau_gpuobj_instance_get(drm_device_t *dev, int channel, - nouveau_gpuobj_t *gpuobj, uint32_t *inst) +nouveau_gpuobj_instance_get(struct drm_device *dev, int channel, + struct nouveau_gpuobj *gpuobj, uint32_t *inst) { - drm_nouveau_private_t *dev_priv = dev->dev_private; - nouveau_gpuobj_t *cpramin; + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_gpuobj *cpramin; /* <NV50 use PRAMIN address everywhere */ if (dev_priv->card_type < NV_50) { @@ -357,12 +357,12 @@ nouveau_gpuobj_instance_get(drm_device_t *dev, int channel, DRM_ERROR("AII, no VRAM backing gpuobj\n"); return DRM_ERR(EINVAL); } - *inst = gpuobj->im_backing->start - dev_priv->fb_phys; + *inst = gpuobj->im_backing->start; return 0; } else { /* ...from local heap */ cpramin = dev_priv->fifos[gpuobj->im_channel]->ramin->gpuobj; - *inst = (cpramin->im_backing->start - dev_priv->fb_phys) + + *inst = cpramin->im_backing->start + (gpuobj->im_pramin->start - cpramin->im_pramin->start); return 0; } @@ -371,12 +371,12 @@ nouveau_gpuobj_instance_get(drm_device_t *dev, int channel, } int -nouveau_gpuobj_ref_add(drm_device_t *dev, int channel, uint32_t handle, - nouveau_gpuobj_t *gpuobj, nouveau_gpuobj_ref_t **ref_ret) +nouveau_gpuobj_ref_add(struct drm_device *dev, int channel, uint32_t handle, + struct nouveau_gpuobj *gpuobj, struct nouveau_gpuobj_ref **ref_ret) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = NULL; - nouveau_gpuobj_ref_t *ref; + struct nouveau_gpuobj_ref *ref; uint32_t instance; int ret; @@ -424,9 +424,9 @@ nouveau_gpuobj_ref_add(drm_device_t *dev, int channel, uint32_t handle, return 0; } -int nouveau_gpuobj_ref_del(drm_device_t *dev, nouveau_gpuobj_ref_t **pref) +int nouveau_gpuobj_ref_del(struct drm_device *dev, struct nouveau_gpuobj_ref **pref) { - nouveau_gpuobj_ref_t *ref; + struct nouveau_gpuobj_ref *ref; DRM_DEBUG("ref %p\n", pref ? *pref : NULL); @@ -452,11 +452,11 @@ int nouveau_gpuobj_ref_del(drm_device_t *dev, nouveau_gpuobj_ref_t **pref) } int -nouveau_gpuobj_new_ref(drm_device_t *dev, int oc, int rc, uint32_t handle, +nouveau_gpuobj_new_ref(struct drm_device *dev, int oc, int rc, uint32_t handle, int size, int align, uint32_t flags, - nouveau_gpuobj_ref_t **ref) + struct nouveau_gpuobj_ref **ref) { - nouveau_gpuobj_t *gpuobj = NULL; + struct nouveau_gpuobj *gpuobj = NULL; int ret; if ((ret = nouveau_gpuobj_new(dev, oc, size, align, flags, &gpuobj))) @@ -470,13 +470,33 @@ nouveau_gpuobj_new_ref(drm_device_t *dev, int oc, int rc, uint32_t handle, return 0; } +static int +nouveau_gpuobj_ref_find(struct drm_device *dev, int channel, uint32_t handle, + struct nouveau_gpuobj_ref **ref_ret) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_fifo *chan = dev_priv->fifos[channel]; + struct nouveau_gpuobj_ref *ref = chan->ramht_refs; + + while (ref) { + if (ref->handle == handle) { + if (ref_ret) + *ref_ret = ref; + return 0; + } + ref = ref->next; + } + + return DRM_ERR(EINVAL); +} + int -nouveau_gpuobj_new_fake(drm_device_t *dev, uint32_t offset, uint32_t size, - uint32_t flags, nouveau_gpuobj_t **pgpuobj, - nouveau_gpuobj_ref_t **pref) +nouveau_gpuobj_new_fake(struct drm_device *dev, uint32_t offset, uint32_t size, + uint32_t flags, struct nouveau_gpuobj **pgpuobj, + struct nouveau_gpuobj_ref **pref) { - drm_nouveau_private_t *dev_priv = dev->dev_private; - nouveau_gpuobj_t *gpuobj = NULL; + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_gpuobj *gpuobj = NULL; int i; DRM_DEBUG("offset=0x%08x size=0x%08x flags=0x%08x\n", @@ -517,9 +537,9 @@ nouveau_gpuobj_new_fake(drm_device_t *dev, uint32_t offset, uint32_t size, static int -nouveau_gpuobj_class_instmem_size(drm_device_t *dev, int class) +nouveau_gpuobj_class_instmem_size(struct drm_device *dev, int class) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; /*XXX: dodgy hack for now */ if (dev_priv->card_type >= NV_50) @@ -557,14 +577,19 @@ nouveau_gpuobj_class_instmem_size(drm_device_t *dev, int class) to it that can be used to set up context objects. */ int -nouveau_gpuobj_dma_new(drm_device_t *dev, int channel, int class, +nouveau_gpuobj_dma_new(struct drm_device *dev, int channel, int class, uint64_t offset, uint64_t size, int access, int target, - nouveau_gpuobj_t **gpuobj) + struct nouveau_gpuobj **gpuobj) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int ret; uint32_t is_scatter_gather = 0; + /* Total number of pages covered by the request. + */ + const unsigned int page_count = (size + PAGE_SIZE - 1) / PAGE_SIZE; + + DRM_DEBUG("ch%d class=0x%04x offset=0x%llx size=0x%llx\n", channel, class, offset, size); DRM_DEBUG("access=%d target=%d\n", access, target); @@ -584,7 +609,7 @@ nouveau_gpuobj_dma_new(drm_device_t *dev, int channel, int class, } ret = nouveau_gpuobj_new(dev, channel, - is_scatter_gather ? ((((size + PAGE_SIZE - 1) / PAGE_SIZE) << 2) + 12) : nouveau_gpuobj_class_instmem_size(dev, class), + is_scatter_gather ? ((page_count << 2) + 12) : nouveau_gpuobj_class_instmem_size(dev, class), 16, NVOBJ_FLAG_ZERO_ALLOC | NVOBJ_FLAG_ZERO_FREE, gpuobj); @@ -614,33 +639,54 @@ nouveau_gpuobj_dma_new(drm_device_t *dev, int channel, int class, } else { + /* Intial page entry in the scatter-gather area that + * corresponds to the base offset + */ + unsigned int idx = offset / PAGE_SIZE; + uint32_t instance_offset; - uint32_t bus_addr; - size = (uint32_t) size; + unsigned int i; + + if ((idx + page_count) > dev->sg->pages) { + DRM_ERROR("Requested page range exceedes " + "allocated scatter-gather range!"); + return DRM_ERR(E2BIG); + } - DRM_DEBUG("Creating PCI DMA object using virtual zone starting at 0x%08x, size %d\n", (uint32_t) offset, (uint32_t)size); + DRM_DEBUG("Creating PCI DMA object using virtual zone starting at %#llx, size %d\n", offset, (uint32_t)size); INSTANCE_WR(*gpuobj, 0, ((1<<12) | (0<<13) | (adjust << 20) | (access << 14) | (target << 16) | class)); - INSTANCE_WR(*gpuobj, 1, size-1); + INSTANCE_WR(*gpuobj, 1, (uint32_t) size-1); + /*write starting at the third dword*/ instance_offset = 2; /*for each PAGE, get its bus address, fill in the page table entry, and advance*/ - while ( size > 0 ) { - bus_addr = (uint32_t) page_address(vmalloc_to_page((void *) (uint32_t) offset)); - bus_addr |= (offset & ~PAGE_MASK); - bus_addr = virt_to_bus((void *)bus_addr); - frame = bus_addr & ~0x00000FFF; - INSTANCE_WR(*gpuobj, instance_offset, frame | pte_flags); - offset += PAGE_SIZE; - instance_offset ++; - size -= PAGE_SIZE; + for (i = 0; i < page_count; i++) { + if (dev->sg->busaddr[idx] == 0) { + dev->sg->busaddr[idx] = + pci_map_page(dev->pdev, + dev->sg->pagelist[idx], + 0, + DMA_31BIT_MASK, + DMA_BIDIRECTIONAL); + + if (dev->sg->busaddr[idx] == 0) { + return DRM_ERR(ENOMEM); + } } + frame = (uint32_t) dev->sg->busaddr[idx]; + INSTANCE_WR(*gpuobj, instance_offset, + frame | pte_flags); + + idx++; + instance_offset ++; + } } } else { INSTANCE_WR(*gpuobj, 0, 0x00190000 | class); @@ -706,10 +752,10 @@ nouveau_gpuobj_dma_new(drm_device_t *dev, int channel, int class, set to 0? */ int -nouveau_gpuobj_gr_new(drm_device_t *dev, int channel, int class, - nouveau_gpuobj_t **gpuobj) +nouveau_gpuobj_gr_new(struct drm_device *dev, int channel, int class, + struct nouveau_gpuobj **gpuobj) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int ret; DRM_DEBUG("ch%d class=0x%04x\n", channel, class); @@ -755,11 +801,11 @@ nouveau_gpuobj_gr_new(drm_device_t *dev, int channel, int class, } static int -nouveau_gpuobj_channel_init_pramin(drm_device_t *dev, int channel) +nouveau_gpuobj_channel_init_pramin(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; - nouveau_gpuobj_t *pramin = NULL; + struct nouveau_gpuobj *pramin = NULL; int size, base, ret; DRM_DEBUG("ch%d\n", channel); @@ -805,12 +851,12 @@ nouveau_gpuobj_channel_init_pramin(drm_device_t *dev, int channel) } int -nouveau_gpuobj_channel_init(drm_device_t *dev, int channel, +nouveau_gpuobj_channel_init(struct drm_device *dev, int channel, uint32_t vram_h, uint32_t tt_h) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; - nouveau_gpuobj_t *vram = NULL, *tt = NULL; + struct nouveau_gpuobj *vram = NULL, *tt = NULL; int ret; DRM_DEBUG("ch%d vram=0x%08x tt=0x%08x\n", channel, vram_h, tt_h); @@ -869,14 +915,16 @@ nouveau_gpuobj_channel_init(drm_device_t *dev, int channel, return ret; } } - else { + else if ( dev_priv->pci_heap) { + if (dev_priv -> card_type >= NV_50 ) return 0; /*no PCIGART for NV50*/ + /*PCI*/ if((ret = nouveau_gpuobj_dma_new(dev, channel, NV_CLASS_DMA_IN_MEMORY, - (unsigned int) dev->sg->virtual, dev->sg->pages * PAGE_SIZE, + 0, dev->sg->pages * PAGE_SIZE, NV_DMA_ACCESS_RW, NV_DMA_TARGET_PCI_NONLINEAR, &tt))) { DRM_ERROR("Error creating PCI TT ctxdma: %d\n", DRM_ERR(ENOMEM)); - return DRM_ERR(ENOMEM); + return 0; //this is noncritical } ret = nouveau_gpuobj_ref_add(dev, channel, tt_h, tt, NULL); @@ -889,11 +937,11 @@ nouveau_gpuobj_channel_init(drm_device_t *dev, int channel, } void -nouveau_gpuobj_channel_takedown(drm_device_t *dev, int channel) +nouveau_gpuobj_channel_takedown(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; - nouveau_gpuobj_ref_t *ref; + struct nouveau_gpuobj_ref *ref; DRM_DEBUG("ch%d\n", channel); @@ -913,12 +961,13 @@ nouveau_gpuobj_channel_takedown(drm_device_t *dev, int channel) int nouveau_ioctl_grobj_alloc(DRM_IOCTL_ARGS) { DRM_DEVICE; - drm_nouveau_grobj_alloc_t init; - nouveau_gpuobj_t *gr = NULL; + struct drm_nouveau_grobj_alloc init; + struct nouveau_gpuobj *gr = NULL; int ret; - DRM_COPY_FROM_USER_IOCTL(init, (drm_nouveau_grobj_alloc_t __user *) - data, sizeof(init)); + DRM_COPY_FROM_USER_IOCTL(init, + (struct drm_nouveau_grobj_alloc_t __user*)data, + sizeof(init)); if (!nouveau_fifo_owner(dev, filp, init.channel)) { DRM_ERROR("pid %d doesn't own channel %d\n", @@ -927,7 +976,11 @@ int nouveau_ioctl_grobj_alloc(DRM_IOCTL_ARGS) } //FIXME: check args, only allow trusted objects to be created - //FIXME: check for pre-existing handle + + if (init.handle == ~0) + return DRM_ERR(EINVAL); + if (nouveau_gpuobj_ref_find(dev, init.channel, init.handle, NULL) == 0) + return DRM_ERR(EEXIST); if ((ret = nouveau_gpuobj_gr_new(dev, init.channel, init.class, &gr))) { DRM_ERROR("Error creating gr object: %d (%d/0x%08x)\n", diff --git a/shared-core/nouveau_state.c b/shared-core/nouveau_state.c index 14b33a4a..69e9c221 100644 --- a/shared-core/nouveau_state.c +++ b/shared-core/nouveau_state.c @@ -28,9 +28,9 @@ #include "nouveau_drv.h" #include "nouveau_drm.h" -static int nouveau_init_card_mappings(drm_device_t *dev) +static int nouveau_init_card_mappings(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int ret; /* resource 0 is mmio regs */ @@ -86,11 +86,11 @@ static int nouveau_init_card_mappings(drm_device_t *dev) return 0; } -static int nouveau_stub_init(drm_device_t *dev) { return 0; } -static void nouveau_stub_takedown(drm_device_t *dev) {} -static int nouveau_init_engine_ptrs(drm_device_t *dev) +static int nouveau_stub_init(struct drm_device *dev) { return 0; } +static void nouveau_stub_takedown(struct drm_device *dev) {} +static int nouveau_init_engine_ptrs(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_engine_func *engine = &dev_priv->Engine; switch (dev_priv->chipset & 0xf0) { @@ -259,9 +259,9 @@ static int nouveau_init_engine_ptrs(drm_device_t *dev) return 0; } -static int nouveau_card_init(drm_device_t *dev) +static int nouveau_card_init(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_engine_func *engine; int ret; @@ -321,10 +321,10 @@ static int nouveau_card_init(drm_device_t *dev) return 0; } -static void nouveau_card_takedown(drm_device_t *dev) +static void nouveau_card_takedown(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; - nouveau_engine_func_t *engine = &dev_priv->Engine; + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_engine_func *engine = &dev_priv->Engine; if (dev_priv->init_state != NOUVEAU_CARD_INIT_DOWN) { engine->fifo.takedown(dev); @@ -341,9 +341,9 @@ static void nouveau_card_takedown(drm_device_t *dev) } /* here a client dies, release the stuff that was allocated for its filp */ -void nouveau_preclose(drm_device_t * dev, DRMFILE filp) +void nouveau_preclose(struct drm_device *dev, DRMFILE filp) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; nouveau_fifo_cleanup(dev, filp); nouveau_mem_release(filp,dev_priv->fb_heap); @@ -367,7 +367,7 @@ int nouveau_firstopen(struct drm_device *dev) int nouveau_load(struct drm_device *dev, unsigned long flags) { - drm_nouveau_private_t *dev_priv; + struct drm_nouveau_private *dev_priv; if (flags==NV_UNKNOWN) return DRM_ERR(EINVAL); @@ -395,7 +395,7 @@ int nouveau_load(struct drm_device *dev, unsigned long flags) void nouveau_lastclose(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; nouveau_card_takedown(dev); @@ -416,11 +416,12 @@ int nouveau_unload(struct drm_device *dev) int nouveau_ioctl_getparam(DRM_IOCTL_ARGS) { DRM_DEVICE; - drm_nouveau_private_t *dev_priv = dev->dev_private; - drm_nouveau_getparam_t getparam; + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct drm_nouveau_getparam getparam; - DRM_COPY_FROM_USER_IOCTL(getparam, (drm_nouveau_getparam_t __user *)data, - sizeof(getparam)); + DRM_COPY_FROM_USER_IOCTL(getparam, + (struct drm_nouveau_getparam __user *)data, + sizeof(getparam)); switch (getparam.param) { case NOUVEAU_GETPARAM_PCI_VENDOR: @@ -445,11 +446,11 @@ int nouveau_ioctl_getparam(DRM_IOCTL_ARGS) break; case NOUVEAU_GETPARAM_PCI_PHYSICAL: if ( dev -> sg ) - getparam.value=dev->sg->virtual; + getparam.value=(uint64_t) dev->sg->virtual; else { DRM_ERROR("Requested PCIGART address, while no PCIGART was created\n"); - DRM_ERR(EINVAL); + return DRM_ERR(EINVAL); } break; case NOUVEAU_GETPARAM_FB_SIZE: @@ -463,19 +464,20 @@ int nouveau_ioctl_getparam(DRM_IOCTL_ARGS) return DRM_ERR(EINVAL); } - DRM_COPY_TO_USER_IOCTL((drm_nouveau_getparam_t __user *)data, getparam, - sizeof(getparam)); + DRM_COPY_TO_USER_IOCTL((struct drm_nouveau_getparam __user *)data, + getparam, sizeof(getparam)); return 0; } int nouveau_ioctl_setparam(DRM_IOCTL_ARGS) { DRM_DEVICE; - drm_nouveau_private_t *dev_priv = dev->dev_private; - drm_nouveau_setparam_t setparam; + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct drm_nouveau_setparam setparam; - DRM_COPY_FROM_USER_IOCTL(setparam, (drm_nouveau_setparam_t __user *)data, - sizeof(setparam)); + DRM_COPY_FROM_USER_IOCTL(setparam, + (struct drm_nouveau_setparam __user *)data, + sizeof(setparam)); switch (setparam.param) { case NOUVEAU_SETPARAM_CMDBUF_LOCATION: @@ -506,7 +508,7 @@ int nouveau_ioctl_setparam(DRM_IOCTL_ARGS) /* waits for idle */ void nouveau_wait_for_idle(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv=dev->dev_private; + struct drm_nouveau_private *dev_priv=dev->dev_private; switch(dev_priv->card_type) { case NV_03: diff --git a/shared-core/nv04_fb.c b/shared-core/nv04_fb.c index 06b1c994..534fb50b 100644 --- a/shared-core/nv04_fb.c +++ b/shared-core/nv04_fb.c @@ -4,9 +4,9 @@ #include "nouveau_drm.h" int -nv04_fb_init(drm_device_t *dev) +nv04_fb_init(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; /* This is what the DDX did for NV_ARCH_04, but a mmio-trace shows * nvidia reading PFB_CFG_0, then writing back its original value. @@ -18,7 +18,7 @@ nv04_fb_init(drm_device_t *dev) } void -nv04_fb_takedown(drm_device_t *dev) +nv04_fb_takedown(struct drm_device *dev) { } diff --git a/shared-core/nv04_fifo.c b/shared-core/nv04_fifo.c index e2e934d7..564efd0b 100644 --- a/shared-core/nv04_fifo.c +++ b/shared-core/nv04_fifo.c @@ -36,9 +36,9 @@ #define NV04_RAMFC__SIZE 32 int -nv04_fifo_create_context(drm_device_t *dev, int channel) +nv04_fifo_create_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; int ret; @@ -67,9 +67,9 @@ nv04_fifo_create_context(drm_device_t *dev, int channel) } void -nv04_fifo_destroy_context(drm_device_t *dev, int channel) +nv04_fifo_destroy_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; NV_WRITE(NV04_PFIFO_MODE, NV_READ(NV04_PFIFO_MODE)&~(1<<channel)); @@ -79,9 +79,9 @@ nv04_fifo_destroy_context(drm_device_t *dev, int channel) } int -nv04_fifo_load_context(drm_device_t *dev, int channel) +nv04_fifo_load_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; uint32_t tmp; @@ -107,9 +107,9 @@ nv04_fifo_load_context(drm_device_t *dev, int channel) } int -nv04_fifo_save_context(drm_device_t *dev, int channel) +nv04_fifo_save_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; uint32_t tmp; diff --git a/shared-core/nv04_graph.c b/shared-core/nv04_graph.c index df23d279..e35e3071 100644 --- a/shared-core/nv04_graph.c +++ b/shared-core/nv04_graph.c @@ -287,9 +287,9 @@ struct reg_interval }; -void nouveau_nv04_context_switch(drm_device_t *dev) +void nouveau_nv04_context_switch(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int channel, channel_old, i, j, index; channel=NV_READ(NV03_PFIFO_CACHE1_PUSH1)&(nouveau_fifo_number(dev)-1); @@ -336,8 +336,8 @@ void nouveau_nv04_context_switch(drm_device_t *dev) NV_WRITE(NV04_PGRAPH_FIFO,0x1); } -int nv04_graph_create_context(drm_device_t *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; +int nv04_graph_create_context(struct drm_device *dev, int channel) { + struct drm_nouveau_private *dev_priv = dev->dev_private; DRM_DEBUG("nv04_graph_context_create %d\n", channel); memset(dev_priv->fifos[channel]->pgraph_ctx, 0, sizeof(dev_priv->fifos[channel]->pgraph_ctx)); @@ -351,24 +351,24 @@ int nv04_graph_create_context(drm_device_t *dev, int channel) { return 0; } -void nv04_graph_destroy_context(drm_device_t *dev, int channel) +void nv04_graph_destroy_context(struct drm_device *dev, int channel) { } -int nv04_graph_load_context(drm_device_t *dev, int channel) +int nv04_graph_load_context(struct drm_device *dev, int channel) { DRM_ERROR("stub!\n"); return 0; } -int nv04_graph_save_context(drm_device_t *dev, int channel) +int nv04_graph_save_context(struct drm_device *dev, int channel) { DRM_ERROR("stub!\n"); return 0; } -int nv04_graph_init(drm_device_t *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; +int nv04_graph_init(struct drm_device *dev) { + struct drm_nouveau_private *dev_priv = dev->dev_private; int i,sum=0; NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) & @@ -406,7 +406,7 @@ int nv04_graph_init(drm_device_t *dev) { return 0; } -void nv04_graph_takedown(drm_device_t *dev) +void nv04_graph_takedown(struct drm_device *dev) { } diff --git a/shared-core/nv04_instmem.c b/shared-core/nv04_instmem.c index ac7d4347..7cf06269 100644 --- a/shared-core/nv04_instmem.c +++ b/shared-core/nv04_instmem.c @@ -5,7 +5,7 @@ static void nv04_instmem_determine_amount(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int i; /* Figure out how much instance memory we need */ @@ -35,7 +35,7 @@ nv04_instmem_determine_amount(struct drm_device *dev) static void nv04_instmem_configure_fixed_tables(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; /* FIFO hash table (RAMHT) * use 4k hash table at RAMIN+0x10000 @@ -70,6 +70,7 @@ nv04_instmem_configure_fixed_tables(struct drm_device *dev) case NV_30: case NV_20: case NV_17: + case NV_11: case NV_10: case NV_04: case NV_03: @@ -85,7 +86,7 @@ nv04_instmem_configure_fixed_tables(struct drm_device *dev) int nv04_instmem_init(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t offset; int ret = 0; @@ -114,15 +115,15 @@ int nv04_instmem_init(struct drm_device *dev) } void -nv04_instmem_takedown(drm_device_t *dev) +nv04_instmem_takedown(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; nouveau_gpuobj_del(dev, &dev_priv->ramht); } int -nv04_instmem_populate(drm_device_t *dev, nouveau_gpuobj_t *gpuobj, uint32_t *sz) +nv04_instmem_populate(struct drm_device *dev, struct nouveau_gpuobj *gpuobj, uint32_t *sz) { if (gpuobj->im_backing) return DRM_ERR(EINVAL); @@ -131,9 +132,9 @@ nv04_instmem_populate(drm_device_t *dev, nouveau_gpuobj_t *gpuobj, uint32_t *sz) } void -nv04_instmem_clear(drm_device_t *dev, nouveau_gpuobj_t *gpuobj) +nv04_instmem_clear(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; if (gpuobj && gpuobj->im_backing) { if (gpuobj->im_bound) @@ -144,7 +145,7 @@ nv04_instmem_clear(drm_device_t *dev, nouveau_gpuobj_t *gpuobj) } int -nv04_instmem_bind(drm_device_t *dev, nouveau_gpuobj_t *gpuobj) +nv04_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) { if (!gpuobj->im_pramin || gpuobj->im_bound) return DRM_ERR(EINVAL); @@ -154,7 +155,7 @@ nv04_instmem_bind(drm_device_t *dev, nouveau_gpuobj_t *gpuobj) } int -nv04_instmem_unbind(drm_device_t *dev, nouveau_gpuobj_t *gpuobj) +nv04_instmem_unbind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) { if (gpuobj->im_bound == 0) return DRM_ERR(EINVAL); diff --git a/shared-core/nv04_mc.c b/shared-core/nv04_mc.c index 0e23efb2..1d998851 100644 --- a/shared-core/nv04_mc.c +++ b/shared-core/nv04_mc.c @@ -4,9 +4,9 @@ #include "nouveau_drm.h" int -nv04_mc_init(drm_device_t *dev) +nv04_mc_init(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; /* Power up everything, resetting each individual unit will * be done later if needed. @@ -19,7 +19,7 @@ nv04_mc_init(drm_device_t *dev) } void -nv04_mc_takedown(drm_device_t *dev) +nv04_mc_takedown(struct drm_device *dev) { } diff --git a/shared-core/nv04_timer.c b/shared-core/nv04_timer.c index a4b4e826..efe78da7 100644 --- a/shared-core/nv04_timer.c +++ b/shared-core/nv04_timer.c @@ -4,9 +4,9 @@ #include "nouveau_drm.h" int -nv04_timer_init(drm_device_t *dev) +nv04_timer_init(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; NV_WRITE(NV04_PTIMER_INTR_EN_0, 0x00000000); NV_WRITE(NV04_PTIMER_INTR_0, 0xFFFFFFFF); @@ -18,7 +18,7 @@ nv04_timer_init(drm_device_t *dev) } void -nv04_timer_takedown(drm_device_t *dev) +nv04_timer_takedown(struct drm_device *dev) { } diff --git a/shared-core/nv10_fb.c b/shared-core/nv10_fb.c index e8336a2d..7fff5b3f 100644 --- a/shared-core/nv10_fb.c +++ b/shared-core/nv10_fb.c @@ -4,9 +4,9 @@ #include "nouveau_drm.h" int -nv10_fb_init(drm_device_t *dev) +nv10_fb_init(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t fb_bar_size; int i; @@ -20,7 +20,7 @@ nv10_fb_init(drm_device_t *dev) } void -nv10_fb_takedown(drm_device_t *dev) +nv10_fb_takedown(struct drm_device *dev) { } diff --git a/shared-core/nv10_fifo.c b/shared-core/nv10_fifo.c index 2d8d5a0d..7b9c665b 100644 --- a/shared-core/nv10_fifo.c +++ b/shared-core/nv10_fifo.c @@ -37,9 +37,9 @@ #define NV10_RAMFC__SIZE ((dev_priv->chipset) >= 0x17 ? 64 : 32) int -nv10_fifo_create_context(drm_device_t *dev, int channel) +nv10_fifo_create_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; int ret; @@ -70,9 +70,9 @@ nv10_fifo_create_context(drm_device_t *dev, int channel) } void -nv10_fifo_destroy_context(drm_device_t *dev, int channel) +nv10_fifo_destroy_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; NV_WRITE(NV04_PFIFO_MODE, NV_READ(NV04_PFIFO_MODE)&~(1<<channel)); @@ -82,9 +82,9 @@ nv10_fifo_destroy_context(drm_device_t *dev, int channel) } int -nv10_fifo_load_context(drm_device_t *dev, int channel) +nv10_fifo_load_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; uint32_t tmp; @@ -124,9 +124,9 @@ nv10_fifo_load_context(drm_device_t *dev, int channel) } int -nv10_fifo_save_context(drm_device_t *dev, int channel) +nv10_fifo_save_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; uint32_t tmp; diff --git a/shared-core/nv10_graph.c b/shared-core/nv10_graph.c index c544afac..930fcbdf 100644 --- a/shared-core/nv10_graph.c +++ b/shared-core/nv10_graph.c @@ -28,8 +28,8 @@ #include "nouveau_drv.h" -static void nv10_praph_pipe(drm_device_t *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; +static void nv10_praph_pipe(struct drm_device *dev) { + struct drm_nouveau_private *dev_priv = dev->dev_private; int i; nouveau_wait_for_idle(dev); @@ -527,9 +527,9 @@ NV10_PGRAPH_DEBUG_4, 0x00400a04, }; -static int nv10_graph_ctx_regs_find_offset(drm_device_t *dev, int reg) +static int nv10_graph_ctx_regs_find_offset(struct drm_device *dev, int reg) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int i, j; for (i = 0; i < sizeof(nv10_graph_ctx_regs)/sizeof(nv10_graph_ctx_regs[0]); i++) { if (nv10_graph_ctx_regs[i] == reg) @@ -544,9 +544,9 @@ static int nv10_graph_ctx_regs_find_offset(drm_device_t *dev, int reg) return -1; } -static void restore_ctx_regs(drm_device_t *dev, int channel) +static void restore_ctx_regs(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *fifo = dev_priv->fifos[channel]; int i, j; for (i = 0; i < sizeof(nv10_graph_ctx_regs)/sizeof(nv10_graph_ctx_regs[0]); i++) @@ -558,9 +558,9 @@ static void restore_ctx_regs(drm_device_t *dev, int channel) nouveau_wait_for_idle(dev); } -void nouveau_nv10_context_switch(drm_device_t *dev) +void nouveau_nv10_context_switch(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int channel, channel_old, i, j; channel=NV_READ(NV03_PFIFO_CACHE1_PUSH1)&(nouveau_fifo_number(dev)-1); @@ -611,8 +611,8 @@ void nouveau_nv10_context_switch(drm_device_t *dev) if (offset > 0) \ fifo->pgraph_ctx[offset] = val; \ } while (0) -int nv10_graph_create_context(drm_device_t *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; +int nv10_graph_create_context(struct drm_device *dev, int channel) { + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *fifo = dev_priv->fifos[channel]; uint32_t tmp, vramsz; @@ -663,24 +663,24 @@ int nv10_graph_create_context(drm_device_t *dev, int channel) { return 0; } -void nv10_graph_destroy_context(drm_device_t *dev, int channel) +void nv10_graph_destroy_context(struct drm_device *dev, int channel) { } -int nv10_graph_load_context(drm_device_t *dev, int channel) +int nv10_graph_load_context(struct drm_device *dev, int channel) { DRM_ERROR("stub!\n"); return 0; } -int nv10_graph_save_context(drm_device_t *dev, int channel) +int nv10_graph_save_context(struct drm_device *dev, int channel) { DRM_ERROR("stub!\n"); return 0; } -int nv10_graph_init(drm_device_t *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; +int nv10_graph_init(struct drm_device *dev) { + struct drm_nouveau_private *dev_priv = dev->dev_private; int i; NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) & @@ -714,7 +714,7 @@ int nv10_graph_init(drm_device_t *dev) { return 0; } -void nv10_graph_takedown(drm_device_t *dev) +void nv10_graph_takedown(struct drm_device *dev) { } diff --git a/shared-core/nv20_graph.c b/shared-core/nv20_graph.c index 06d7e440..e6aa1e2a 100644 --- a/shared-core/nv20_graph.c +++ b/shared-core/nv20_graph.c @@ -29,9 +29,9 @@ #define NV20_GRCTX_SIZE (3529*4) -int nv20_graph_create_context(drm_device_t *dev, int channel) { - drm_nouveau_private_t *dev_priv = - (drm_nouveau_private_t *)dev->dev_private; +int nv20_graph_create_context(struct drm_device *dev, int channel) { + struct drm_nouveau_private *dev_priv = + (struct drm_nouveau_private *)dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; unsigned int ctx_size = NV20_GRCTX_SIZE; int ret; @@ -49,8 +49,8 @@ int nv20_graph_create_context(drm_device_t *dev, int channel) { return 0; } -void nv20_graph_destroy_context(drm_device_t *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; +void nv20_graph_destroy_context(struct drm_device *dev, int channel) { + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; if (chan->ramin_grctx) @@ -59,9 +59,9 @@ void nv20_graph_destroy_context(drm_device_t *dev, int channel) { INSTANCE_WR(dev_priv->ctx_table->gpuobj, channel, 0); } -static void nv20_graph_rdi(drm_device_t *dev) { - drm_nouveau_private_t *dev_priv = - (drm_nouveau_private_t *)dev->dev_private; +static void nv20_graph_rdi(struct drm_device *dev) { + struct drm_nouveau_private *dev_priv = + (struct drm_nouveau_private *)dev->dev_private; int i; NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x2c80000); @@ -73,9 +73,9 @@ static void nv20_graph_rdi(drm_device_t *dev) { /* Save current context (from PGRAPH) into the channel's context */ -int nv20_graph_save_context(drm_device_t *dev, int channel) { - drm_nouveau_private_t *dev_priv = - (drm_nouveau_private_t *)dev->dev_private; +int nv20_graph_save_context(struct drm_device *dev, int channel) { + struct drm_nouveau_private *dev_priv = + (struct drm_nouveau_private *)dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; uint32_t instance; @@ -94,9 +94,9 @@ int nv20_graph_save_context(drm_device_t *dev, int channel) { /* Restore the context for a specific channel into PGRAPH */ -int nv20_graph_load_context(drm_device_t *dev, int channel) { - drm_nouveau_private_t *dev_priv = - (drm_nouveau_private_t *)dev->dev_private; +int nv20_graph_load_context(struct drm_device *dev, int channel) { + struct drm_nouveau_private *dev_priv = + (struct drm_nouveau_private *)dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; uint32_t instance; @@ -113,9 +113,9 @@ int nv20_graph_load_context(drm_device_t *dev, int channel) { return 0; } -void nouveau_nv20_context_switch(drm_device_t *dev) +void nouveau_nv20_context_switch(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int channel, channel_old; channel=NV_READ(NV03_PFIFO_CACHE1_PUSH1)&(nouveau_fifo_number(dev)-1); @@ -144,9 +144,9 @@ void nouveau_nv20_context_switch(drm_device_t *dev) NV_WRITE(NV04_PGRAPH_FIFO,0x1); } -int nv20_graph_init(drm_device_t *dev) { - drm_nouveau_private_t *dev_priv = - (drm_nouveau_private_t *)dev->dev_private; +int nv20_graph_init(struct drm_device *dev) { + struct drm_nouveau_private *dev_priv = + (struct drm_nouveau_private *)dev->dev_private; uint32_t tmp, vramsz; int ret, i; @@ -240,7 +240,7 @@ int nv20_graph_init(drm_device_t *dev) { return 0; } -void nv20_graph_takedown(drm_device_t *dev) +void nv20_graph_takedown(struct drm_device *dev) { } diff --git a/shared-core/nv30_graph.c b/shared-core/nv30_graph.c index a83ad714..23e0f7f0 100644 --- a/shared-core/nv30_graph.c +++ b/shared-core/nv30_graph.c @@ -16,9 +16,9 @@ * contexts are taken from dumps just after the 3D object is * created. */ -static void nv30_graph_context_init(drm_device_t *dev, nouveau_gpuobj_t *ctx) +static void nv30_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int i; INSTANCE_WR(ctx, 0x28/4, 0x10000000); @@ -100,12 +100,12 @@ static void nv30_graph_context_init(drm_device_t *dev, nouveau_gpuobj_t *ctx) } -int nv30_graph_create_context(drm_device_t *dev, int channel) +int nv30_graph_create_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = - (drm_nouveau_private_t *)dev->dev_private; + struct drm_nouveau_private *dev_priv = + (struct drm_nouveau_private *)dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; - void (*ctx_init)(drm_device_t *, nouveau_gpuobj_t *); + void (*ctx_init)(struct drm_device *, struct nouveau_gpuobj *); unsigned int ctx_size; int ret; @@ -131,10 +131,10 @@ int nv30_graph_create_context(drm_device_t *dev, int channel) return 0; } -void nv30_graph_destroy_context(drm_device_t *dev, int channel) +void nv30_graph_destroy_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = - (drm_nouveau_private_t *)dev->dev_private; + struct drm_nouveau_private *dev_priv = + (struct drm_nouveau_private *)dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; if (chan->ramin_grctx) @@ -144,9 +144,9 @@ void nv30_graph_destroy_context(drm_device_t *dev, int channel) } static int -nouveau_graph_wait_idle(drm_device_t *dev) +nouveau_graph_wait_idle(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int tv = 1000; while (tv--) { @@ -161,9 +161,9 @@ nouveau_graph_wait_idle(drm_device_t *dev) return 0; } -int nv30_graph_load_context(drm_device_t *dev, int channel) +int nv30_graph_load_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; uint32_t inst; @@ -178,9 +178,9 @@ int nv30_graph_load_context(drm_device_t *dev, int channel) return nouveau_graph_wait_idle(dev); } -int nv30_graph_save_context(drm_device_t *dev, int channel) +int nv30_graph_save_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; uint32_t inst; @@ -195,10 +195,10 @@ int nv30_graph_save_context(drm_device_t *dev, int channel) return nouveau_graph_wait_idle(dev); } -int nv30_graph_init(drm_device_t *dev) +int nv30_graph_init(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = - (drm_nouveau_private_t *)dev->dev_private; + struct drm_nouveau_private *dev_priv = + (struct drm_nouveau_private *)dev->dev_private; uint32_t vramsz, tmp; int ret, i; @@ -279,7 +279,7 @@ int nv30_graph_init(drm_device_t *dev) return 0; } -void nv30_graph_takedown(drm_device_t *dev) +void nv30_graph_takedown(struct drm_device *dev) { } diff --git a/shared-core/nv40_fb.c b/shared-core/nv40_fb.c index 83a7580e..2cbb40e4 100644 --- a/shared-core/nv40_fb.c +++ b/shared-core/nv40_fb.c @@ -4,9 +4,9 @@ #include "nouveau_drm.h" int -nv40_fb_init(drm_device_t *dev) +nv40_fb_init(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t fb_bar_size, tmp; int num_tiles; int i; @@ -50,7 +50,7 @@ nv40_fb_init(drm_device_t *dev) } void -nv40_fb_takedown(drm_device_t *dev) +nv40_fb_takedown(struct drm_device *dev) { } diff --git a/shared-core/nv40_fifo.c b/shared-core/nv40_fifo.c index 818a9024..ecb1d21e 100644 --- a/shared-core/nv40_fifo.c +++ b/shared-core/nv40_fifo.c @@ -37,9 +37,9 @@ #define NV40_RAMFC__SIZE 128 int -nv40_fifo_create_context(drm_device_t *dev, int channel) +nv40_fifo_create_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; int ret; @@ -73,9 +73,9 @@ nv40_fifo_create_context(drm_device_t *dev, int channel) } void -nv40_fifo_destroy_context(drm_device_t *dev, int channel) +nv40_fifo_destroy_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; NV_WRITE(NV04_PFIFO_MODE, NV_READ(NV04_PFIFO_MODE)&~(1<<channel)); @@ -85,9 +85,9 @@ nv40_fifo_destroy_context(drm_device_t *dev, int channel) } int -nv40_fifo_load_context(drm_device_t *dev, int channel) +nv40_fifo_load_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; uint32_t tmp, tmp2; @@ -144,9 +144,9 @@ nv40_fifo_load_context(drm_device_t *dev, int channel) } int -nv40_fifo_save_context(drm_device_t *dev, int channel) +nv40_fifo_save_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; uint32_t tmp; diff --git a/shared-core/nv40_graph.c b/shared-core/nv40_graph.c index 94d76505..d8fccb7e 100644 --- a/shared-core/nv40_graph.c +++ b/shared-core/nv40_graph.c @@ -47,9 +47,9 @@ * created. */ static void -nv40_graph_context_init(drm_device_t *dev, nouveau_gpuobj_t *ctx) +nv40_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int i; /* Always has the "instance address" of itself at offset 0 */ @@ -188,9 +188,9 @@ nv40_graph_context_init(drm_device_t *dev, nouveau_gpuobj_t *ctx) } static void -nv43_graph_context_init(drm_device_t *dev, nouveau_gpuobj_t *ctx) +nv43_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int i; INSTANCE_WR(ctx, 0x00000/4, ctx->im_pramin->start); @@ -304,9 +304,9 @@ nv43_graph_context_init(drm_device_t *dev, nouveau_gpuobj_t *ctx) }; static void -nv46_graph_context_init(drm_device_t *dev, nouveau_gpuobj_t *ctx) +nv46_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int i; INSTANCE_WR(ctx, 0x00000/4, ctx->im_pramin->start); @@ -455,9 +455,9 @@ nv46_graph_context_init(drm_device_t *dev, nouveau_gpuobj_t *ctx) } static void -nv49_graph_context_init(drm_device_t *dev, nouveau_gpuobj_t *ctx) +nv49_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int i; INSTANCE_WR(ctx, 0x00000/4, ctx->im_pramin->start); @@ -678,9 +678,9 @@ nv49_graph_context_init(drm_device_t *dev, nouveau_gpuobj_t *ctx) } static void -nv4a_graph_context_init(drm_device_t *dev, nouveau_gpuobj_t *ctx) +nv4a_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int i; INSTANCE_WR(ctx, 0x00000/4, ctx->im_pramin->start); @@ -795,9 +795,9 @@ nv4a_graph_context_init(drm_device_t *dev, nouveau_gpuobj_t *ctx) } static void -nv4b_graph_context_init(drm_device_t *dev, nouveau_gpuobj_t *ctx) +nv4b_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int i; INSTANCE_WR(ctx, 0x00000/4, ctx->im_pramin->start); @@ -1010,9 +1010,9 @@ nv4b_graph_context_init(drm_device_t *dev, nouveau_gpuobj_t *ctx) } static void -nv4c_graph_context_init(drm_device_t *dev, nouveau_gpuobj_t *ctx) +nv4c_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int i; INSTANCE_WR(ctx, 0x00000/4, ctx->im_pramin->start); @@ -1117,9 +1117,9 @@ nv4c_graph_context_init(drm_device_t *dev, nouveau_gpuobj_t *ctx) } static void -nv4e_graph_context_init(drm_device_t *dev, nouveau_gpuobj_t *ctx) +nv4e_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; int i; INSTANCE_WR(ctx, 0x00000/4, ctx->im_pramin->start); @@ -1224,12 +1224,12 @@ nv4e_graph_context_init(drm_device_t *dev, nouveau_gpuobj_t *ctx) } int -nv40_graph_create_context(drm_device_t *dev, int channel) +nv40_graph_create_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = - (drm_nouveau_private_t *)dev->dev_private; + struct drm_nouveau_private *dev_priv = + (struct drm_nouveau_private *)dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; - void (*ctx_init)(drm_device_t *, nouveau_gpuobj_t *); + void (*ctx_init)(struct drm_device *, struct nouveau_gpuobj *); unsigned int ctx_size; int ret; @@ -1284,9 +1284,9 @@ nv40_graph_create_context(drm_device_t *dev, int channel) } void -nv40_graph_destroy_context(drm_device_t *dev, int channel) +nv40_graph_destroy_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; if (chan->ramin_grctx) @@ -1294,9 +1294,9 @@ nv40_graph_destroy_context(drm_device_t *dev, int channel) } static int -nv40_graph_transfer_context(drm_device_t *dev, uint32_t inst, int save) +nv40_graph_transfer_context(struct drm_device *dev, uint32_t inst, int save) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t old_cp, tv = 1000; int i; @@ -1327,9 +1327,9 @@ nv40_graph_transfer_context(drm_device_t *dev, uint32_t inst, int save) *XXX: fails sometimes, not sure why.. */ int -nv40_graph_save_context(drm_device_t *dev, int channel) +nv40_graph_save_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; uint32_t inst; @@ -1344,9 +1344,9 @@ nv40_graph_save_context(drm_device_t *dev, int channel) * XXX: fails sometimes.. not sure why */ int -nv40_graph_load_context(drm_device_t *dev, int channel) +nv40_graph_load_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; uint32_t inst; int ret; @@ -1599,10 +1599,10 @@ static uint32_t nv4e_ctx_voodoo[] = { * C51 0x4e */ int -nv40_graph_init(drm_device_t *dev) +nv40_graph_init(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = - (drm_nouveau_private_t *)dev->dev_private; + struct drm_nouveau_private *dev_priv = + (struct drm_nouveau_private *)dev->dev_private; uint32_t *ctx_voodoo; uint32_t vramsz, tmp; int i, j; @@ -1829,7 +1829,7 @@ nv40_graph_init(drm_device_t *dev) return 0; } -void nv40_graph_takedown(drm_device_t *dev) +void nv40_graph_takedown(struct drm_device *dev) { } diff --git a/shared-core/nv40_mc.c b/shared-core/nv40_mc.c index 8dbd96fd..8bb6b083 100644 --- a/shared-core/nv40_mc.c +++ b/shared-core/nv40_mc.c @@ -4,9 +4,9 @@ #include "nouveau_drm.h" int -nv40_mc_init(drm_device_t *dev) +nv40_mc_init(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t tmp; /* Power up everything, resetting each individual unit will @@ -35,7 +35,7 @@ nv40_mc_init(drm_device_t *dev) } void -nv40_mc_takedown(drm_device_t *dev) +nv40_mc_takedown(struct drm_device *dev) { } diff --git a/shared-core/nv50_fifo.c b/shared-core/nv50_fifo.c index d4c3ca87..feab24c4 100644 --- a/shared-core/nv50_fifo.c +++ b/shared-core/nv50_fifo.c @@ -29,18 +29,18 @@ #include "nouveau_drv.h" typedef struct { - nouveau_gpuobj_ref_t *thingo; - nouveau_gpuobj_ref_t *dummyctx; + struct nouveau_gpuobj_ref *thingo; + struct nouveau_gpuobj_ref *dummyctx; } nv50_fifo_priv; #define IS_G80 ((dev_priv->chipset & 0xf0) == 0x50) static void -nv50_fifo_init_thingo(drm_device_t *dev) +nv50_fifo_init_thingo(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; nv50_fifo_priv *priv = dev_priv->Engine.fifo.priv; - nouveau_gpuobj_ref_t *thingo = priv->thingo; + struct nouveau_gpuobj_ref *thingo = priv->thingo; int i, fi=2; DRM_DEBUG("\n"); @@ -60,9 +60,9 @@ nv50_fifo_init_thingo(drm_device_t *dev) } static int -nv50_fifo_channel_enable(drm_device_t *dev, int channel) +nv50_fifo_channel_enable(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; DRM_DEBUG("ch%d\n", channel); @@ -88,9 +88,9 @@ nv50_fifo_channel_enable(drm_device_t *dev, int channel) } static void -nv50_fifo_channel_disable(drm_device_t *dev, int channel, int nt) +nv50_fifo_channel_disable(struct drm_device *dev, int channel, int nt) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; DRM_DEBUG("ch%d, nt=%d\n", channel, nt); @@ -106,9 +106,9 @@ nv50_fifo_channel_disable(drm_device_t *dev, int channel, int nt) } static void -nv50_fifo_init_reset(drm_device_t *dev) +nv50_fifo_init_reset(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t pmc_e; DRM_DEBUG("\n"); @@ -120,7 +120,7 @@ nv50_fifo_init_reset(drm_device_t *dev) } static void -nv50_fifo_init_context_table(drm_device_t *dev) +nv50_fifo_init_context_table(struct drm_device *dev) { int i; @@ -132,9 +132,9 @@ nv50_fifo_init_context_table(drm_device_t *dev) } static void -nv50_fifo_init_regs__nv(drm_device_t *dev) +nv50_fifo_init_regs__nv(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; DRM_DEBUG("\n"); @@ -142,9 +142,9 @@ nv50_fifo_init_regs__nv(drm_device_t *dev) } static int -nv50_fifo_init_regs(drm_device_t *dev) +nv50_fifo_init_regs(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; nv50_fifo_priv *priv = dev_priv->Engine.fifo.priv; int ret; @@ -176,9 +176,9 @@ nv50_fifo_init_regs(drm_device_t *dev) } int -nv50_fifo_init(drm_device_t *dev) +nv50_fifo_init(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; nv50_fifo_priv *priv; int ret; @@ -207,9 +207,9 @@ nv50_fifo_init(drm_device_t *dev) } void -nv50_fifo_takedown(drm_device_t *dev) +nv50_fifo_takedown(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; nv50_fifo_priv *priv = dev_priv->Engine.fifo.priv; DRM_DEBUG("\n"); @@ -225,18 +225,17 @@ nv50_fifo_takedown(drm_device_t *dev) } int -nv50_fifo_create_context(drm_device_t *dev, int channel) +nv50_fifo_create_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; - nouveau_gpuobj_t *ramfc = NULL; + struct nouveau_gpuobj *ramfc = NULL; int ret; DRM_DEBUG("ch%d\n", channel); if (IS_G80) { - uint32_t ramfc_offset; - ramfc_offset = chan->ramin->gpuobj->im_pramin->start + 0x1000; + uint32_t ramfc_offset = chan->ramin->gpuobj->im_pramin->start; if ((ret = nouveau_gpuobj_new_fake(dev, ramfc_offset, 0x100, NVOBJ_FLAG_ZERO_ALLOC | NVOBJ_FLAG_ZERO_FREE, @@ -284,9 +283,9 @@ nv50_fifo_create_context(drm_device_t *dev, int channel) } void -nv50_fifo_destroy_context(drm_device_t *dev, int channel) +nv50_fifo_destroy_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; DRM_DEBUG("ch%d\n", channel); @@ -296,11 +295,11 @@ nv50_fifo_destroy_context(drm_device_t *dev, int channel) } int -nv50_fifo_load_context(drm_device_t *dev, int channel) +nv50_fifo_load_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; - nouveau_gpuobj_t *ramfc = chan->ramfc->gpuobj; + struct nouveau_gpuobj *ramfc = chan->ramfc->gpuobj; DRM_DEBUG("ch%d\n", channel); @@ -325,7 +324,7 @@ nv50_fifo_load_context(drm_device_t *dev, int channel) } int -nv50_fifo_save_context(drm_device_t *dev, int channel) +nv50_fifo_save_context(struct drm_device *dev, int channel) { DRM_DEBUG("ch%d\n", channel); DRM_ERROR("stub!\n"); diff --git a/shared-core/nv50_graph.c b/shared-core/nv50_graph.c index 271ed733..54fe498b 100644 --- a/shared-core/nv50_graph.c +++ b/shared-core/nv50_graph.c @@ -31,9 +31,9 @@ #define IS_G80 ((dev_priv->chipset & 0xf0) == 0x50) static void -nv50_graph_init_reset(drm_device_t *dev) +nv50_graph_init_reset(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t pmc_e; DRM_DEBUG("\n"); @@ -45,9 +45,9 @@ nv50_graph_init_reset(drm_device_t *dev) } static void -nv50_graph_init_regs__nv(drm_device_t *dev) +nv50_graph_init_regs__nv(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; DRM_DEBUG("\n"); @@ -66,9 +66,9 @@ nv50_graph_init_regs__nv(drm_device_t *dev) } static void -nv50_graph_init_regs(drm_device_t *dev) +nv50_graph_init_regs(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; DRM_DEBUG("\n"); @@ -139,9 +139,9 @@ static uint32_t nv84_ctx_voodoo[] = { }; static void -nv50_graph_init_ctxctl(drm_device_t *dev) +nv50_graph_init_ctxctl(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t *voodoo; DRM_DEBUG("\n"); @@ -169,7 +169,7 @@ nv50_graph_init_ctxctl(drm_device_t *dev) } int -nv50_graph_init(drm_device_t *dev) +nv50_graph_init(struct drm_device *dev) { DRM_DEBUG("\n"); @@ -182,17 +182,17 @@ nv50_graph_init(drm_device_t *dev) } void -nv50_graph_takedown(drm_device_t *dev) +nv50_graph_takedown(struct drm_device *dev) { DRM_DEBUG("\n"); } int -nv50_graph_create_context(drm_device_t *dev, int channel) +nv50_graph_create_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; - nouveau_gpuobj_t *ramin = chan->ramin->gpuobj; + struct nouveau_gpuobj *ramin = chan->ramin->gpuobj; int grctx_size = 0x60000, hdr; int ret; @@ -218,9 +218,9 @@ nv50_graph_create_context(drm_device_t *dev, int channel) } void -nv50_graph_destroy_context(drm_device_t *dev, int channel) +nv50_graph_destroy_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; int i, hdr; @@ -234,9 +234,9 @@ nv50_graph_destroy_context(drm_device_t *dev, int channel) } static int -nv50_graph_transfer_context(drm_device_t *dev, uint32_t inst, int save) +nv50_graph_transfer_context(struct drm_device *dev, uint32_t inst, int save) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t old_cp, tv = 20000; int i; @@ -266,9 +266,9 @@ nv50_graph_transfer_context(drm_device_t *dev, uint32_t inst, int save) } int -nv50_graph_load_context(drm_device_t *dev, int channel) +nv50_graph_load_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; uint32_t inst = ((chan->ramin->instance >> 12) | (1<<31)); int ret; @@ -288,9 +288,9 @@ nv50_graph_load_context(drm_device_t *dev, int channel) } int -nv50_graph_save_context(drm_device_t *dev, int channel) +nv50_graph_save_context(struct drm_device *dev, int channel) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_fifo *chan = dev_priv->fifos[channel]; uint32_t inst = ((chan->ramin->instance >> 12) | (1<<31)); diff --git a/shared-core/nv50_instmem.c b/shared-core/nv50_instmem.c index 4aca9e7d..027d3ffb 100644 --- a/shared-core/nv50_instmem.c +++ b/shared-core/nv50_instmem.c @@ -39,9 +39,9 @@ typedef struct { #define NV50_INSTMEM_PT_SIZE(a) (((a) >> 12) << 3) int -nv50_instmem_init(drm_device_t *dev) +nv50_instmem_init(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; nv50_instmem_priv *priv; uint32_t rv, pt, pts, cb, cb0, cb1, unk, as; uint32_t i, v; @@ -68,7 +68,7 @@ nv50_instmem_init(drm_device_t *dev) } else { unk = cb + 0x5400; cb0 = cb + 0x5440; - cb1 = cb + 0x1438; + cb1 = cb + 0x1478; } DRM_DEBUG("PRAMIN config:\n"); @@ -150,9 +150,9 @@ nv50_instmem_init(drm_device_t *dev) } void -nv50_instmem_takedown(drm_device_t *dev) +nv50_instmem_takedown(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; nv50_instmem_priv *priv = dev_priv->Engine.instmem.priv; int i; @@ -168,7 +168,7 @@ nv50_instmem_takedown(drm_device_t *dev) } int -nv50_instmem_populate(drm_device_t *dev, nouveau_gpuobj_t *gpuobj, uint32_t *sz) +nv50_instmem_populate(struct drm_device *dev, struct nouveau_gpuobj *gpuobj, uint32_t *sz) { if (gpuobj->im_backing) return DRM_ERR(EINVAL); @@ -189,9 +189,9 @@ nv50_instmem_populate(drm_device_t *dev, nouveau_gpuobj_t *gpuobj, uint32_t *sz) } void -nv50_instmem_clear(drm_device_t *dev, nouveau_gpuobj_t *gpuobj) +nv50_instmem_clear(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; if (gpuobj && gpuobj->im_backing) { if (gpuobj->im_bound) @@ -202,9 +202,9 @@ nv50_instmem_clear(drm_device_t *dev, nouveau_gpuobj_t *gpuobj) } int -nv50_instmem_bind(drm_device_t *dev, nouveau_gpuobj_t *gpuobj) +nv50_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t pte, pte_end, vram; if (!gpuobj->im_backing || !gpuobj->im_pramin || gpuobj->im_bound) @@ -215,7 +215,7 @@ nv50_instmem_bind(drm_device_t *dev, nouveau_gpuobj_t *gpuobj) pte = (gpuobj->im_pramin->start >> 12) << 3; pte_end = ((gpuobj->im_pramin->size >> 12) << 3) + pte; - vram = gpuobj->im_backing->start - dev_priv->fb_phys; + vram = gpuobj->im_backing->start; if (pte == pte_end) { DRM_ERROR("WARNING: badness in bind() pte calc\n"); @@ -240,9 +240,9 @@ nv50_instmem_bind(drm_device_t *dev, nouveau_gpuobj_t *gpuobj) } int -nv50_instmem_unbind(drm_device_t *dev, nouveau_gpuobj_t *gpuobj) +nv50_instmem_unbind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t pte, pte_end; if (gpuobj->im_bound == 0) diff --git a/shared-core/nv50_mc.c b/shared-core/nv50_mc.c index 7f7537f0..952dea9f 100644 --- a/shared-core/nv50_mc.c +++ b/shared-core/nv50_mc.c @@ -29,14 +29,14 @@ #include "nouveau_drv.h" int -nv50_mc_init(drm_device_t *dev) +nv50_mc_init(struct drm_device *dev) { - drm_nouveau_private_t *dev_priv = dev->dev_private; + struct drm_nouveau_private *dev_priv = dev->dev_private; NV_WRITE(NV03_PMC_ENABLE, 0xFFFFFFFF); return 0; } -void nv50_mc_takedown(drm_device_t *dev) +void nv50_mc_takedown(struct drm_device *dev) { } |