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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2009-11-30 22:14:30 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2009-11-30 22:18:15 +0000 |
| commit | e22fb797728c07fd05b195bd345fdf91bab47855 (patch) | |
| tree | 5ae0eec3fb2fe6b8be25ed544120dc69035fa046 /xf86drmSL.c | |
| parent | 60aa803dc76bbdfac72da4de4cdc3018717b0884 (diff) | |
intel: Apply pessimistic alignment to in-aperture buffer size
For the older chipsets, i.e. pre-i965, which have severe alignment
restrictions for tiled buffers we need to pessimistically assume that we
will waste the size of buffer to meet those alignment constraints.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'xf86drmSL.c')
0 files changed, 0 insertions, 0 deletions