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author | Jesse Barnes <jbarnes@hobbes.(none)> | 2008-07-01 12:25:16 -0700 |
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committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2008-07-01 12:25:16 -0700 |
commit | 727d4f1d1667e43b3558bd5f6ed6dc2cd9c29401 (patch) | |
tree | 73e01f2b4b4c61df48678a6746c8525004e8bbb7 /tests/ttmtest | |
parent | e935925cd733fffef44b3e3210a875b57b3812e9 (diff) |
i915: only use tiled blits on 965+
When scheduled swaps occur, we need to blit between front & back buffers. If
the buffers are tiled, we need to set the appropriate XY_SRC_COPY tile bit, but
only on 965 chips, since it will cause corruption on pre-965 (e.g. 945).
Bug reported by and fix tested by Tomas Janousek <tomi@nomi.cz>.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'tests/ttmtest')
0 files changed, 0 insertions, 0 deletions