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| author | Michel Dänzer <michel@tungstengraphics.com> | 2006-09-01 11:35:31 +0200 |
|---|---|---|
| committer | Michel Dänzer <michel@tungstengraphics.com> | 2006-09-28 15:41:36 +0200 |
| commit | cf6b2c5299e9be3542d4deddfd05d5811f11d2ef (patch) | |
| tree | b4f1786abba9325ebb65a99a5cf2fe13af347a0f /tests/ttmtest/src/xf86dri.h | |
| parent | 89e323e4900af84cc33219ad24eb0b435a039d23 (diff) | |
Core vsync: Don't clobber target sequence number when scheduling signal.
It looks like this would have caused signals to always get sent on the next
vertical blank, regardless of the sequence number.
Diffstat (limited to 'tests/ttmtest/src/xf86dri.h')
0 files changed, 0 insertions, 0 deletions