diff options
| author | Roland Scheidegger <rscheidegger_lists@hispeed.ch> | 2005-01-26 17:48:59 +0000 |
|---|---|---|
| committer | Roland Scheidegger <rscheidegger_lists@hispeed.ch> | 2005-01-26 17:48:59 +0000 |
| commit | 43c3223de690b892759901386d8dc936b0dfbad1 (patch) | |
| tree | cbeed9ac6c6cc5777031d72b81b155b6f4c0c580 /shared/radeon_cp.c | |
| parent | 408376b2031cf301f1a8e35e89ceefc72f2fdc94 (diff) | |
(Stephane Marchesin,me) Add radeon framebuffer tiling support to radeon
drm. Add new ioctls to manage surfaces which cover the tiled areas
Diffstat (limited to 'shared/radeon_cp.c')
| -rw-r--r-- | shared/radeon_cp.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/shared/radeon_cp.c b/shared/radeon_cp.c index 5e23452b..dfb8b734 100644 --- a/shared/radeon_cp.c +++ b/shared/radeon_cp.c @@ -1698,7 +1698,7 @@ int radeon_cp_stop( DRM_IOCTL_ARGS ) void radeon_do_release( drm_device_t *dev ) { drm_radeon_private_t *dev_priv = dev->dev_private; - int ret; + int i, ret; if (dev_priv) { @@ -1720,6 +1720,14 @@ void radeon_do_release( drm_device_t *dev ) if (dev_priv->mmio) /* remove this after permanent addmaps */ RADEON_WRITE( RADEON_GEN_INT_CNTL, 0 ); + if (dev_priv->mmio) {/* remove all surfaces */ + for (i = 0; i < RADEON_MAX_SURFACES; i++) { + RADEON_WRITE(RADEON_SURFACE0_INFO + 16*i, 0); + RADEON_WRITE(RADEON_SURFACE0_LOWER_BOUND + 16*i, 0); + RADEON_WRITE(RADEON_SURFACE0_UPPER_BOUND + 16*i, 0); + } + } + /* Free memory heap structures */ radeon_mem_takedown( &(dev_priv->gart_heap) ); radeon_mem_takedown( &(dev_priv->fb_heap) ); |