diff options
| author | Roland Scheidegger <rscheidegger_lists@hispeed.ch> | 2005-03-15 22:12:30 +0000 |
|---|---|---|
| committer | Roland Scheidegger <rscheidegger_lists@hispeed.ch> | 2005-03-15 22:12:30 +0000 |
| commit | 34563921dd0b41d4ccf08374227e31d765b40353 (patch) | |
| tree | 8923166e153a310096f278a5cdd743b347fcb584 /shared-core | |
| parent | d2fd9200956a94cfd91a39e76994f326bdfc6ac0 (diff) | |
add R200_EMIT_PP_TRI_PERF_CNTL packet to support brilinear filtering on
r200
Diffstat (limited to 'shared-core')
| -rw-r--r-- | shared-core/radeon_drm.h | 3 | ||||
| -rw-r--r-- | shared-core/radeon_drv.h | 8 | ||||
| -rw-r--r-- | shared-core/radeon_state.c | 4 |
3 files changed, 11 insertions, 4 deletions
diff --git a/shared-core/radeon_drm.h b/shared-core/radeon_drm.h index adbd6b6b..bee63bbc 100644 --- a/shared-core/radeon_drm.h +++ b/shared-core/radeon_drm.h @@ -151,7 +151,8 @@ #define RADEON_EMIT_PP_CUBIC_OFFSETS_T1 81 #define RADEON_EMIT_PP_CUBIC_FACES_2 82 #define RADEON_EMIT_PP_CUBIC_OFFSETS_T2 83 -#define RADEON_MAX_STATE_PACKETS 84 +#define R200_EMIT_PP_TRI_PERF_CNTL 84 +#define RADEON_MAX_STATE_PACKETS 85 /* Commands understood by cmd_buffer ioctl. More can be added but * obviously these can't be removed or changed: diff --git a/shared-core/radeon_drv.h b/shared-core/radeon_drv.h index 7f5fb989..aaf77968 100644 --- a/shared-core/radeon_drv.h +++ b/shared-core/radeon_drv.h @@ -42,7 +42,7 @@ #define DRIVER_NAME "radeon" #define DRIVER_DESC "ATI Radeon" -#define DRIVER_DATE "20050208" +#define DRIVER_DATE "20050311" /* Interface history: * @@ -84,10 +84,12 @@ * - Add R100/R200 surface allocation/free support * 1.15- Add support for texture micro tiling * - Add support for r100 cube maps + * 1.16- Add R200_EMIT_PP_TRI_PERF_CNTL packet to support brilinear + * texture filtering on r200 */ #define DRIVER_MAJOR 1 -#define DRIVER_MINOR 15 +#define DRIVER_MINOR 16 #define DRIVER_PATCHLEVEL 0 enum radeon_family { @@ -827,6 +829,8 @@ extern void radeon_driver_free_filp_priv(drm_device_t * dev, #define R200_SE_TCL_POINT_SPRITE_CNTL 0x22c4 +#define R200_PP_TRI_PERF 0x2cf8 + /* Constants */ #define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */ diff --git a/shared-core/radeon_state.c b/shared-core/radeon_state.c index 1e606f3b..f6f09ac5 100644 --- a/shared-core/radeon_state.c +++ b/shared-core/radeon_state.c @@ -209,6 +209,7 @@ static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t * case RADEON_EMIT_PP_CUBIC_FACES_0: case RADEON_EMIT_PP_CUBIC_FACES_1: case RADEON_EMIT_PP_CUBIC_FACES_2: + case R200_EMIT_PP_TRI_PERF_CNTL: /* These packets don't contain memory offsets */ break; @@ -581,7 +582,8 @@ static struct { RADEON_PP_CUBIC_FACES_1, 1, "RADEON_PP_CUBIC_FACES_1"}, { RADEON_PP_CUBIC_OFFSET_T1_0, 5, "RADEON_PP_CUBIC_OFFSET_T1_0"}, { RADEON_PP_CUBIC_FACES_2, 1, "RADEON_PP_CUBIC_FACES_2"}, { - RADEON_PP_CUBIC_OFFSET_T2_0, 5, "RADEON_PP_CUBIC_OFFSET_T2_0"}, + RADEON_PP_CUBIC_OFFSET_T2_0, 5, "RADEON_PP_CUBIC_OFFSET_T2_0"}, { + R200_PP_TRI_PERF, 2, "R200_PP_TRI_PERF"}, }; /* ================================================================ |