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authorStephane Marchesin <marchesin@icps.u-strasbg.fr>2006-10-14 16:36:11 +0200
committerStephane Marchesin <marchesin@icps.u-strasbg.fr>2006-10-14 16:36:11 +0200
commit2c5b91aecf3d21684ffca758c034cd9a8ed2155d (patch)
tree9d557715210b3a61db1796b5e51061e720573b8f /shared-core
parent3a0cd7c7e221f625585675490f626de8677a9dc7 (diff)
Again more work on context switches. They work, sometimes. And when they do they seem to screw up the PGRAPH state.
Diffstat (limited to 'shared-core')
-rw-r--r--shared-core/nouveau_fifo.c27
-rw-r--r--shared-core/nouveau_irq.c34
2 files changed, 44 insertions, 17 deletions
diff --git a/shared-core/nouveau_fifo.c b/shared-core/nouveau_fifo.c
index 6de6a615..5b8cabd8 100644
--- a/shared-core/nouveau_fifo.c
+++ b/shared-core/nouveau_fifo.c
@@ -70,6 +70,7 @@ static void nouveau_fifo_init(drm_device_t* dev)
DRM_DEBUG("%s: setting FIFO %d active\n", __func__, dev_priv->cur_fifo);
+ // FIXME remove all the stuff that's done in nouveau_fifo_alloc
NV_WRITE(NV_PFIFO_CACHES, 0x00000000);
NV_WRITE(NV_PFIFO_MODE, 0x00000000);
@@ -226,6 +227,9 @@ static int nouveau_fifo_alloc(drm_device_t* dev,drm_nouveau_fifo_alloc_t* init,
/* disable the fifo caches */
NV_WRITE(NV_PFIFO_CACHES, 0x00000000);
+ NV_WRITE(NV_PFIFO_CACH1_DMAPSH, NV_READ(NV_PFIFO_CACH1_DMAPSH)&(~0x1));
+ NV_WRITE(NV_PFIFO_CACH1_PSH0, 0x00000000);
+ NV_WRITE(NV_PFIFO_CACH1_PUL0, 0x00000000);
switch(dev_priv->card_type)
{
@@ -273,10 +277,6 @@ static int nouveau_fifo_alloc(drm_device_t* dev,drm_nouveau_fifo_alloc_t* init,
#endif
}
- /* disable the pusher ? */
- NV_WRITE(NV_PFIFO_CACH1_DMAPSH, 0);
- NV_WRITE(NV_PFIFO_CACH1_PSH0, 0);
-
/* enable the fifo dma operation */
NV_WRITE(NV_PFIFO_MODE,NV_READ(NV_PFIFO_MODE)|(1<<init->channel));
@@ -291,10 +291,23 @@ static int nouveau_fifo_alloc(drm_device_t* dev,drm_nouveau_fifo_alloc_t* init,
NV_WRITE(NV_PFIFO_CACH1_DMAG, init->put_base);
NV_WRITE(NV03_FIFO_REGS_DMAPUT(init->channel), init->put_base);
NV_WRITE(NV03_FIFO_REGS_DMAGET(init->channel), init->put_base);
+ NV_WRITE(NV_PFIFO_CACH1_DMAI, dev_priv->cmdbuf_obj->instance >> 4);
+ NV_WRITE(NV_PFIFO_SIZE , 0x0000FFFF);
+ NV_WRITE(NV_PFIFO_CACH1_HASH, 0x0000FFFF);
- /* reenable the pusher ? */
- NV_WRITE(NV_PFIFO_CACH1_PSH0, 1);
- NV_WRITE(NV_PFIFO_CACH1_DMAPSH, 1);
+ NV_WRITE(NV_PFIFO_CACH0_PUL1, 0x00000001);
+ NV_WRITE(NV_PFIFO_CACH1_DMAC, 0x00000000);
+ NV_WRITE(NV_PFIFO_CACH1_DMAS, 0x00000000);
+ NV_WRITE(NV_PFIFO_CACH1_ENG, 0x00000000);
+#ifdef __BIG_ENDIAN
+ NV_WRITE(NV_PFIFO_CACH1_DMAF, NV_PFIFO_CACH1_DMAF_TRIG_112_BYTES|NV_PFIFO_CACH1_DMAF_SIZE_128_BYTES|NV_PFIFO_CACH1_DMAF_MAX_REQS_4|NV_PFIFO_CACH1_BIG_ENDIAN);
+#else
+ NV_WRITE(NV_PFIFO_CACH1_DMAF, NV_PFIFO_CACH1_DMAF_TRIG_112_BYTES|NV_PFIFO_CACH1_DMAF_SIZE_128_BYTES|NV_PFIFO_CACH1_DMAF_MAX_REQS_4);
+#endif
+ NV_WRITE(NV_PFIFO_CACH1_DMAPSH, 0x00000001);
+ NV_WRITE(NV_PFIFO_CACH1_PSH0, 0x00000001);
+ NV_WRITE(NV_PFIFO_CACH1_PUL0, 0x00000001);
+ NV_WRITE(NV_PFIFO_CACH1_PUL1, 0x00000001);
/* reenable the fifo caches */
NV_WRITE(NV_PFIFO_CACHES, 0x00000001);
diff --git a/shared-core/nouveau_irq.c b/shared-core/nouveau_irq.c
index c3755d7a..da68868b 100644
--- a/shared-core/nouveau_irq.c
+++ b/shared-core/nouveau_irq.c
@@ -152,6 +152,20 @@ static void nouveau_fifo_irq_handler(drm_device_t *dev)
NV_WRITE(NV_PFIFO_INTSTAT, NV_PFIFO_INTR_CACHE_ERROR);
}
+ if (status & NV_PFIFO_INTR_DMA_PUSHER) {
+ DRM_INFO("NV: PFIFO DMA pusher interrupt\n");
+
+ status &= ~NV_PFIFO_INTR_DMA_PUSHER;
+ NV_WRITE(NV_PFIFO_INTSTAT, NV_PFIFO_INTR_DMA_PUSHER);
+
+ NV_WRITE(NV_PFIFO_CACH1_DMAS, 0x00000000);
+ if (NV_READ(NV_PFIFO_CACH1_DMAP)!=NV_READ(NV_PFIFO_CACH1_DMAG))
+ {
+ uint32_t getval=NV_READ(NV_PFIFO_CACH1_DMAG)+4;
+ NV_WRITE(NV_PFIFO_CACH1_DMAG,getval);
+ }
+ }
+
if (status) {
DRM_INFO("NV: unknown PFIFO interrupt. status=0x%08x\n", status);
@@ -213,17 +227,17 @@ static void nouveau_nv10_context_switch(drm_device_t *dev)
channel=NV_READ(NV_PFIFO_CACH1_PSH1)&(nouveau_fifo_number(dev)-1);
/* 2-channel commute */
- if (channel==0)
- channel=1;
- else
- channel=0;
- dev_priv->cur_fifo=channel;
-
- NV_WRITE(NV_PGRAPH_CTX_CONTROL, 0x10000100);
- NV_WRITE(NV_PGRAPH_CTX_USER, (NV_READ(NV_PGRAPH_CTX_USER)&0xE0FFFFFF)|(dev_priv->cur_fifo<<24));
- NV_WRITE(NV_PGRAPH_FFINTFC_ST2, NV_READ(NV_PGRAPH_FFINTFC_ST2)&0xCFFFFFFF);
+// if (channel==0)
+// channel=1;
+// else
+// channel=0;
+// dev_priv->cur_fifo=channel;
+
+// NV_WRITE(NV_PGRAPH_CTX_CONTROL, 0x10000100);
+ NV_WRITE(NV_PGRAPH_CTX_USER, NV_READ(NV_PGRAPH_CTX_USER)|0x1F000000);
+// NV_WRITE(NV_PGRAPH_FFINTFC_ST2, NV_READ(NV_PGRAPH_FFINTFC_ST2)&0xCFFFFFFF);
/* touch PGRAPH_CTX_SWITCH* here ? */
- NV_WRITE(NV_PGRAPH_CTX_CONTROL, 0x10010100);
+ NV_WRITE(NV_PGRAPH_CTX_CONTROL, 0x10000100);
}
static void nouveau_pgraph_irq_handler(drm_device_t *dev)