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authorMichel Dänzer <michel@tungstengraphics.com>2007-06-18 13:08:21 +0200
committerMichel Dänzer <michel@tungstengraphics.com>2007-06-18 13:10:37 +0200
commitd8ed021d29951b17cfbda0ade968c73a52ac7ec7 (patch)
tree370ca553d648aea3f36f553df9aff51953048117 /shared-core
parent741d1c80314de6f30bcc7eca7a7720b0aac3c56c (diff)
radeon: VBlank rework fixups.
Fix range of frame counter registers. Use DRM_ERR() instead of Linux specific error codes in shared code. Remove duplicate register definitions and superfluous local variables.
Diffstat (limited to 'shared-core')
-rw-r--r--shared-core/radeon_drv.h3
-rw-r--r--shared-core/radeon_irq.c18
2 files changed, 6 insertions, 15 deletions
diff --git a/shared-core/radeon_drv.h b/shared-core/radeon_drv.h
index 5f671df6..bb69c106 100644
--- a/shared-core/radeon_drv.h
+++ b/shared-core/radeon_drv.h
@@ -512,9 +512,6 @@ extern int r300_do_cp_cmdbuf(drm_device_t *dev, DRMFILE filp,
#define RADEON_CRTC_CRNT_FRAME 0x0214
#define RADEON_CRTC2_CRNT_FRAME 0x0314
-#define RADEON_CRTC_CRNT_FRAME 0x0214
-#define RADEON_CRTC2_CRNT_FRAME 0x0314
-
#define RADEON_GEN_INT_CNTL 0x0040
# define RADEON_CRTC_VBLANK_MASK (1 << 0)
# define RADEON_CRTC2_VBLANK_MASK (1 << 9)
diff --git a/shared-core/radeon_irq.c b/shared-core/radeon_irq.c
index d1f0e313..cf72fc5b 100644
--- a/shared-core/radeon_irq.c
+++ b/shared-core/radeon_irq.c
@@ -49,8 +49,6 @@ static void radeon_irq_set_state(drm_device_t *dev, u32 mask, int state)
int radeon_enable_vblank(drm_device_t *dev, int crtc)
{
- drm_radeon_private_t *dev_priv = dev->dev_private;
-
switch (crtc) {
case 0:
radeon_irq_set_state(dev, RADEON_CRTC_VBLANK_MASK, 1);
@@ -61,7 +59,7 @@ int radeon_enable_vblank(drm_device_t *dev, int crtc)
default:
DRM_ERROR("tried to enable vblank on non-existent crtc %d\n",
crtc);
- return -EINVAL;
+ return DRM_ERR(EINVAL);
}
return 0;
@@ -69,8 +67,6 @@ int radeon_enable_vblank(drm_device_t *dev, int crtc)
void radeon_disable_vblank(drm_device_t *dev, int crtc)
{
- drm_radeon_private_t *dev_priv = dev->dev_private;
-
switch (crtc) {
case 0:
radeon_irq_set_state(dev, RADEON_CRTC_VBLANK_MASK, 0);
@@ -177,7 +173,7 @@ static int radeon_wait_irq(drm_device_t * dev, int swi_nr)
u32 radeon_get_vblank_counter(drm_device_t *dev, int crtc)
{
drm_radeon_private_t *dev_priv = dev->dev_private;
- u32 crtc_cnt_reg, current_cnt;
+ u32 crtc_cnt_reg;
if (crtc == 0)
crtc_cnt_reg = RADEON_CRTC_CRNT_FRAME;
@@ -186,9 +182,7 @@ u32 radeon_get_vblank_counter(drm_device_t *dev, int crtc)
else
return 0;
- current_cnt = RADEON_READ(crtc_cnt_reg);
-
- return current_cnt;
+ return RADEON_READ(crtc_cnt_reg);
}
/* Needs the lock as it touches the ring.
@@ -261,16 +255,16 @@ int radeon_driver_irq_postinstall(drm_device_t * dev)
{
drm_radeon_private_t *dev_priv =
(drm_radeon_private_t *) dev->dev_private;
- int num_pipes = 2, ret;
+ int ret;
atomic_set(&dev_priv->swi_emitted, 0);
DRM_INIT_WAITQUEUE(&dev_priv->swi_queue);
- ret = drm_vblank_init(dev, num_pipes);
+ ret = drm_vblank_init(dev, 2);
if (ret)
return ret;
- dev->max_vblank_count = 0xffffffff;
+ dev->max_vblank_count = 0x001fffff;
radeon_irq_set_state(dev, RADEON_SW_INT_ENABLE, 1);