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authorDave Airlie <airlied@nx6125b.(none)>2007-06-05 12:38:43 +1000
committerDave Airlie <airlied@nx6125b.(none)>2007-06-05 12:38:43 +1000
commitc9dbe0f2c2248ef8c3ba5718f77922d1c7429e6f (patch)
tree7b13cb61a39cef4fd61b564a8f67517fbeadc9c2 /shared-core
parentf6e8023e03278731db38dcc0c429025f36817c65 (diff)
invalidate gart tlb on PCIE after table change
Diffstat (limited to 'shared-core')
-rw-r--r--shared-core/radeon_cp.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c
index 9dc871ca..2c0549e5 100644
--- a/shared-core/radeon_cp.c
+++ b/shared-core/radeon_cp.c
@@ -1395,8 +1395,11 @@ void radeon_gart_flush(struct drm_device *dev)
RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_FLUSH);
RADEON_WRITE_IGPGART(RADEON_IGPGART_FLUSH, 0x0);
} else if (dev_priv->flags & RADEON_IS_PCIE) {
-
-
+ u32 tmp = RADEON_READ_PCIE(dev_priv, RADEON_PCIE_TX_GART_CNTL);
+ tmp |= RADEON_PCIE_TX_GART_INVALIDATE_TLB;
+ RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
+ tmp &= ~RADEON_PCIE_TX_GART_INVALIDATE_TLB;
+ RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
} else {