- Remove drm_initmap and replace its usage with drm_addmap. This reduces

    code duplication, and it also hands you the map pointer so you don't
    need to re-find it.
- Remove the permanent maps flag. Instead, for register and framebuffer
    maps, we always check whether there's already a map of that type and
    offset around. Move the Radeon map initialization into presetup (first
    open) so it happens again after every takedown.
- Remove the split cleanup of maps between driver takedown (last close) and
    cleanup (module unload). Instead, always tear down maps on takedown,
    and drivers can recreate them on first open.
- Make MGA always use addmap, instead of allocating consistent memory in
    the PCI case and then faking up a map for it, which accomplished nearly
    the same thing, in a different order. Note that the maps are exposed to
    the user again: we may want to expose a flag to avoid this, but it's
    not a security concern, and saves us a lot of code.
- Remove rmmaps in the MGA driver. Since the function is only called during
    takedown anyway, we can let them die a natural death.
- Make removal of maps happen in one function, which is called by both
    drm_takedown and drm_rmmap_ioctl.
Reviewed by: idr (previous revision) Tested on: mga (old/new/pci dma),
    radeon, savage

5 files changed, 52 insertions, 153 deletions

diff --git a/shared-core/mga_dma.c b/shared-core/mga_dma.c
index a632f35a..cb2b2561 100644
--- a/shared-core/mga_dma.c
+++ b/shared-core/mga_dma.c
@@ -553,44 +553,6 @@ static int mga_do_agp_dma_bootstrap(drm_device_t * dev,
 }
 
 /**
- * Create a "fake" drm_map_t for a pre-mapped range of PCI consistent memory.
- *
- * Unlike \c drm_addmap, this function just creates a \c drm_map_t wrapper for
- * a block of PCI consistent memory.  \c drm_addmap, basically, converts a bus
- * address to a virtual address.  However, \c drm_pci_alloc gives both the bus
- * address and the virtual address for the memory region.  Not only is there
- * no need to map it again, but mapping it again will cause problems.
- * 
- * \param dmah  DRM DMA handle returned by \c drm_pci_alloc.
- * \param map_ptr  Location to store a pointer to the \c drm_map_t.
- * 
- * \returns
- * On success, zero is returned.  Otherwise and error code suitable for
- * returning from an ioctl is returned.
- */
-static int mga_fake_addmap(drm_dma_handle_t * dmah, drm_map_t ** map_ptr)
-{
-	drm_map_t * map;
-
-
-	map = drm_alloc(sizeof(drm_map_t), DRM_MEM_DRIVER);
-	if (map == NULL) {
-		return DRM_ERR(ENOMEM);
-	}
-
-	map->offset = dmah->busaddr;
-	map->size = dmah->size;
-	map->type = _DRM_CONSISTENT;
-	map->flags = _DRM_READ_ONLY;
-	map->handle = dmah->vaddr;
-	map->mtrr = 0;
-	
-	*map_ptr = map;
-	
-	return 0;
-}
-
-/**
  * Bootstrap the driver for PCI DMA.
  * 
  * \todo
@@ -620,52 +582,41 @@ static int mga_do_pci_dma_bootstrap(drm_device_t * dev,
 		return DRM_ERR(EFAULT);
 	}
 
-
-	/* The WARP microcode base address must be 256-byte aligned.
-	 */
-	dev_priv->warp_dmah = drm_pci_alloc(dev, warp_size, 0x100, 0x7fffffff);
-	err = mga_fake_addmap(dev_priv->warp_dmah, & dev_priv->warp);
-	if (err) {
-		DRM_ERROR("Unable to map WARP microcode\n");
+	/* The proper alignment is 0x100 for this mapping */
+	err = drm_addmap(dev, 0, warp_size, _DRM_CONSISTENT,
+			 _DRM_READ_ONLY, &dev_priv->warp);
+	if (err != 0) {
+		DRM_ERROR("Unable to create mapping for WARP microcode\n");
 		return err;
 	}
 
-
 	/* Other than the bottom two bits being used to encode other
 	 * information, there don't appear to be any restrictions on the
 	 * alignment of the primary or secondary DMA buffers.
 	 */
 
-	dev_priv->primary_dmah = NULL;
 	for ( primary_size = dma_bs->primary_size
 	      ; primary_size != 0
 	      ; primary_size >>= 1 ) {
-		dev_priv->primary_dmah = drm_pci_alloc(dev, primary_size,
-					     0x04, 0x7fffffff);
-		if (dev_priv->primary_dmah != NULL) {
+		/* The proper alignment for this mapping is 0x04 */
+		err = drm_addmap(dev, 0, primary_size, _DRM_CONSISTENT,
+				 _DRM_READ_ONLY, &dev_priv->primary);
+		if (!err)
 			break;
-		}
 	}
 
-	if (dev_priv->primary_dmah == NULL) {
+	if (err != 0) {
 		DRM_ERROR("Unable to allocate primary DMA region\n");
 		return DRM_ERR(ENOMEM);
 	}
 
-	if (dev_priv->primary_dmah->size != dma_bs->primary_size) {
+	if (dev_priv->primary->size != dma_bs->primary_size) {
 		DRM_INFO("Primary DMA buffer size reduced from %u to %u.\n",
 			 dma_bs->primary_size, 
-			 (unsigned) dev_priv->primary_dmah->size);
-		dma_bs->primary_size = dev_priv->primary_dmah->size;
-	}
-
-	err = mga_fake_addmap(dev_priv->primary_dmah, & dev_priv->primary);
-	if (err) {
-		DRM_ERROR("Unable to map primary DMA region\n");
-		return err;
+			 (unsigned) dev_priv->primary->size);
+		dma_bs->primary_size = dev_priv->primary->size;
 	}
 
-
 	for ( bin_count = dma_bs->secondary_bin_count
 	      ; bin_count > 0 
 	      ; bin_count-- ) {
@@ -970,47 +921,8 @@ static int mga_do_cleanup_dma(drm_device_t * dev)
 			drm_core_ioremapfree(dev->agp_buffer_map, dev);
 
 		if (dev_priv->used_new_dma_init) {
-			if (dev_priv->warp != NULL) {
-				drm_rmmap(dev, (void *) dev_priv->warp->offset);
-			}
-
-			if (dev_priv->primary != NULL) {
-				if (dev_priv->primary->type != _DRM_CONSISTENT) {
-					drm_rmmap(dev, (void *) dev_priv->primary->offset);
-				}
-				else {
-					drm_free(dev_priv->primary, sizeof(drm_map_t), DRM_MEM_DRIVER);
-				}
-			}
-
-			if (dev_priv->warp_dmah != NULL) {
-				drm_pci_free(dev, dev_priv->warp_dmah);
-				dev_priv->warp_dmah = NULL;
-			}
-
-			if (dev_priv->primary_dmah != NULL) {
-				drm_pci_free(dev, dev_priv->primary_dmah);
-				dev_priv->primary_dmah = NULL;
-			}
-
-			if (dev_priv->mmio != NULL) {
-				drm_rmmap(dev, (void *) dev_priv->mmio->offset);
-			}
-
-			if (dev_priv->status != NULL) {
-				drm_rmmap(dev, (void *) dev_priv->status->offset);
-			}
-
 			if (dev_priv->agp_mem != NULL) {
-				if (dev->agp_buffer_map != NULL) {
-					drm_rmmap(dev, (void *) dev->agp_buffer_map->offset);
-				}
-
-				if (dev_priv->agp_textures != NULL) {
-					drm_rmmap(dev, (void *) dev_priv->agp_textures->offset);
-					dev_priv->agp_textures = NULL;
-				}
-
+				dev_priv->agp_textures = NULL;
 				drm_unbind_agp(dev_priv->agp_mem);
 
 				drm_free_agp(dev_priv->agp_mem, dev_priv->agp_pages);
diff --git a/shared-core/mga_drv.h b/shared-core/mga_drv.h
index 7a1799b9..8f3ff5ca 100644
--- a/shared-core/mga_drv.h
+++ b/shared-core/mga_drv.h
@@ -107,18 +107,6 @@ typedef struct drm_mga_private {
 	 */
 	u32 wagp_enable;
 
-	
-	/**
-	 * \name Handles for PCI consistent memory.
-	 * 
-	 * \sa drm_mga_private_t::primary, drm_mga_private_t::warp
-	 */
-	/*@{*/
-	drm_dma_handle_t * warp_dmah;    /**< Handle for WARP ucode region. */
-	drm_dma_handle_t * primary_dmah; /**< Handle for primary DMA region. */
-	/*@}*/
-
-
 	/**
 	 * \name MMIO region parameters.
 	 * 
diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c
index b5e74451..7da83960 100644
--- a/shared-core/radeon_cp.c
+++ b/shared-core/radeon_cp.c
@@ -2034,37 +2034,36 @@ int radeon_preinit(struct drm_device *dev, unsigned long flags)
 		break;
 	}
 
-	ret = drm_initmap(dev, drm_get_resource_start(dev, 2),
-			  drm_get_resource_len(dev, 2), 2, _DRM_REGISTERS, _DRM_READ_ONLY);
-	if (ret != 0)
-		return ret;
-
-	ret = drm_initmap(dev, drm_get_resource_start(dev, 0),
-			  drm_get_resource_len(dev, 0), 0, _DRM_FRAME_BUFFER,
-			  _DRM_WRITE_COMBINING);
-	if (ret != 0)
-		return ret;
-
-	/* The original method of detecting AGP is known to not work correctly,
-	 * according to Mike Harris.  The solution is to walk the capabilities
-	 * list, which should be done in drm_device_is_agp().
-	 */
 	if (drm_device_is_agp(dev))
 		dev_priv->flags |= CHIP_IS_AGP;
 
 	DRM_DEBUG("%s card detected\n",
 		  ((dev_priv->flags & CHIP_IS_AGP) ? "AGP" : "PCI"));
 
-#if defined(__linux__)
-	/* Check if we need a reset */
-	if (!
-	    (dev_priv->mmio =
-	     drm_core_findmap(dev, pci_resource_start(dev->pdev, 2))))
-		return DRM_ERR(ENOMEM);
-#endif
 	return ret;
 }
 
+int radeon_presetup(struct drm_device *dev)
+{
+	int ret;
+	drm_local_map_t *map;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+
+	ret = drm_addmap(dev, drm_get_resource_start(dev, 2),
+			 drm_get_resource_len(dev, 2), _DRM_REGISTERS,
+			 _DRM_READ_ONLY, &dev_priv->mmio);
+	if (ret != 0)
+		return ret;
+
+	ret = drm_addmap(dev, drm_get_resource_start(dev, 0),
+			 drm_get_resource_len(dev, 0), _DRM_FRAME_BUFFER,
+			 _DRM_WRITE_COMBINING, &map);
+	if (ret != 0)
+		return ret;
+
+	return 0;
+}
+
 int radeon_postcleanup(struct drm_device *dev)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
diff --git a/shared-core/radeon_drv.h b/shared-core/radeon_drv.h
index 8b05aab8..b613f4c0 100644
--- a/shared-core/radeon_drv.h
+++ b/shared-core/radeon_drv.h
@@ -883,6 +883,7 @@ do {									\
 } while (0)
 
 extern int radeon_preinit(struct drm_device *dev, unsigned long flags);
+extern int radeon_presetup(struct drm_device *dev);
 extern int radeon_postcleanup(struct drm_device *dev);
 
 #define CP_PACKET0( reg, n )						\
diff --git a/shared-core/savage_bci.c b/shared-core/savage_bci.c
index 150f74b4..bfd760ea 100644
--- a/shared-core/savage_bci.c
+++ b/shared-core/savage_bci.c
@@ -537,18 +537,20 @@ static void savage_fake_dma_flush(drm_savage_private_t *dev_priv)
 }
 
 /*
- * Initalize permanent mappings. On Savage4 and SavageIX the alignment
+ * Initalize mappings. On Savage4 and SavageIX the alignment
  * and size of the aperture is not suitable for automatic MTRR setup
- * in drm_initmap. Therefore we do it manually before the maps are
+ * in drm_addmap. Therefore we do it manually before the maps are
  * initialized. We also need to take care of deleting the MTRRs in
  * postcleanup.
- *
- * FIXME: this is linux-specific
  */
 int savage_preinit(drm_device_t *dev, unsigned long chipset)
 {
 	drm_savage_private_t *dev_priv;
 	unsigned long mmio_base, fb_base, fb_size, aperture_base;
+	/* fb_rsrc and aper_rsrc aren't really used currently, but still exist
+	 * in case we decide we need information on the BAR for BSD in the
+	 * future.
+	 */
 	unsigned int fb_rsrc, aper_rsrc;
 	int ret = 0;
 
@@ -623,24 +625,21 @@ int savage_preinit(drm_device_t *dev, unsigned long chipset)
 		/* Automatic MTRR setup will do the right thing. */
 	}
 
-	if ((ret = drm_initmap(dev, mmio_base, SAVAGE_MMIO_SIZE, 0,
-			       _DRM_REGISTERS, _DRM_READ_ONLY)))
+	ret = drm_addmap(dev, mmio_base, SAVAGE_MMIO_SIZE, _DRM_REGISTERS,
+			 _DRM_READ_ONLY, &dev_priv->mmio);
+	if (ret)
 		return ret;
-	if (!(dev_priv->mmio = drm_core_findmap (dev, mmio_base)))
-		return DRM_ERR(ENOMEM);
 
-	if ((ret = drm_initmap(dev, fb_base, fb_size, fb_rsrc,
-			       _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING)))
+	ret = drm_addmap(dev, fb_base, fb_size, _DRM_FRAME_BUFFER,
+			 _DRM_WRITE_COMBINING, &dev_priv->fb);
+	if (ret)
 		return ret;
-	if (!(dev_priv->fb = drm_core_findmap (dev, fb_base)))
-		return DRM_ERR(ENOMEM);
 
-	if ((ret = drm_initmap(dev, aperture_base, SAVAGE_APERTURE_SIZE,
-			       aper_rsrc,
-			       _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING)))
+	ret = drm_addmap(dev, aperture_base, SAVAGE_APERTURE_SIZE,
+			 _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING,
+			 &dev_priv->aperture);
+	if (ret)
 		return ret;
-	if (!(dev_priv->aperture = drm_core_findmap (dev, aperture_base)))
-		return DRM_ERR(ENOMEM);
 
 	return ret;
 }