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authorDave Airlie <airlied@nx6125b.(none)>2007-06-05 12:26:06 +1000
committerDave Airlie <airlied@nx6125b.(none)>2007-06-05 12:26:06 +1000
commit4294dcc050c5d2685f633e8a52deb925d806be85 (patch)
treee564842fd5c8a333f44a4b048c88235c15970b6e /shared-core
parent234a9062009e48bf7b6c7239564ab95b3bcb06aa (diff)
complete PCIE backend for ttm
ttm test runs with it at least, needs to do more testing on it
Diffstat (limited to 'shared-core')
-rw-r--r--shared-core/radeon_cp.c20
-rw-r--r--shared-core/radeon_drv.h1
2 files changed, 21 insertions, 0 deletions
diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c
index 56d17b9a..9dc871ca 100644
--- a/shared-core/radeon_cp.c
+++ b/shared-core/radeon_cp.c
@@ -1384,6 +1384,26 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
}
}
+
+void radeon_gart_flush(struct drm_device *dev)
+{
+ drm_radeon_private_t *dev_priv = dev->dev_private;
+
+ if (dev_priv->flags & RADEON_IS_IGPGART) {
+ RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_FLUSH);
+ RADEON_WRITE_IGPGART(RADEON_IGPGART_FLUSH, 0x1);
+ RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_FLUSH);
+ RADEON_WRITE_IGPGART(RADEON_IGPGART_FLUSH, 0x0);
+ } else if (dev_priv->flags & RADEON_IS_PCIE) {
+
+
+ } else {
+
+
+ }
+
+}
+
static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
{
drm_radeon_private_t *dev_priv = dev->dev_private;
diff --git a/shared-core/radeon_drv.h b/shared-core/radeon_drv.h
index c16a43eb..5a33231a 100644
--- a/shared-core/radeon_drv.h
+++ b/shared-core/radeon_drv.h
@@ -344,6 +344,7 @@ extern int radeon_cp_resume(DRM_IOCTL_ARGS);
extern int radeon_engine_reset(DRM_IOCTL_ARGS);
extern int radeon_fullscreen(DRM_IOCTL_ARGS);
extern int radeon_cp_buffers(DRM_IOCTL_ARGS);
+extern void radeon_gart_flush(struct drm_device *dev);
extern void radeon_freelist_reset(drm_device_t * dev);
extern drm_buf_t *radeon_freelist_get(drm_device_t * dev);