diff options
| author | Keith Packard <keithp@keithp.com> | 2008-06-13 10:27:39 -0700 |
|---|---|---|
| committer | Keith Packard <keithp@keithp.com> | 2008-06-13 14:29:46 -0700 |
| commit | 3762c9ea6754763694b1de4df3acd9dc37247f87 (patch) | |
| tree | b66355348ec7392c9f4e210c79ed0c28680032cd /shared-core | |
| parent | 5957470ca3be6c0225985f74b1511401e02c014b (diff) | |
[intel] Enable MSI for i915 IRQ
Diffstat (limited to 'shared-core')
| -rw-r--r-- | shared-core/i915_irq.c | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c index 58781a4a..9ba5b00a 100644 --- a/shared-core/i915_irq.c +++ b/shared-core/i915_irq.c @@ -33,6 +33,13 @@ #define MAX_NOPID ((u32)~0) +/* + * These are the interrupts used by the driver + */ +#define I915_INTERRUPT_ENABLE_MASK (I915_USER_INTERRUPT | \ + I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | \ + I915_DISPLAY_PIPE_B_EVENT_INTERRUPT) + /** * i915_get_pipe - return the the pipe associated with a given plane * @dev: DRM device @@ -443,6 +450,8 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) u32 pipea_stats = 0, pipeb_stats = 0; int vblank = 0; + if (dev->pdev->msi_enabled) + I915_WRITE(I915REG_INT_ENABLE_R, 0); iir = I915_READ(I915REG_INT_IDENTITY_R); #if 0 DRM_DEBUG("flag=%08x\n", iir); @@ -454,6 +463,9 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) I915_READ(I915REG_INT_ENABLE_R), I915_READ(I915REG_PIPEASTAT), I915_READ(I915REG_PIPEBSTAT)); + if (dev->pdev->msi_enabled) + I915_WRITE(I915REG_INT_ENABLE_R, + I915_INTERRUPT_ENABLE_MASK); return IRQ_NONE; } @@ -498,6 +510,8 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) drm_locked_tasklet(dev, i915_vblank_tasklet); } + if (dev->pdev->msi_enabled) + I915_WRITE(I915REG_INT_ENABLE_R, I915_INTERRUPT_ENABLE_MASK); return IRQ_HANDLED; } @@ -724,11 +738,9 @@ static void i915_enable_interrupt (struct drm_device *dev) { drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; - dev_priv->irq_mask_reg = (I915_USER_INTERRUPT | - I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | - I915_DISPLAY_PIPE_B_EVENT_INTERRUPT); + dev_priv->irq_mask_reg = I915_INTERRUPT_ENABLE_MASK; I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg); - I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_mask_reg); + I915_WRITE(I915REG_INT_ENABLE_R, I915_INTERRUPT_ENABLE_MASK); (void) I915_READ (I915REG_INT_ENABLE_R); dev_priv->irq_enabled = 1; } |