Add some new via chipsets.

Disable 3D functionality and AGP DMA for chipsets with the DX9 3D engine.

1 files changed, 11 insertions, 7 deletions

diff --git a/shared-core/via_irq.c b/shared-core/via_irq.c
index db60b28e..2ac86970 100644
--- a/shared-core/via_irq.c
+++ b/shared-core/via_irq.c
@@ -267,13 +267,17 @@ void via_driver_irq_preinstall(drm_device_t * dev)
 		dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE;
 		dev_priv->irq_pending_mask = VIA_IRQ_VBLANK_PENDING;
 
-		dev_priv->irq_masks = (dev_priv->pro_group_a) ?
-			via_pro_group_a_irqs : via_unichrome_irqs;
-		dev_priv->num_irqs = (dev_priv->pro_group_a) ?
-			via_num_pro_group_a : via_num_unichrome;
-		dev_priv->irq_map = (dev_priv->pro_group_a) ?
-			via_irqmap_pro_group_a : via_irqmap_unichrome;
-		
+		if (dev_priv->chipset == VIA_PRO_GROUP_A ||
+		    dev_priv->chipset == VIA_DX9_0) {
+			dev_priv->irq_masks = via_pro_group_a_irqs;
+			dev_priv->num_irqs = via_num_pro_group_a;
+			dev_priv->irq_map = via_irqmap_pro_group_a;
+		} else {
+			dev_priv->irq_masks = via_unichrome_irqs;
+			dev_priv->num_irqs = via_num_unichrome;
+			dev_priv->irq_map = via_irqmap_unichrome;
+		}
+
 		for(i=0; i < dev_priv->num_irqs; ++i) {
 			atomic_set(&cur_irq->irq_received, 0);
 			cur_irq->enable_mask = dev_priv->irq_masks[i][0];