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| author | Michel Daenzer <michel@daenzer.net> | 2002-08-11 15:56:44 +0000 |
|---|---|---|
| committer | Michel Daenzer <michel@daenzer.net> | 2002-08-11 15:56:44 +0000 |
| commit | d0ac4e5ad0481eb634b3b811a94f4a2b6587e479 (patch) | |
| tree | 7f536e793cfb4e418ba0ccd13394a92013b6f850 /shared-core/radeon_drv.h | |
| parent | d2f2b42f1d206fd248ada48ce2c498e31351ab33 (diff) | |
test scratch register writeback before using it
Diffstat (limited to 'shared-core/radeon_drv.h')
| -rw-r--r-- | shared-core/radeon_drv.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/shared-core/radeon_drv.h b/shared-core/radeon_drv.h index ae66f12e..15c0d4dd 100644 --- a/shared-core/radeon_drv.h +++ b/shared-core/radeon_drv.h @@ -76,6 +76,7 @@ typedef struct drm_radeon_private { drm_radeon_freelist_t *tail; int last_buf; volatile u32 *scratch; + int writeback_works; int usec_timeout; int is_pci; @@ -220,6 +221,10 @@ extern int radeon_cp_flip( DRM_IOCTL_ARGS ); #define RADEON_SCRATCH_UMSK 0x0770 #define RADEON_SCRATCH_ADDR 0x0774 +#define GET_SCRATCH( x ) (dev_priv->writeback_works \ + ? DRM_READ32( &dev_priv->scratch[(x)] ) \ + : RADEON_READ( RADEON_SCRATCH_REG0 + 4*(x) ) ) + #define RADEON_HOST_PATH_CNTL 0x0130 # define RADEON_HDP_SOFT_RESET (1 << 26) # define RADEON_HDP_WC_TIMEOUT_MASK (7 << 28) |