Merge branch 'master' of ssh+git://git.freedesktop.org/git/mesa/drm into xgi-0-0-2

Conflicts:

	linux-core/drmP.h
	linux-core/drm_scatter.c

1 files changed, 20 insertions, 20 deletions

diff --git a/shared-core/nv50_instmem.c b/shared-core/nv50_instmem.c
index 81c60829..c26b1db5 100644
--- a/shared-core/nv50_instmem.c
+++ b/shared-core/nv50_instmem.c
@@ -39,9 +39,9 @@ typedef struct {
 #define NV50_INSTMEM_PT_SIZE(a)	(((a) >> 12) << 3)
 
 int
-nv50_instmem_init(drm_device_t *dev)
+nv50_instmem_init(struct drm_device *dev)
 {
-	drm_nouveau_private_t *dev_priv = dev->dev_private;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
 	nv50_instmem_priv *priv;
 	uint32_t rv, pt, pts, cb, cb0, cb1, unk, as;
 	uint32_t i, v;
@@ -49,7 +49,7 @@ nv50_instmem_init(drm_device_t *dev)
 
 	priv = drm_calloc(1, sizeof(*priv), DRM_MEM_DRIVER);
 	if (!priv)
-		return DRM_ERR(ENOMEM);
+		return -ENOMEM;
 	dev_priv->Engine.instmem.priv = priv;
 
 	/* Save current state */
@@ -126,14 +126,14 @@ nv50_instmem_init(drm_device_t *dev)
 	NV_WRITE(0x1700, pt >> 16);
 	if (NV_READ(0x700000) != NV_RI32(0)) {
 		DRM_ERROR("Failed to init PRAMIN page table\n");
-		return DRM_ERR(EINVAL);
+		return -EINVAL;
 	}
 
 	/* Create a heap to manage PRAMIN aperture allocations */
 	ret = nouveau_mem_init_heap(&dev_priv->ramin_heap, pts, as-pts);
 	if (ret) {
 		DRM_ERROR("Failed to init PRAMIN heap\n");
-		return DRM_ERR(ENOMEM);
+		return -ENOMEM;
 	}
 	DRM_DEBUG("NV50: PRAMIN setup ok\n");
 
@@ -150,9 +150,9 @@ nv50_instmem_init(drm_device_t *dev)
 }
 
 void
-nv50_instmem_takedown(drm_device_t *dev)
+nv50_instmem_takedown(struct drm_device *dev)
 {
-	drm_nouveau_private_t *dev_priv = dev->dev_private;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
 	nv50_instmem_priv *priv = dev_priv->Engine.instmem.priv;
 	int i;
 
@@ -168,30 +168,30 @@ nv50_instmem_takedown(drm_device_t *dev)
 }
 
 int
-nv50_instmem_populate(drm_device_t *dev, nouveau_gpuobj_t *gpuobj, uint32_t *sz)
+nv50_instmem_populate(struct drm_device *dev, struct nouveau_gpuobj *gpuobj, uint32_t *sz)
 {
 	if (gpuobj->im_backing)
-		return DRM_ERR(EINVAL);
+		return -EINVAL;
 
 	*sz = (*sz + (NV50_INSTMEM_PAGE_SIZE-1)) & ~(NV50_INSTMEM_PAGE_SIZE-1);
 	if (*sz == 0)
-		return DRM_ERR(EINVAL);
+		return -EINVAL;
 
 	gpuobj->im_backing = nouveau_mem_alloc(dev, NV50_INSTMEM_PAGE_SIZE,
 					       *sz, NOUVEAU_MEM_FB,
-					       (DRMFILE)-2);
+					       (struct drm_file *)-2);
 	if (!gpuobj->im_backing) {
 		DRM_ERROR("Couldn't allocate vram to back PRAMIN pages\n");
-		return DRM_ERR(ENOMEM);
+		return -ENOMEM;
 	}
 
 	return 0;
 }
 
 void
-nv50_instmem_clear(drm_device_t *dev, nouveau_gpuobj_t *gpuobj)
+nv50_instmem_clear(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
 {
-	drm_nouveau_private_t *dev_priv = dev->dev_private;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
 
 	if (gpuobj && gpuobj->im_backing) {
 		if (gpuobj->im_bound)
@@ -202,13 +202,13 @@ nv50_instmem_clear(drm_device_t *dev, nouveau_gpuobj_t *gpuobj)
 }
 
 int
-nv50_instmem_bind(drm_device_t *dev, nouveau_gpuobj_t *gpuobj)
+nv50_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
 {
-	drm_nouveau_private_t *dev_priv = dev->dev_private;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
 	uint32_t pte, pte_end, vram;
 
 	if (!gpuobj->im_backing || !gpuobj->im_pramin || gpuobj->im_bound)
-		return DRM_ERR(EINVAL);
+		return -EINVAL;
 
 	DRM_DEBUG("st=0x%0llx sz=0x%0llx\n",
 		  gpuobj->im_pramin->start, gpuobj->im_pramin->size);
@@ -240,13 +240,13 @@ nv50_instmem_bind(drm_device_t *dev, nouveau_gpuobj_t *gpuobj)
 }
 
 int
-nv50_instmem_unbind(drm_device_t *dev, nouveau_gpuobj_t *gpuobj)
+nv50_instmem_unbind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
 {
-	drm_nouveau_private_t *dev_priv = dev->dev_private;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
 	uint32_t pte, pte_end;
 
 	if (gpuobj->im_bound == 0)
-		return DRM_ERR(EINVAL);
+		return -EINVAL;
 
 	pte     = (gpuobj->im_pramin->start >> 12) << 3;
 	pte_end = ((gpuobj->im_pramin->size >> 12) << 3) + pte;