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| author | Ben Skeggs <skeggsb@gmail.com> | 2007-08-15 00:56:24 +1000 |
|---|---|---|
| committer | Ben Skeggs <skeggsb@gmail.com> | 2007-08-15 01:04:41 +1000 |
| commit | 02c4e0e757b69cd6ae38b8ab2c078b3f06fea661 (patch) | |
| tree | fd1a71ecb661b7f491428777c6bbce74b1511e54 /shared-core/nv40_fifo.c | |
| parent | 3ee211f4f7435792752c1dbcd3a60e2e7abfba09 (diff) | |
nouveau/nv40: Fix channel scheduling.
Ensure NV_PFIFO_DMA_TIMESLICE_TIMEOUT_ENABLE gets set, otherwise channels
will appear to "freeze" in some circumstances.
Diffstat (limited to 'shared-core/nv40_fifo.c')
| -rw-r--r-- | shared-core/nv40_fifo.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/shared-core/nv40_fifo.c b/shared-core/nv40_fifo.c index eb160ee2..ce3f8fdd 100644 --- a/shared-core/nv40_fifo.c +++ b/shared-core/nv40_fifo.c @@ -193,3 +193,16 @@ nv40_fifo_save_context(struct nouveau_channel *chan) return 0; } +int +nv40_fifo_init(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + int ret; + + if ((ret = nouveau_fifo_init(dev))) + return ret; + + NV_WRITE(NV04_PFIFO_DMA_TIMESLICE, 0x2101ffff); + return 0; +} + |