diff options
author | Kristian Høgsberg <krh@bitplanet.net> | 2009-11-17 09:46:56 -0500 |
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committer | Kristian Høgsberg <krh@bitplanet.net> | 2009-11-17 10:54:11 -0500 |
commit | 9dd3613073aa2491cef440725fdfa0cf1e8f1a42 (patch) | |
tree | 956c84be2fae4b4e6de2840a94d30dffa6573066 /shared-core/nv04_timer.c | |
parent | a66cf9ce68bdf9bd887f91a38ced4b59c129b3c7 (diff) |
Drop shared-core, bsd-core, linux-core and scripts subdirs
Diffstat (limited to 'shared-core/nv04_timer.c')
-rw-r--r-- | shared-core/nv04_timer.c | 53 |
1 files changed, 0 insertions, 53 deletions
diff --git a/shared-core/nv04_timer.c b/shared-core/nv04_timer.c deleted file mode 100644 index 616f197b..00000000 --- a/shared-core/nv04_timer.c +++ /dev/null @@ -1,53 +0,0 @@ -#include "drmP.h" -#include "drm.h" -#include "nouveau_drv.h" -#include "nouveau_drm.h" - -int -nv04_timer_init(struct drm_device *dev) -{ - struct drm_nouveau_private *dev_priv = dev->dev_private; - - NV_WRITE(NV04_PTIMER_INTR_EN_0, 0x00000000); - NV_WRITE(NV04_PTIMER_INTR_0, 0xFFFFFFFF); - - /* Just use the pre-existing values when possible for now; these regs - * are not written in nv (driver writer missed a /4 on the address), and - * writing 8 and 3 to the correct regs breaks the timings on the LVDS - * hardware sequencing microcode. - * A correct solution (involving calculations with the GPU PLL) can - * be done when kernel modesetting lands - */ - if (!NV_READ(NV04_PTIMER_NUMERATOR) || !NV_READ(NV04_PTIMER_DENOMINATOR)) { - NV_WRITE(NV04_PTIMER_NUMERATOR, 0x00000008); - NV_WRITE(NV04_PTIMER_DENOMINATOR, 0x00000003); - } - - return 0; -} - -uint64_t -nv04_timer_read(struct drm_device *dev) -{ - struct drm_nouveau_private *dev_priv = dev->dev_private; - uint32_t low; - /* From kmmio dumps on nv28 this looks like how the blob does this. - * It reads the high dword twice, before and after. - * The only explanation seems to be that the 64-bit timer counter - * advances between high and low dword reads and may corrupt the - * result. Not confirmed. - */ - uint32_t high2 = NV_READ(NV04_PTIMER_TIME_1); - uint32_t high1; - do { - high1 = high2; - low = NV_READ(NV04_PTIMER_TIME_0); - high2 = NV_READ(NV04_PTIMER_TIME_1); - } while(high1 != high2); - return (((uint64_t)high2) << 32) | (uint64_t)low; -} - -void -nv04_timer_takedown(struct drm_device *dev) -{ -} |