diff options
author | Eric Anholt <eric@anholt.net> | 2007-07-19 06:31:26 -0700 |
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committer | Eric Anholt <eric@anholt.net> | 2007-07-19 06:31:26 -0700 |
commit | 05204b9c8d021e019456a8dbd83c012e277c7aaf (patch) | |
tree | 5639c2821d47e92cc615059cbc12e9c050753230 /shared-core/nv04_timer.c | |
parent | e544286eae71a6b150af4d86096895c14e42c36e (diff) | |
parent | 0c95d489abd19efd2ba017e78a4b28cea0854e77 (diff) |
Merge branch 'origin'
Diffstat (limited to 'shared-core/nv04_timer.c')
-rw-r--r-- | shared-core/nv04_timer.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/shared-core/nv04_timer.c b/shared-core/nv04_timer.c index efe78da7..08a27f4f 100644 --- a/shared-core/nv04_timer.c +++ b/shared-core/nv04_timer.c @@ -17,6 +17,27 @@ nv04_timer_init(struct drm_device *dev) return 0; } +uint64_t +nv04_timer_read(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + uint32_t low; + /* From kmmio dumps on nv28 this looks like how the blob does this. + * It reads the high dword twice, before and after. + * The only explanation seems to be that the 64-bit timer counter + * advances between high and low dword reads and may corrupt the + * result. Not confirmed. + */ + uint32_t high2 = NV_READ(NV04_PTIMER_TIME_1); + uint32_t high1; + do { + high1 = high2; + low = NV_READ(NV04_PTIMER_TIME_0); + high2 = NV_READ(NV04_PTIMER_TIME_1); + } while(high1 != high2); + return (((uint64_t)high2) << 32) | (uint64_t)low; +} + void nv04_timer_takedown(struct drm_device *dev) { |