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| author | Keith Packard <keithp@keithp.com> | 2008-06-21 00:33:07 -0700 |
|---|---|---|
| committer | Keith Packard <keithp@keithp.com> | 2008-06-21 00:33:07 -0700 |
| commit | a369bf0e575697308690f532576caf652e42b4cb (patch) | |
| tree | 44c128291caf9199d3d1a109ef6fcea03cd79057 /shared-core/nv04_timer.c | |
| parent | 8be6ec491f7b9c633a426a34006ea4ff5a3f8392 (diff) | |
[intel] Use IMR instead of IER to pend interrupts during ISR
Noting that the interrupt mask register was more reliable than the interrupt
enable register for managing interrupts in user_irq_on/user_irq_off, this
patch replaces the remaining IER frobbing with IMR instead.
The test which exposes IER related failures is:
$ glxgears & glxgears & glxgears
(reposition the glxgears windows away from the upper left corner)
$ while :; do x11perf -rect100 -reps 800 -repeat 1; sleep 1; done &
$ while :; do runoa; runet; done &
Diffstat (limited to 'shared-core/nv04_timer.c')
0 files changed, 0 insertions, 0 deletions