diff options
author | Matthieu Castet <mat@mat-pc.(none)> | 2007-01-13 23:19:41 +0100 |
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committer | Matthieu Castet <mat@mat-pc.(none)> | 2007-01-13 23:19:41 +0100 |
commit | f04347f371c6c9c3a47550c6b7d26b7bd5629c85 (patch) | |
tree | 29f7425600add81fbffceecb1d6787b7f224cd65 /shared-core/nouveau_fifo.c | |
parent | cd5f543b2f3d6dd4c45f676c6fb9848b4d8a1c33 (diff) |
nouveau: nv20 graph ctx switch.
Untested...
Diffstat (limited to 'shared-core/nouveau_fifo.c')
-rw-r--r-- | shared-core/nouveau_fifo.c | 28 |
1 files changed, 21 insertions, 7 deletions
diff --git a/shared-core/nouveau_fifo.c b/shared-core/nouveau_fifo.c index cb94afc5..1e2870f1 100644 --- a/shared-core/nouveau_fifo.c +++ b/shared-core/nouveau_fifo.c @@ -550,15 +550,22 @@ static int nouveau_fifo_alloc(drm_device_t* dev,drm_nouveau_fifo_alloc_t* init, /* Construct inital RAMFC for new channel */ if (dev_priv->card_type < NV_10) { nouveau_nv04_context_init(dev, init); - } else if (dev_priv->card_type < NV_30) { + } else if (dev_priv->card_type < NV_20) { nv10_graph_context_create(dev, init->channel); nouveau_nv10_context_init(dev, init); - } else if (dev_priv->card_type < NV_40) { - ret = nv30_graph_context_create(dev, init->channel); - if (ret) { - nouveau_fifo_free(dev, init->channel); - return ret; - } + } else if (dev_priv->card_type < NV_30) { + ret = nv20_graph_context_create(dev, init->channel); + if (ret) { + nouveau_fifo_free(dev, init->channel); + return ret; + } + nouveau_nv10_context_init(dev, init); + } else if (dev_priv->card_type < NV_40) { + ret = nv30_graph_context_create(dev, init->channel); + if (ret) { + nouveau_fifo_free(dev, init->channel); + return ret; + } nouveau_nv30_context_init(dev, init); } else { ret = nv40_graph_context_create(dev, init->channel); @@ -652,6 +659,13 @@ void nouveau_fifo_free(drm_device_t* dev,int n) if (dev_priv->card_type >= NV_40) nouveau_instmem_free(dev, dev_priv->fifos[n].ramin_grctx); + else if (dev_priv->card_type >= NV_30) { + } + else if (dev_priv->card_type >= NV_20) { + /* clear ctx table */ + INSTANCE_WR(dev_priv->ctx_table, n, 0); + nouveau_instmem_free(dev, dev_priv->fifos[n].ramin_grctx); + } /* reenable the fifo caches */ NV_WRITE(NV_PFIFO_CACHES, 0x00000001); |