diff options
author | Ian Romanick <idr@us.ibm.com> | 2005-06-14 22:34:11 +0000 |
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committer | Ian Romanick <idr@us.ibm.com> | 2005-06-14 22:34:11 +0000 |
commit | 72cfc797b51e59ecf8a2787c6a176838241cc94b (patch) | |
tree | 87ade354c97e962a29b3d1fc8b620972754092eb /shared-core/mga_drv.h | |
parent | 3585bdf7d81a92c729bb5bcbc7cfca6048d640ce (diff) |
Adds support for PCI cards to MGA DRM
This patch adds serveral new ioctls and a new query to get_param query to
support PCI MGA cards.
Two ioctls were added to implement interrupt based waiting. With this
change, the client-side driver no longer needs to map the primary DMA
region or the MMIO region. Previously, end-of-frame waiting was done by
busy waiting in the client-side driver until one of the MMIO registers
(the current DMA pointer) matched a pointer to the end of primary DMA
space. By using interrupts, the busy waiting and the extra mappings are
removed.
A third ioctl was added to bootstrap DMA. This ioctl, which is used by the
X-server, moves a *LOT* of code from the X-server into the kernel. This
allows the kernel to do whatever needs to be done to setup DMA buffers.
The entire process and the locations of the buffers are hidden from
user-mode.
Additionally, a get_param query was added to differentiate between G4x0
cards and G550 cards. A gap was left in the numbering sequence so that,
if needed, G450 cards could be distinguished from G400 cards. According
to Ville Syrjälä, the G4x0 cards and the G550 cards handle
anisotropic filtering differently. This seems the most compatible way
to let the client-side driver know which card it's own. Doing this very
small change now eliminates the need to bump the DRM minor version
twice.
http://marc.theaimsgroup.com/?l=dri-devel&m=106625815319773&w=2
A number of ioctl handlers in linux-core were also modified so that they
could be called in-kernel. In these cases, the in-kernel callable
version kept the existing name (e.g., drm_agp_acquire) and the ioctl
handler added _ioctl to the name (e.g., drm_agp_acquire_ioctl).
This patch also replaces the drm_agp_do_release function with
drm_agp_release. drm_agp_release (drm_core_agp_release in the previous
patch) is very similar to drm_agp_do_release, and I saw no reason to
have both.
This commit *breaks the build* on BSD. Eric said that he would make the
required updates to the BSD side soon.
Xorg bug: 3259 Reviewed by: Eric Anholt
Diffstat (limited to 'shared-core/mga_drv.h')
-rw-r--r-- | shared-core/mga_drv.h | 64 |
1 files changed, 61 insertions, 3 deletions
diff --git a/shared-core/mga_drv.h b/shared-core/mga_drv.h index 180c1235..7a1799b9 100644 --- a/shared-core/mga_drv.h +++ b/shared-core/mga_drv.h @@ -38,11 +38,11 @@ #define DRIVER_NAME "mga" #define DRIVER_DESC "Matrox G200/G400" -#define DRIVER_DATE "20050606" +#define DRIVER_DATE "20050607" #define DRIVER_MAJOR 3 -#define DRIVER_MINOR 1 -#define DRIVER_PATCHLEVEL 3 +#define DRIVER_MINOR 2 +#define DRIVER_PATCHLEVEL 0 typedef struct drm_mga_primary_buffer { u8 *start; @@ -87,9 +87,55 @@ typedef struct drm_mga_private { int chipset; int usec_timeout; + /** + * If set, the new DMA initialization sequence was used. This is + * primarilly used to select how the driver should uninitialized its + * internal DMA structures. + */ + int used_new_dma_init; + + /** + * If AGP memory is used for DMA buffers, this will be the value + * \c MGA_PAGPXFER. Otherwise, it will be zero (for a PCI transfer). + */ + u32 dma_access; + + /** + * If AGP memory is used for DMA buffers, this will be the value + * \c MGA_WAGP_ENABLE. Otherwise, it will be zero (for a PCI + * transfer). + */ + u32 wagp_enable; + + + /** + * \name Handles for PCI consistent memory. + * + * \sa drm_mga_private_t::primary, drm_mga_private_t::warp + */ + /*@{*/ + drm_dma_handle_t * warp_dmah; /**< Handle for WARP ucode region. */ + drm_dma_handle_t * primary_dmah; /**< Handle for primary DMA region. */ + /*@}*/ + + + /** + * \name MMIO region parameters. + * + * \sa drm_mga_private_t::mmio + */ + /*@{*/ + u32 mmio_base; /**< Bus address of base of MMIO. */ + u32 mmio_size; /**< Size of the MMIO region. */ + /*@}*/ + u32 clear_cmd; u32 maccess; + wait_queue_head_t fence_queue; + atomic_t last_fence_retired; + u32 next_fence_to_post; + unsigned int fb_cpp; unsigned int front_offset; unsigned int front_pitch; @@ -109,10 +155,14 @@ typedef struct drm_mga_private { drm_local_map_t *warp; drm_local_map_t *primary; drm_local_map_t *agp_textures; + + DRM_AGP_MEM *agp_mem; + unsigned int agp_pages; } drm_mga_private_t; /* mga_dma.c */ extern int mga_driver_preinit(drm_device_t * dev, unsigned long flags); +extern int mga_dma_bootstrap(DRM_IOCTL_ARGS); extern int mga_dma_init(DRM_IOCTL_ARGS); extern int mga_dma_flush(DRM_IOCTL_ARGS); extern int mga_dma_reset(DRM_IOCTL_ARGS); @@ -134,6 +184,8 @@ extern unsigned int mga_warp_microcode_size(const drm_mga_private_t * dev_priv); extern int mga_warp_install_microcode(drm_mga_private_t * dev_priv); extern int mga_warp_init(drm_mga_private_t * dev_priv); + /* mga_irq.c */ +extern int mga_driver_fence_wait(drm_device_t * dev, unsigned int *sequence); extern int mga_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence); extern irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS); extern void mga_driver_irq_preinstall(drm_device_t * dev); @@ -520,6 +572,12 @@ do { \ */ #define MGA_EXEC 0x0100 +/* AGP PLL encoding (for G200 only). + */ +#define MGA_AGP_PLL 0x1e4c +# define MGA_AGP2XPLL_DISABLE (0 << 0) +# define MGA_AGP2XPLL_ENABLE (1 << 0) + /* Warp registers */ #define MGA_WR0 0x2d00 |