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authorNian Wu <nian.wu@intel.com>2007-03-19 17:00:31 +0800
committerNian Wu <nian.wu@intel.com>2007-03-19 17:00:31 +0800
commit8398b99d8d146278adc13d6093811e53cd42c88a (patch)
tree9da61388447defcfec68d7294989f6dc501d39ed /shared-core/i915_drv.h
parentdf73975980e926e350bf36bf4bc8a07220f66164 (diff)
parent1e77e52755c9bb94c9230778845e6701b4d82b3a (diff)
Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline
Diffstat (limited to 'shared-core/i915_drv.h')
-rw-r--r--shared-core/i915_drv.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/shared-core/i915_drv.h b/shared-core/i915_drv.h
index a3736160..662ffad6 100644
--- a/shared-core/i915_drv.h
+++ b/shared-core/i915_drv.h
@@ -112,14 +112,14 @@ typedef struct drm_i915_private {
struct mem_block *agp_heap;
unsigned int sr01, adpa, ppcr, dvob, dvoc, lvds;
int vblank_pipe;
- spinlock_t user_irq_lock;
- int user_irq_refcount;
- int fence_irq_on;
- uint32_t irq_enable_reg;
- int irq_enabled;
+ spinlock_t user_irq_lock;
+ int user_irq_refcount;
+ int fence_irq_on;
+ uint32_t irq_enable_reg;
+ int irq_enabled;
#ifdef I915_HAVE_FENCE
- uint32_t flush_sequence;
+ uint32_t flush_sequence;
uint32_t flush_flags;
uint32_t flush_pending;
uint32_t saved_flush_status;