diff options
author | Dave Airlie <airlied@nx6125b.(none)> | 2007-06-05 10:09:11 +1000 |
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committer | Dave Airlie <airlied@nx6125b.(none)> | 2007-06-05 10:09:11 +1000 |
commit | 07345af838a7443d29d12cb3fe91614e43c4fa81 (patch) | |
tree | 9a16e9ea79c70c6aea65ac11e395dfbf83459453 /shared-core/i915_dma.c | |
parent | 704ca0638977f58742a8bff6aba9905fe862cfb3 (diff) | |
parent | 4327d7f3142cdbf3f3f94426ae33e2d30b5a40c8 (diff) |
Merge branch 'origin' into radeon-ttm
Conflicts:
shared-core/radeon_drv.h
Diffstat (limited to 'shared-core/i915_dma.c')
-rw-r--r-- | shared-core/i915_dma.c | 19 |
1 files changed, 12 insertions, 7 deletions
diff --git a/shared-core/i915_dma.c b/shared-core/i915_dma.c index aed3eea1..c6a80f1c 100644 --- a/shared-core/i915_dma.c +++ b/shared-core/i915_dma.c @@ -35,7 +35,8 @@ dev->pci_device == 0x2982 || \ dev->pci_device == 0x2992 || \ dev->pci_device == 0x29A2 || \ - dev->pci_device == 0x2A02) + dev->pci_device == 0x2A02 || \ + dev->pci_device == 0x2A12) /* Really want an OS-independent resettable timer. Would like to have @@ -123,7 +124,7 @@ static int i915_initialize(drm_device_t * dev, { memset(dev_priv, 0, sizeof(drm_i915_private_t)); - DRM_GETSAREA(); + dev_priv->sarea = drm_getsarea(dev); if (!dev_priv->sarea) { DRM_ERROR("can not find sarea!\n"); dev->dev_private = (void *)dev_priv; @@ -177,6 +178,10 @@ static int i915_initialize(drm_device_t * dev, */ dev_priv->allow_batchbuffer = 1; + /* Enable vblank on pipe A for older X servers + */ + dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A; + /* Program Hardware Status Page */ dev_priv->status_page_dmah = drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff); @@ -467,7 +472,9 @@ int i915_emit_mi_flush(drm_device_t *dev, uint32_t flush) static int i915_dispatch_cmdbuffer(drm_device_t * dev, drm_i915_cmdbuffer_t * cmd) { +#ifdef I915_HAVE_FENCE drm_i915_private_t *dev_priv = dev->dev_private; +#endif int nbox = cmd->num_cliprects; int i = 0, count, ret; @@ -643,7 +650,6 @@ static int i915_batchbuffer(DRM_IOCTL_ARGS) { DRM_DEVICE; drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; - u32 *hw_status = dev_priv->hw_status_page; drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *) dev_priv->sarea_priv; drm_i915_batchbuffer_t batch; @@ -669,7 +675,7 @@ static int i915_batchbuffer(DRM_IOCTL_ARGS) ret = i915_dispatch_batchbuffer(dev, &batch); - sarea_priv->last_dispatch = (int)hw_status[5]; + sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); return ret; } @@ -677,7 +683,6 @@ static int i915_cmdbuffer(DRM_IOCTL_ARGS) { DRM_DEVICE; drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; - u32 *hw_status = dev_priv->hw_status_page; drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *) dev_priv->sarea_priv; drm_i915_cmdbuffer_t cmdbuf; @@ -705,7 +710,7 @@ static int i915_cmdbuffer(DRM_IOCTL_ARGS) return ret; } - sarea_priv->last_dispatch = (int)hw_status[5]; + sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); return 0; } @@ -854,7 +859,7 @@ static int i915_mmio(DRM_IOCTL_ARGS) return DRM_ERR(EINVAL); e = &mmio_table[mmio.reg]; - base = dev_priv->mmio_map->handle + e->offset; + base = (u8 *) dev_priv->mmio_map->handle + e->offset; switch (mmio.read_write) { case I915_MMIO_READ: |