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| author | Marek Olšák <maraeo@gmail.com> | 2012-09-30 19:20:04 +0200 |
|---|---|---|
| committer | Marek Olšák <maraeo@gmail.com> | 2012-10-06 05:45:56 +0200 |
| commit | 1aebfdc1121ccb6babb3a63dc0b99d68b4860b04 (patch) | |
| tree | 3f0fd6c757f1022afbab218cce2d55c97858c0cb /radeon/radeon_surface.h | |
| parent | 77413e77b82a5d800c86b7d3b864d6cc797721c9 (diff) | |
radeon: fix stencil miptree allocation of combined ZS buffers on EG and SI
This allows texturing with depth-stencil buffers directly without the copy
to CB. The separate miptree description for stencil is added, because
the stencil mipmap offsets are not really depth offsets/4 (at least
for the texture units).
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'radeon/radeon_surface.h')
| -rw-r--r-- | radeon/radeon_surface.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/radeon/radeon_surface.h b/radeon/radeon_surface.h index bfee8ab0..ed4b9941 100644 --- a/radeon/radeon_surface.h +++ b/radeon/radeon_surface.h @@ -54,6 +54,7 @@ #define RADEON_SURF_SCANOUT (1 << 16) #define RADEON_SURF_ZBUFFER (1 << 17) #define RADEON_SURF_SBUFFER (1 << 18) +#define RADEON_SURF_HAS_SBUFFER_MIPTREE (1 << 19) #define RADEON_SURF_GET(v, field) (((v) >> RADEON_SURF_ ## field ## _SHIFT) & RADEON_SURF_ ## field ## _MASK) #define RADEON_SURF_SET(v, field) (((v) & RADEON_SURF_ ## field ## _MASK) << RADEON_SURF_ ## field ## _SHIFT) @@ -102,6 +103,7 @@ struct radeon_surface { uint32_t stencil_tile_split; uint64_t stencil_offset; struct radeon_surface_level level[RADEON_SURF_MAX_LEVEL]; + struct radeon_surface_level stencil_level[RADEON_SURF_MAX_LEVEL]; }; struct radeon_surface_manager *radeon_surface_manager_new(int fd); |