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authormartin capitanio <martin@capitanio.org>2008-07-08 17:58:10 +1000
committerDave Airlie <airlied@linux.ie>2008-07-08 17:58:10 +1000
commiteac0933be75b226e0b623d8dcbf343c391eb88a2 (patch)
tree53406bb138876554ab4729fcde3a50aae0f967fe /linux-core
parentc7ed2c67916ee8058301c53b9d4690d81728fb95 (diff)
xgi: use true/false instead of TRUE/FALSE
Diffstat (limited to 'linux-core')
-rw-r--r--linux-core/xgi_cmdlist.c6
-rw-r--r--linux-core/xgi_drv.c4
-rw-r--r--linux-core/xgi_misc.c26
3 files changed, 18 insertions, 18 deletions
diff --git a/linux-core/xgi_cmdlist.c b/linux-core/xgi_cmdlist.c
index e433c21d..423208b0 100644
--- a/linux-core/xgi_cmdlist.c
+++ b/linux-core/xgi_cmdlist.c
@@ -135,7 +135,7 @@ int xgi_submit_cmdlist(struct drm_device * dev, void * data,
DRM_DEBUG("info->cmdring.last_ptr != NULL\n");
if (pCmdInfo->type == BTYPE_3D) {
- xgi_emit_flush(info, FALSE);
+ xgi_emit_flush(info, false);
}
info->cmdring.last_ptr[1] = cpu_to_le32(begin[1]);
@@ -216,7 +216,7 @@ void xgi_cmdlist_cleanup(struct xgi_info * info)
* list chain with a flush command.
*/
if (info->cmdring.last_ptr != NULL) {
- xgi_emit_flush(info, FALSE);
+ xgi_emit_flush(info, false);
xgi_emit_nop(info);
}
@@ -324,5 +324,5 @@ void xgi_emit_irq(struct xgi_info * info)
if (info->cmdring.last_ptr == NULL)
return;
- xgi_emit_flush(info, TRUE);
+ xgi_emit_flush(info, true);
}
diff --git a/linux-core/xgi_drv.c b/linux-core/xgi_drv.c
index 532408db..bfe9acdf 100644
--- a/linux-core/xgi_drv.c
+++ b/linux-core/xgi_drv.c
@@ -314,8 +314,8 @@ void xgi_driver_lastclose(struct drm_device * dev)
|| info->pcie_heap_initialized) {
drm_sman_cleanup(&info->sman);
- info->fb_heap_initialized = FALSE;
- info->pcie_heap_initialized = FALSE;
+ info->fb_heap_initialized = false;
+ info->pcie_heap_initialized = false;
}
}
}
diff --git a/linux-core/xgi_misc.c b/linux-core/xgi_misc.c
index 2b3a1788..2a9632f6 100644
--- a/linux-core/xgi_misc.c
+++ b/linux-core/xgi_misc.c
@@ -46,41 +46,41 @@ static bool xgi_validate_signal(struct drm_map * map)
check = le16_to_cpu(DRM_READ16(map, 0x2360));
if ((check & 0x3f) != ((check & 0x3f00) >> 8)) {
- return FALSE;
+ return false;
}
/* Check RO channel */
DRM_WRITE8(map, 0x235c, 0x83);
check = le16_to_cpu(DRM_READ16(map, 0x2360));
if ((check & 0x0f) != ((check & 0xf0) >> 4)) {
- return FALSE;
+ return false;
}
/* Check RW channel */
DRM_WRITE8(map, 0x235c, 0x88);
check = le16_to_cpu(DRM_READ16(map, 0x2360));
if ((check & 0x0f) != ((check & 0xf0) >> 4)) {
- return FALSE;
+ return false;
}
/* Check RO channel outstanding */
DRM_WRITE8(map, 0x235c, 0x8f);
check = le16_to_cpu(DRM_READ16(map, 0x2360));
if (0 != (check & 0x3ff)) {
- return FALSE;
+ return false;
}
/* Check RW channel outstanding */
DRM_WRITE8(map, 0x235c, 0x90);
check = le16_to_cpu(DRM_READ16(map, 0x2360));
if (0 != (check & 0x3ff)) {
- return FALSE;
+ return false;
}
/* No pending PCIE request. GE stall. */
}
- return TRUE;
+ return true;
}
@@ -138,7 +138,7 @@ static void xgi_ge_hang_reset(struct drm_map * map)
bool xgi_ge_irq_handler(struct xgi_info * info)
{
const u32 int_status = le32_to_cpu(DRM_READ32(info->mmio_map, 0x2810));
- bool is_support_auto_reset = FALSE;
+ bool is_support_auto_reset = false;
/* Check GE on/off */
if (0 == (0xffffc0f0 & int_status)) {
@@ -179,15 +179,15 @@ bool xgi_ge_irq_handler(struct xgi_info * info)
cpu_to_le32((int_status & ~0x01) | 0x04000000));
}
- return TRUE;
+ return true;
}
- return FALSE;
+ return false;
}
bool xgi_crt_irq_handler(struct xgi_info * info)
{
- bool ret = FALSE;
+ bool ret = false;
u8 save_3ce = DRM_READ8(info->mmio_map, 0x3ce);
/* CRT1 interrupt just happened
@@ -205,7 +205,7 @@ bool xgi_crt_irq_handler(struct xgi_info * info)
op3cf_3d = IN3CFB(info->mmio_map, 0x3d);
OUT3CFB(info->mmio_map, 0x3d, (op3cf_3d | 0x04));
OUT3CFB(info->mmio_map, 0x3d, (op3cf_3d & ~0x04));
- ret = TRUE;
+ ret = true;
}
DRM_WRITE8(info->mmio_map, 0x3ce, save_3ce);
@@ -214,7 +214,7 @@ bool xgi_crt_irq_handler(struct xgi_info * info)
bool xgi_dvi_irq_handler(struct xgi_info * info)
{
- bool ret = FALSE;
+ bool ret = false;
const u8 save_3ce = DRM_READ8(info->mmio_map, 0x3ce);
/* DVI interrupt just happened
@@ -242,7 +242,7 @@ bool xgi_dvi_irq_handler(struct xgi_info * info)
OUT3C5B(info->mmio_map, 0x39, (op3cf_39 & ~0x01));
OUT3C5B(info->mmio_map, 0x39, (op3cf_39 | 0x01));
- ret = TRUE;
+ ret = true;
}
DRM_WRITE8(info->mmio_map, 0x3ce, save_3ce);