diff options
| author | Eric Anholt <eric@anholt.net> | 2008-07-11 14:47:33 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2008-07-11 18:58:02 -0700 |
| commit | a0474be4e78d678eb615b37aad355effb955ee19 (patch) | |
| tree | 02105f9151e5dfa7ee0177656f3db2ea1c061513 /linux-core/i915_gem.c | |
| parent | 1f9a5307acfe2ef0d104f7036d2d93504dc7673f (diff) | |
intel-gem: Add two new ioctls for managing tiling on objects.
Various chips have exciting interactions between the CPU and the GPU's
different ways of accessing interleaved memory, so we need some kernel
assistance in determining how it works.
Only fully tested on GM965 so far.
Diffstat (limited to 'linux-core/i915_gem.c')
| -rw-r--r-- | linux-core/i915_gem.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/linux-core/i915_gem.c b/linux-core/i915_gem.c index 446c9ba9..236203a5 100644 --- a/linux-core/i915_gem.c +++ b/linux-core/i915_gem.c @@ -2702,3 +2702,18 @@ i915_gem_lastclose(struct drm_device *dev) mutex_unlock(&dev->struct_mutex); } + +void i915_gem_load(struct drm_device *dev) +{ + drm_i915_private_t *dev_priv = dev->dev_private; + + INIT_LIST_HEAD(&dev_priv->mm.active_list); + INIT_LIST_HEAD(&dev_priv->mm.flushing_list); + INIT_LIST_HEAD(&dev_priv->mm.inactive_list); + INIT_LIST_HEAD(&dev_priv->mm.request_list); + INIT_DELAYED_WORK(&dev_priv->mm.retire_work, + i915_gem_retire_work_handler); + dev_priv->mm.next_gem_seqno = 1; + + i915_gem_detect_bit_6_swizzle(dev); +} |