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authorChris Wilson <chris@chris-wilson.co.uk>2010-06-21 14:20:56 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2010-06-21 22:37:18 +0100
commit5eec286838118501dd79178c152000ad4cbd70e1 (patch)
tree2c43ad9b4aae59d54d93061eeccb7380ee57d613 /intel
parent1db22ff741f92b84450ec13093e070a6ad5fc857 (diff)
intel: Force stride to be 0 for I915_TILING_NONE.
When allocating a tiled buffer, if we remove the desired tiling mode due to it being beyond hardware limits, also remove the stride. This ensures that we only ever use stride 0 with I915_TILING_NONE. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'intel')
-rw-r--r--intel/intel_bufmgr_gem.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index b4be1afe..19eea345 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -743,6 +743,9 @@ drm_intel_gem_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name,
size = drm_intel_gem_bo_tile_size(bufmgr_gem, size, tiling_mode);
} while (*tiling_mode != tiling);
+ if (*tiling_mode == I915_TILING_NONE)
+ stride = 0;
+
bo = drm_intel_gem_bo_alloc_internal(bufmgr, name, size, flags,
*tiling_mode, stride);
if (!bo)