intel: Add initial support for Sandybridge, and clean up the #defines.

2 files changed, 63 insertions, 38 deletions

diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 4e61cefe..55120108 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -210,11 +210,11 @@ drm_intel_gem_bo_tile_size(drm_intel_bufmgr_gem *bufmgr_gem, unsigned long size,
 		return size;
 
 	/* 965+ just need multiples of page size for tiling */
-	if (IS_I965G(bufmgr_gem))
+	if (!IS_GEN2(bufmgr_gem) && !IS_GEN3(bufmgr_gem))
 		return ROUND_UP_TO(size, 4096);
 
 	/* Older chips need powers of two, of at least 512k or 1M */
-	if (IS_I9XX(bufmgr_gem)) {
+	if (!IS_GEN2(bufmgr_gem)) {
 		min_size = 1024*1024;
 		max_size = 128*1024*1024;
 	} else {
@@ -249,7 +249,7 @@ drm_intel_gem_bo_tile_pitch(drm_intel_bufmgr_gem *bufmgr_gem,
 		return ROUND_UP_TO(pitch, tile_width);
 
 	/* 965 is flexible */
-	if (IS_I965G(bufmgr_gem))
+	if (!IS_GEN2(bufmgr_gem) && !IS_GEN3(bufmgr_gem))
 		return ROUND_UP_TO(pitch, tile_width);
 
 	/* Pre-965 needs power of two tile width */
@@ -382,7 +382,8 @@ drm_intel_bo_gem_set_in_aperture_size(drm_intel_bufmgr_gem *bufmgr_gem,
 	 * aperture. Optimal packing is for wimps.
 	 */
 	size = bo_gem->bo.size;
-	if (!IS_I965G(bufmgr_gem) && bo_gem->tiling_mode != I915_TILING_NONE)
+	if ((IS_GEN2(bufmgr_gem) || IS_GEN3(bufmgr_gem))
+	    && bo_gem->tiling_mode != I915_TILING_NONE)
 		size *= 2;
 
 	bo_gem->reloc_tree_size = size;
@@ -1756,7 +1757,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
 		fprintf(stderr, "param: %d, val: %d\n", gp.param, *gp.value);
 	}
 
-	if (!IS_I965G(bufmgr_gem)) {
+	if (IS_GEN2(bufmgr_gem) || IS_GEN3(bufmgr_gem)) {
 		gp.param = I915_PARAM_NUM_FENCES_AVAIL;
 		gp.value = &bufmgr_gem->available_fences;
 		ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp);
diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index 688476a4..63786b44 100644
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -28,50 +28,74 @@
 #ifndef _INTEL_CHIPSET_H
 #define _INTEL_CHIPSET_H
 
-#define IS_I830(dev) ((dev)->pci_device == 0x3577)
-#define IS_845G(dev) ((dev)->pci_device == 0x2562)
-#define IS_I85X(dev) ((dev)->pci_device == 0x3582)
-#define IS_I855(dev) ((dev)->pci_device == 0x3582)
-#define IS_I865G(dev) ((dev)->pci_device == 0x2572)
+#define IS_830(dev) ((dev)->pci_device == 0x3577)
+#define IS_845(dev) ((dev)->pci_device == 0x2562)
+#define IS_85X(dev) ((dev)->pci_device == 0x3582)
+#define IS_865(dev) ((dev)->pci_device == 0x2572)
 
-#define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a)
-#define IS_I915GM(dev) ((dev)->pci_device == 0x2592)
-#define IS_I945G(dev) ((dev)->pci_device == 0x2772)
-#define IS_I945GM(dev) ((dev)->pci_device == 0x27A2 ||\
+#define IS_GEN2(dev) (IS_830(dev) ||				\
+		      IS_845(dev) ||				\
+		      IS_85X(dev) ||				\
+		      IS_865(dev))
+
+#define IS_915G(dev) ((dev)->pci_device == 0x2582 ||		\
+		       (dev)->pci_device == 0x258a)
+#define IS_915GM(dev) ((dev)->pci_device == 0x2592)
+#define IS_945G(dev) ((dev)->pci_device == 0x2772)
+#define IS_945GM(dev) ((dev)->pci_device == 0x27A2 ||		\
                         (dev)->pci_device == 0x27AE)
-#define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \
-                       (dev)->pci_device == 0x2982 || \
-                       (dev)->pci_device == 0x2992 || \
-                       (dev)->pci_device == 0x29A2 || \
-                       (dev)->pci_device == 0x2A02 || \
-                       (dev)->pci_device == 0x2A12 || \
-                       (dev)->pci_device == 0x2A42 || \
-                       (dev)->pci_device == 0x2E02 || \
-                       (dev)->pci_device == 0x2E12 || \
-                       (dev)->pci_device == 0x2E22 || \
-                       (dev)->pci_device == 0x2E32 || \
-                       (dev)->pci_device == 0x2E42 || \
-                       (dev)->pci_device == 0x0042 || \
-                       (dev)->pci_device == 0x0046)
+
+#define IS_915(dev) (IS_915G(dev) ||				\
+		     IS_915GM(dev))
+
+#define IS_945(dev) (IS_945G(dev) ||				\
+		     IS_945GM(dev) ||				\
+		     IS_G33(dev) ||				\
+		     IS_PINEVIEW(dev))
+
+#define IS_G33(dev)    ((dev)->pci_device == 0x29C2 ||		\
+                        (dev)->pci_device == 0x29B2 ||		\
+                        (dev)->pci_device == 0x29D2)
+
+#define IS_PINEVIEW(dev) ((dev)->pci_device == 0xa001 ||	\
+			  (dev)->pci_device == 0xa011)
+
+#define IS_GEN3(dev) (IS_915(dev) ||				\
+		      IS_945(dev) ||				\
+		      IS_G33(dev) ||				\
+		      IS_PINEVIEW(dev))
 
 #define IS_I965GM(dev) ((dev)->pci_device == 0x2A02)
 
+#define IS_GEN4(dev) ((dev)->pci_device == 0x2972 ||	\
+		      (dev)->pci_device == 0x2982 ||	\
+		      (dev)->pci_device == 0x2992 ||	\
+		      (dev)->pci_device == 0x29A2 ||	\
+		      (dev)->pci_device == 0x2A02 ||	\
+		      (dev)->pci_device == 0x2A12 ||	\
+		      (dev)->pci_device == 0x2A42 ||	\
+		      (dev)->pci_device == 0x2E02 ||	\
+		      (dev)->pci_device == 0x2E12 ||	\
+		      (dev)->pci_device == 0x2E22 ||	\
+		      (dev)->pci_device == 0x2E32 ||	\
+		      (dev)->pci_device == 0x2E42 ||	\
+		      (dev)->pci_device == 0x0042 ||	\
+		      (dev)->pci_device == 0x0046 ||	\
+		      IS_965GM(dev) || \
+		      IS_G4X(dev))
+
 #define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
 
 #define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
                      (dev)->pci_device == 0x2E12 || \
                      (dev)->pci_device == 0x2E22 || \
                      (dev)->pci_device == 0x2E32 || \
-                     (dev)->pci_device == 0x2E42)
-
-#define IS_G33(dev)    ((dev)->pci_device == 0x29C2 ||  \
-                        (dev)->pci_device == 0x29B2 ||  \
-                        (dev)->pci_device == 0x29D2)
-
-#define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
-                      IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev))
+                     (dev)->pci_device == 0x2E42 || \
+		     IS_GM45(dev))
 
-#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
-                        IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev))
+#define IS_9XX(dev) (IS_GEN3(dev) ||				\
+		     IS_GEN4(dev) ||				\
+		     IS_GEN5(dev) ||				\
+		     IS_GEN6(dev))
 
 #endif /* _INTEL_CHIPSET_H */