commit xfree86 4.0.1d-pre update

5 files changed, 12 insertions, 937 deletions

diff --git a/bsd/Imakefile b/bsd/Imakefile
index 7d33c205..81445a7d 100644
--- a/bsd/Imakefile
+++ b/bsd/Imakefile
@@ -1,5 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/Imakefile,v 1.1 2000/06/17 00:03:28 martin Exp $
-XCOMM $PI$
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/Imakefile,v 1.2 2000/08/16 01:45:31 dawes Exp $
 
 #include <Server.tmpl>
 
@@ -11,6 +10,17 @@ LinkSourceFile(xf86drm.h,$(XF86OSSRC))
 LinkSourceFile(xf86_OSproc.h,$(XF86OSSRC))
 LinkSourceFile(sigio.c,$(XF86OSSRC)/shared)
 
+XCOMM Try to use the Linux version of the DRM headers.  This avoids skew
+XCOMM and missing headers.  If there's a need to break them out, they
+XCOMM can be re-added later.  If not, they can be moved to somewhere more
+XCOMM OS-independent and referenced from there.
+LinkSourceFile(drm.h,$(XF86OSSRC)/linux/drm/kernel)
+LinkSourceFile(i810_drm.h,$(XF86OSSRC)/linux/drm/kernel)
+LinkSourceFile(mga_drm.h,$(XF86OSSRC)/linux/drm/kernel)
+LinkSourceFile(r128_drm.h,$(XF86OSSRC)/linux/drm/kernel)
+LinkSourceFile(sis_drm_public.h,$(XF86OSSRC)/linux/drm/kernel)
+
+
 XCOMM This is a kludge until we determine how best to build the
 XCOMM kernel-specific device driver.  This allows us to continue
 XCOMM to maintain the single Makefile.bsd with kernel-specific
diff --git a/bsd/drm.h b/bsd/drm.h
deleted file mode 100644
index ddad1be7..00000000
--- a/bsd/drm.h
+++ /dev/null
@@ -1,362 +0,0 @@
-/* drm.h -- Header for Direct Rendering Manager -*- c -*-
- * Created: Mon Jan  4 10:05:05 1999 by faith@precisioninsight.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- * 
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *    Rickard E. (Rik) Faith <faith@valinux.com>
- *
- * Acknowledgements:
- * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic cmpxchg.
- *
- */
-
-#ifndef _DRM_H_
-#define _DRM_H_
-
-#include <sys/ioccom.h>		/* For _IO* macros */
-
-#define DRM_DEV_DRM	 "/dev/drm"
-#define DRM_DEV_MODE	 (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
-#define DRM_DEV_UID	 0
-#define DRM_DEV_GID	 0
-
-
-#define DRM_NAME	"drm"	  /* Name in kernel, /dev		    */
-#define DRM_MIN_ORDER	5	  /* At least 2^5 bytes = 32 bytes	    */
-#define DRM_MAX_ORDER	22	  /* Up to 2^22 bytes = 4MB		    */
-#define DRM_RAM_PERCENT 10	  /* How much system ram can we lock?	    */
-
-#define _DRM_LOCK_HELD	0x80000000 /* Hardware lock is held		    */
-#define _DRM_LOCK_CONT	0x40000000 /* Hardware lock is contended	    */
-#define _DRM_LOCK_IS_HELD(lock)	   ((lock) & _DRM_LOCK_HELD)
-#define _DRM_LOCK_IS_CONT(lock)	   ((lock) & _DRM_LOCK_CONT)
-#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
-
-typedef unsigned long drm_handle_t;
-typedef unsigned int  drm_context_t;
-typedef unsigned int  drm_drawable_t;
-typedef unsigned int  drm_magic_t;
-
-/* Warning: If you change this structure, make sure you change 
- * XF86DRIClipRectRec in the server as well */
-
-typedef struct drm_clip_rect {
-           unsigned short x1;
-           unsigned short y1;
-           unsigned short x2;
-           unsigned short y2;
-} drm_clip_rect_t;
-
-/* Seperate include files for the i810/mga/r128 specific structures */
-#include "mga_drm.h"
-#include "i810_drm.h"
-#include "r128_drm.h"
-
-typedef struct drm_version {
-	int    version_major;	  /* Major version			    */
-	int    version_minor;	  /* Minor version			    */
-	int    version_patchlevel;/* Patch level			    */
-	size_t name_len;	  /* Length of name buffer		    */
-	char   *name;		  /* Name of driver			    */
-	size_t date_len;	  /* Length of date buffer		    */
-	char   *date;		  /* User-space buffer to hold date	    */
-	size_t desc_len;	  /* Length of desc buffer		    */
-	char   *desc;		  /* User-space buffer to hold desc	    */
-} drm_version_t;
-
-typedef struct drm_unique {
-	size_t unique_len;	  /* Length of unique			    */
-	char   *unique;		  /* Unique name for driver instantiation   */
-} drm_unique_t;
-
-typedef struct drm_list {
-	int		 count;	  /* Length of user-space structures	    */
-	drm_version_t	 *version;
-} drm_list_t;
-
-typedef struct drm_block {
-	int		 unused;
-} drm_block_t;
-
-typedef struct drm_control {
-	enum {
-		DRM_ADD_COMMAND,
-		DRM_RM_COMMAND,
-		DRM_INST_HANDLER,
-		DRM_UNINST_HANDLER
-	}		 func;
-	int		 irq;
-} drm_control_t;
-
-typedef enum drm_map_type {
-	_DRM_FRAME_BUFFER = 0,	  /* WC (no caching), no core dump	    */
-	_DRM_REGISTERS	  = 1,	  /* no caching, no core dump		    */
-	_DRM_SHM	  = 2,	  /* shared, cached			    */
-	_DRM_AGP	  = 3	  /* AGP/GART				    */
-} drm_map_type_t;
-
-typedef enum drm_map_flags {
-	_DRM_RESTRICTED	     = 0x01, /* Cannot be mapped to user-virtual    */
-	_DRM_READ_ONLY	     = 0x02,
-	_DRM_LOCKED	     = 0x04, /* shared, cached, locked		    */
-	_DRM_KERNEL	     = 0x08, /* kernel requires access		    */
-	_DRM_WRITE_COMBINING = 0x10, /* use write-combining if available    */
-	_DRM_CONTAINS_LOCK   = 0x20  /* SHM page that contains lock	    */
-} drm_map_flags_t;
-
-typedef struct drm_map {
-	unsigned long	offset;	 /* Requested physical address (0 for SAREA)*/
-	unsigned long	size;	 /* Requested physical size (bytes)	    */
-	drm_map_type_t	type;	 /* Type of memory to map		    */
-	drm_map_flags_t flags;	 /* Flags				    */
-	void		*handle; /* User-space: "Handle" to pass to mmap    */
-				 /* Kernel-space: kernel-virtual address    */
-	int		mtrr;	 /* MTRR slot used			    */
-				 /* Private data			    */
-} drm_map_t;
-
-typedef enum drm_lock_flags {
-	_DRM_LOCK_READY	     = 0x01, /* Wait until hardware is ready for DMA */
-	_DRM_LOCK_QUIESCENT  = 0x02, /* Wait until hardware quiescent	     */
-	_DRM_LOCK_FLUSH	     = 0x04, /* Flush this context's DMA queue first */
-	_DRM_LOCK_FLUSH_ALL  = 0x08, /* Flush all DMA queues first	     */
-				/* These *HALT* flags aren't supported yet
-				   -- they will be used to support the
-				   full-screen DGA-like mode. */
-	_DRM_HALT_ALL_QUEUES = 0x10, /* Halt all current and future queues   */
-	_DRM_HALT_CUR_QUEUES = 0x20  /* Halt all current queues		     */
-} drm_lock_flags_t;
-
-typedef struct drm_lock {
-	int		 context;
-	drm_lock_flags_t flags;
-} drm_lock_t;
-
-typedef enum drm_dma_flags {	      /* These values *MUST* match xf86drm.h */
-				      /* Flags for DMA buffer dispatch	     */
-	_DRM_DMA_BLOCK	      = 0x01, /* Block until buffer dispatched.
-					 Note, the buffer may not yet have
-					 been processed by the hardware --
-					 getting a hardware lock with the
-					 hardware quiescent will ensure
-					 that the buffer has been
-					 processed.			     */
-	_DRM_DMA_WHILE_LOCKED = 0x02, /* Dispatch while lock held	     */
-	_DRM_DMA_PRIORITY     = 0x04, /* High priority dispatch		     */
-
-				      /* Flags for DMA buffer request	     */
-	_DRM_DMA_WAIT	      = 0x10, /* Wait for free buffers		     */
-	_DRM_DMA_SMALLER_OK   = 0x20, /* Smaller-than-requested buffers ok   */
-	_DRM_DMA_LARGER_OK    = 0x40  /* Larger-than-requested buffers ok    */
-} drm_dma_flags_t;
-
-typedef struct drm_buf_desc {
-	int	      count;	 /* Number of buffers of this size	     */
-	int	      size;	 /* Size in bytes			     */
-	int	      low_mark;	 /* Low water mark			     */
-	int	      high_mark; /* High water mark			     */
-	enum {
-		_DRM_PAGE_ALIGN = 0x01, /* Align on page boundaries for DMA  */
-		_DRM_AGP_BUFFER = 0x02  /* Buffer is in agp space            */
-	}	      flags;
-	unsigned long agp_start; /* Start address of where the agp buffers
-				  * are in the agp aperture */
-} drm_buf_desc_t;
-
-typedef struct drm_buf_info {
-	int	       count;	/* Entries in list			     */
-	drm_buf_desc_t *list;
-} drm_buf_info_t;
-
-typedef struct drm_buf_free {
-	int	       count;
-	int	       *list;
-} drm_buf_free_t;
-
-typedef struct drm_buf_pub {
-	int		  idx;	       /* Index into master buflist	     */
-	int		  total;       /* Buffer size			     */
-	int		  used;	       /* Amount of buffer in use (for DMA)  */
-	void		  *address;    /* Address of buffer		     */
-} drm_buf_pub_t;
-
-typedef struct drm_buf_map {
-	int	      count;	/* Length of buflist			    */
-	void	      *virtual;	/* Mmaped area in user-virtual		    */
-	drm_buf_pub_t *list;	/* Buffer information			    */
-} drm_buf_map_t;
-
-typedef struct drm_dma {
-				/* Indices here refer to the offset into
-				   buflist in drm_buf_get_t.  */
-	int		context;	  /* Context handle		    */
-	int		send_count;	  /* Number of buffers to send	    */
-	int		*send_indices;	  /* List of handles to buffers	    */
-	int		*send_sizes;	  /* Lengths of data to send	    */
-	drm_dma_flags_t flags;		  /* Flags			    */
-	int		request_count;	  /* Number of buffers requested    */
-	int		request_size;	  /* Desired size for buffers	    */
-	int		*request_indices; /* Buffer information		    */
-	int		*request_sizes;
-	int		granted_count;	  /* Number of buffers granted	    */
-} drm_dma_t;
-
-typedef enum {
-	_DRM_CONTEXT_PRESERVED = 0x01,
-	_DRM_CONTEXT_2DONLY    = 0x02
-} drm_ctx_flags_t;
-
-typedef struct drm_ctx {
-	drm_context_t	handle;
-	drm_ctx_flags_t flags;
-} drm_ctx_t;
-
-typedef struct drm_ctx_res {
-	int		count;
-	drm_ctx_t	*contexts;
-} drm_ctx_res_t;
-
-typedef struct drm_draw {
-	drm_drawable_t	handle;
-} drm_draw_t;
-
-typedef struct drm_auth {
-	drm_magic_t	magic;
-} drm_auth_t;
-
-typedef struct drm_irq_busid {
-	int irq;
-	int busnum;
-	int devnum;
-	int funcnum;
-} drm_irq_busid_t;
-
-typedef struct drm_agp_mode {
-	unsigned long mode;
-} drm_agp_mode_t;
-
-				/* For drm_agp_alloc -- allocated a buffer */
-typedef struct drm_agp_buffer {
-	unsigned long size;	/* In bytes -- will round to page boundary */
-	unsigned long handle;	/* Used for BIND/UNBIND ioctls */
-	unsigned long type;     /* Type of memory to allocate  */
-        unsigned long physical; /* Physical used by i810       */
-} drm_agp_buffer_t;
-
-				/* For drm_agp_bind */
-typedef struct drm_agp_binding {
-	unsigned long handle;   /* From drm_agp_buffer */
-	unsigned long offset;	/* In bytes -- will round to page boundary */
-} drm_agp_binding_t;
-
-typedef struct drm_agp_info {
-	int            agp_version_major;
-	int            agp_version_minor;
-	unsigned long  mode;
-	unsigned long  aperture_base;  /* physical address */
-	unsigned long  aperture_size;  /* bytes */
-	unsigned long  memory_allowed; /* bytes */
-	unsigned long  memory_used;
-
-				/* PCI information */
-	unsigned short id_vendor;
-	unsigned short id_device;
-} drm_agp_info_t;
-
-#define DRM_IOCTL_BASE	     'd'
-#define DRM_IOCTL_NR(n)	     ((n) & 0xff)
-#define DRM_IO(nr)	     _IO(DRM_IOCTL_BASE,nr)
-#define DRM_IOR(nr,size)     _IOR(DRM_IOCTL_BASE,nr,size)
-#define DRM_IOW(nr,size)     _IOW(DRM_IOCTL_BASE,nr,size)
-#define DRM_IOWR(nr,size)    _IOWR(DRM_IOCTL_BASE,nr,size)
-
-
-#define DRM_IOCTL_VERSION    DRM_IOWR(0x00, drm_version_t)
-#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t)
-#define DRM_IOCTL_GET_MAGIC  DRM_IOR( 0x02, drm_auth_t)
-#define DRM_IOCTL_IRQ_BUSID  DRM_IOWR(0x03, drm_irq_busid_t)
-
-#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t)
-#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t)
-#define DRM_IOCTL_BLOCK	     DRM_IOWR(0x12, drm_block_t)
-#define DRM_IOCTL_UNBLOCK    DRM_IOWR(0x13, drm_block_t)
-#define DRM_IOCTL_CONTROL    DRM_IOW( 0x14, drm_control_t)
-#define DRM_IOCTL_ADD_MAP    DRM_IOWR(0x15, drm_map_t)
-#define DRM_IOCTL_ADD_BUFS   DRM_IOWR(0x16, drm_buf_desc_t)
-#define DRM_IOCTL_MARK_BUFS  DRM_IOW( 0x17, drm_buf_desc_t)
-#define DRM_IOCTL_INFO_BUFS  DRM_IOWR(0x18, drm_buf_info_t)
-#define DRM_IOCTL_MAP_BUFS   DRM_IOWR(0x19, drm_buf_map_t)
-#define DRM_IOCTL_FREE_BUFS  DRM_IOW( 0x1a, drm_buf_free_t)
-
-#define DRM_IOCTL_ADD_CTX    DRM_IOWR(0x20, drm_ctx_t)
-#define DRM_IOCTL_RM_CTX     DRM_IOWR(0x21, drm_ctx_t)
-#define DRM_IOCTL_MOD_CTX    DRM_IOW( 0x22, drm_ctx_t)
-#define DRM_IOCTL_GET_CTX    DRM_IOWR(0x23, drm_ctx_t)
-#define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, drm_ctx_t)
-#define DRM_IOCTL_NEW_CTX    DRM_IOW( 0x25, drm_ctx_t)
-#define DRM_IOCTL_RES_CTX    DRM_IOWR(0x26, drm_ctx_res_t)
-#define DRM_IOCTL_ADD_DRAW   DRM_IOWR(0x27, drm_draw_t)
-#define DRM_IOCTL_RM_DRAW    DRM_IOWR(0x28, drm_draw_t)
-#define DRM_IOCTL_DMA	     DRM_IOWR(0x29, drm_dma_t)
-#define DRM_IOCTL_LOCK	     DRM_IOW( 0x2a, drm_lock_t)
-#define DRM_IOCTL_UNLOCK     DRM_IOW( 0x2b, drm_lock_t)
-#define DRM_IOCTL_FINISH     DRM_IOW( 0x2c, drm_lock_t)
-
-#define DRM_IOCTL_AGP_ACQUIRE DRM_IO(  0x30)
-#define DRM_IOCTL_AGP_RELEASE DRM_IO(  0x31)
-#define DRM_IOCTL_AGP_ENABLE  DRM_IOW( 0x32, drm_agp_mode_t)
-#define DRM_IOCTL_AGP_INFO    DRM_IOR( 0x33, drm_agp_info_t)
-#define DRM_IOCTL_AGP_ALLOC   DRM_IOWR(0x34, drm_agp_buffer_t)
-#define DRM_IOCTL_AGP_FREE    DRM_IOW( 0x35, drm_agp_buffer_t)
-#define DRM_IOCTL_AGP_BIND    DRM_IOW( 0x36, drm_agp_binding_t)
-#define DRM_IOCTL_AGP_UNBIND  DRM_IOW( 0x37, drm_agp_binding_t)
-
-/* Mga specific ioctls */
-#define DRM_IOCTL_MGA_INIT    DRM_IOW( 0x40, drm_mga_init_t)
-#define DRM_IOCTL_MGA_SWAP    DRM_IOW( 0x41, drm_mga_swap_t)
-#define DRM_IOCTL_MGA_CLEAR   DRM_IOW( 0x42, drm_mga_clear_t)
-#define DRM_IOCTL_MGA_ILOAD   DRM_IOW( 0x43, drm_mga_iload_t)
-#define DRM_IOCTL_MGA_VERTEX  DRM_IOW( 0x44, drm_mga_vertex_t)
-#define DRM_IOCTL_MGA_FLUSH   DRM_IOW( 0x45, drm_lock_t )
-#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t)
-
-/* I810 specific ioctls */
-#define DRM_IOCTL_I810_INIT    DRM_IOW( 0x40, drm_i810_init_t)
-#define DRM_IOCTL_I810_VERTEX  DRM_IOW( 0x41, drm_i810_vertex_t)
-#define DRM_IOCTL_I810_CLEAR   DRM_IOW( 0x42, drm_i810_clear_t)
-#define DRM_IOCTL_I810_FLUSH   DRM_IO ( 0x43)
-#define DRM_IOCTL_I810_GETAGE  DRM_IO ( 0x44)
-#define DRM_IOCTL_I810_GETBUF  DRM_IOWR(0x45, drm_i810_dma_t)
-#define DRM_IOCTL_I810_SWAP    DRM_IO ( 0x46)
-
-/* Rage 128 specific ioctls */
-#define DRM_IOCTL_R128_INIT	DRM_IOW( 0x40, drm_r128_init_t)
-#define DRM_IOCTL_R128_RESET	DRM_IO(  0x41)
-#define DRM_IOCTL_R128_FLUSH	DRM_IO(  0x42)
-#define DRM_IOCTL_R128_CCEIDL	DRM_IO(  0x43)
-#define DRM_IOCTL_R128_PACKET	DRM_IOW( 0x44, drm_r128_packet_t)
-#define DRM_IOCTL_R128_VERTEX	DRM_IOW( 0x45, drm_r128_vertex_t)
-
-#endif
diff --git a/bsd/i810_drm.h b/bsd/i810_drm.h
deleted file mode 100644
index 4c8e09f6..00000000
--- a/bsd/i810_drm.h
+++ /dev/null
@@ -1,188 +0,0 @@
-#ifndef _I810_DRM_H_
-#define _I810_DRM_H_
-
-/* WARNING: These defines must be the same as what the Xserver uses.
- * if you change them, you must change the defines in the Xserver.
- */
-
-#ifndef _I810_DEFINES_
-#define _I810_DEFINES_
-
-#define I810_DMA_BUF_ORDER		12
-#define I810_DMA_BUF_SZ 		(1<<I810_DMA_BUF_ORDER)
-#define I810_DMA_BUF_NR 		256
-#define I810_NR_SAREA_CLIPRECTS 	8
-
-/* Each region is a minimum of 64k, and there are at most 64 of them.
- */
-#define I810_NR_TEX_REGIONS 64
-#define I810_LOG_MIN_TEX_REGION_SIZE 16
-#endif
-
-#define I810_UPLOAD_TEX0IMAGE  0x1 /* handled clientside */
-#define I810_UPLOAD_TEX1IMAGE  0x2 /* handled clientside */
-#define I810_UPLOAD_CTX        0x4
-#define I810_UPLOAD_BUFFERS    0x8
-#define I810_UPLOAD_TEX0       0x10
-#define I810_UPLOAD_TEX1       0x20
-#define I810_UPLOAD_CLIPRECTS  0x40
-
-
-/* Indices into buf.Setup where various bits of state are mirrored per
- * context and per buffer.  These can be fired at the card as a unit,
- * or in a piecewise fashion as required.
- */
-
-/* Destbuffer state 
- *    - backbuffer linear offset and pitch -- invarient in the current dri
- *    - zbuffer linear offset and pitch -- also invarient
- *    - drawing origin in back and depth buffers.
- *
- * Keep the depth/back buffer state here to acommodate private buffers
- * in the future.
- */
-#define I810_DESTREG_DI0  0	/* CMD_OP_DESTBUFFER_INFO (2 dwords) */
-#define I810_DESTREG_DI1  1
-#define I810_DESTREG_DV0  2	/* GFX_OP_DESTBUFFER_VARS (2 dwords) */
-#define I810_DESTREG_DV1  3
-#define I810_DESTREG_DR0  4	/* GFX_OP_DRAWRECT_INFO (4 dwords) */
-#define I810_DESTREG_DR1  5
-#define I810_DESTREG_DR2  6
-#define I810_DESTREG_DR3  7
-#define I810_DESTREG_DR4  8
-#define I810_DEST_SETUP_SIZE 10
-
-/* Context state
- */
-#define I810_CTXREG_CF0   0	/* GFX_OP_COLOR_FACTOR */
-#define I810_CTXREG_CF1   1	
-#define I810_CTXREG_ST0   2     /* GFX_OP_STIPPLE */
-#define I810_CTXREG_ST1   3
-#define I810_CTXREG_VF    4	/* GFX_OP_VERTEX_FMT */
-#define I810_CTXREG_MT    5	/* GFX_OP_MAP_TEXELS */
-#define I810_CTXREG_MC0   6	/* GFX_OP_MAP_COLOR_STAGES - stage 0 */
-#define I810_CTXREG_MC1   7     /* GFX_OP_MAP_COLOR_STAGES - stage 1 */
-#define I810_CTXREG_MC2   8	/* GFX_OP_MAP_COLOR_STAGES - stage 2 */
-#define I810_CTXREG_MA0   9	/* GFX_OP_MAP_ALPHA_STAGES - stage 0 */
-#define I810_CTXREG_MA1   10	/* GFX_OP_MAP_ALPHA_STAGES - stage 1 */
-#define I810_CTXREG_MA2   11	/* GFX_OP_MAP_ALPHA_STAGES - stage 2 */
-#define I810_CTXREG_SDM   12	/* GFX_OP_SRC_DEST_MONO */
-#define I810_CTXREG_FOG   13	/* GFX_OP_FOG_COLOR */
-#define I810_CTXREG_B1    14	/* GFX_OP_BOOL_1 */
-#define I810_CTXREG_B2    15	/* GFX_OP_BOOL_2 */
-#define I810_CTXREG_LCS   16	/* GFX_OP_LINEWIDTH_CULL_SHADE_MODE */
-#define I810_CTXREG_PV    17	/* GFX_OP_PV_RULE -- Invarient! */
-#define I810_CTXREG_ZA    18	/* GFX_OP_ZBIAS_ALPHAFUNC */
-#define I810_CTXREG_AA    19	/* GFX_OP_ANTIALIAS */
-#define I810_CTX_SETUP_SIZE 20 
-
-/* Texture state (per tex unit)
- */
-#define I810_TEXREG_MI0  0	/* GFX_OP_MAP_INFO (4 dwords) */
-#define I810_TEXREG_MI1  1	
-#define I810_TEXREG_MI2  2	
-#define I810_TEXREG_MI3  3	
-#define I810_TEXREG_MF   4	/* GFX_OP_MAP_FILTER */
-#define I810_TEXREG_MLC  5	/* GFX_OP_MAP_LOD_CTL */
-#define I810_TEXREG_MLL  6	/* GFX_OP_MAP_LOD_LIMITS */
-#define I810_TEXREG_MCS  7	/* GFX_OP_MAP_COORD_SETS ??? */
-#define I810_TEX_SETUP_SIZE 8
-
-#define I810_FRONT   0x1
-#define I810_BACK    0x2
-#define I810_DEPTH   0x4
-
-
-typedef struct _drm_i810_init {
-	enum {
-		I810_INIT_DMA = 0x01,
-		I810_CLEANUP_DMA = 0x02
-	} func;
-	int ring_map_idx;
-	int buffer_map_idx;
-	int sarea_priv_offset;
-	unsigned int ring_start;
-	unsigned int ring_end;
-	unsigned int ring_size;
-	unsigned int front_offset;
-	unsigned int back_offset;
-	unsigned int depth_offset;
-	unsigned int w;
-	unsigned int h;
-	unsigned int pitch;
-	unsigned int pitch_bits; 
-} drm_i810_init_t;
-
-/* Warning: If you change the SAREA structure you must change the Xserver
- * structure as well */
-
-typedef struct _drm_i810_tex_region {
-	unsigned char next, prev; /* indices to form a circular LRU  */
-	unsigned char in_use;	/* owned by a client, or free? */
-	int age;		/* tracked by clients to update local LRU's */
-} drm_i810_tex_region_t;
-
-typedef struct _drm_i810_sarea {
-   	unsigned int ContextState[I810_CTX_SETUP_SIZE];
-   	unsigned int BufferState[I810_DEST_SETUP_SIZE];
-   	unsigned int TexState[2][I810_TEX_SETUP_SIZE];
-   	unsigned int dirty;
-
-	unsigned int nbox;
-	drm_clip_rect_t boxes[I810_NR_SAREA_CLIPRECTS];
-
-	/* Maintain an LRU of contiguous regions of texture space.  If
-	 * you think you own a region of texture memory, and it has an
-	 * age different to the one you set, then you are mistaken and
-	 * it has been stolen by another client.  If global texAge
-	 * hasn't changed, there is no need to walk the list.
-	 *
-	 * These regions can be used as a proxy for the fine-grained
-	 * texture information of other clients - by maintaining them
-	 * in the same lru which is used to age their own textures,
-	 * clients have an approximate lru for the whole of global
-	 * texture space, and can make informed decisions as to which
-	 * areas to kick out.  There is no need to choose whether to
-	 * kick out your own texture or someone else's - simply eject
-	 * them all in LRU order.  
-	 */
-   
-	drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS+1]; 
-				/* Last elt is sentinal */
-        int texAge;		/* last time texture was uploaded */
-        int last_enqueue;	/* last time a buffer was enqueued */
-	int last_dispatch;	/* age of the most recently dispatched buffer */
-	int last_quiescent;     /*  */
-	int ctxOwner;		/* last context to upload state */
-
-	int vertex_prim;
-
-} drm_i810_sarea_t;
-
-typedef struct _drm_i810_clear {
-	int clear_color;
-	int clear_depth;
-	int flags;
-} drm_i810_clear_t;
-
-
-
-/* These may be placeholders if we have more cliprects than
- * I810_NR_SAREA_CLIPRECTS.  In that case, the client sets discard to
- * false, indicating that the buffer will be dispatched again with a
- * new set of cliprects.
- */
-typedef struct _drm_i810_vertex {
-   	int idx;		/* buffer index */
-	int used;		/* nr bytes in use */
-	int discard;		/* client is finished with the buffer? */
-} drm_i810_vertex_t;
-
-typedef struct drm_i810_dma {
-	void *virtual;
-	int request_idx;
-	int request_size;
-	int granted;
-} drm_i810_dma_t;
-
-#endif /* _I810_DRM_H_ */
diff --git a/bsd/mga_drm.h b/bsd/mga_drm.h
deleted file mode 100644
index fe1b9b9c..00000000
--- a/bsd/mga_drm.h
+++ /dev/null
@@ -1,274 +0,0 @@
-/* mga_drm.h -- Public header for the Matrox g200/g400 driver
- * Created: Tue Jan 25 01:50:01 1999 by jhartmann@precisioninsight.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- * 
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors: Jeff Hartmann <jhartmann@valinux.com>
- *          Keith Whitwell <keithw@valinux.com>
- *
- */
-
-#ifndef _MGA_DRM_H_
-#define _MGA_DRM_H_
-
-/* WARNING: If you change any of these defines, make sure to change the
- * defines in the Xserver file (xf86drmMga.h)
- */
-#ifndef _MGA_DEFINES_
-#define _MGA_DEFINES_
-
-#define MGA_F  0x1		/* fog */
-#define MGA_A  0x2		/* alpha */
-#define MGA_S  0x4		/* specular */
-#define MGA_T2 0x8		/* multitexture */
-
-#define MGA_WARP_TGZ            0
-#define MGA_WARP_TGZF           (MGA_F)
-#define MGA_WARP_TGZA           (MGA_A)
-#define MGA_WARP_TGZAF          (MGA_F|MGA_A)
-#define MGA_WARP_TGZS           (MGA_S)
-#define MGA_WARP_TGZSF          (MGA_S|MGA_F)
-#define MGA_WARP_TGZSA          (MGA_S|MGA_A)
-#define MGA_WARP_TGZSAF         (MGA_S|MGA_F|MGA_A)
-#define MGA_WARP_T2GZ           (MGA_T2)
-#define MGA_WARP_T2GZF          (MGA_T2|MGA_F)
-#define MGA_WARP_T2GZA          (MGA_T2|MGA_A)
-#define MGA_WARP_T2GZAF         (MGA_T2|MGA_A|MGA_F)
-#define MGA_WARP_T2GZS          (MGA_T2|MGA_S)
-#define MGA_WARP_T2GZSF         (MGA_T2|MGA_S|MGA_F)
-#define MGA_WARP_T2GZSA         (MGA_T2|MGA_S|MGA_A)
-#define MGA_WARP_T2GZSAF        (MGA_T2|MGA_S|MGA_F|MGA_A)
-
-#define MGA_MAX_G400_PIPES 16
-#define MGA_MAX_G200_PIPES  8	/* no multitex */
-#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES
-
-#define MGA_CARD_TYPE_G200 1
-#define MGA_CARD_TYPE_G400 2
-
-#define MGA_FRONT   0x1
-#define MGA_BACK    0x2
-#define MGA_DEPTH   0x4
-
-/* 3d state excluding texture units:
- */
-#define MGA_CTXREG_DSTORG   0	/* validated */
-#define MGA_CTXREG_MACCESS  1	
-#define MGA_CTXREG_PLNWT    2	
-#define MGA_CTXREG_DWGCTL    3	
-#define MGA_CTXREG_ALPHACTRL 4
-#define MGA_CTXREG_FOGCOLOR  5
-#define MGA_CTXREG_WFLAG     6
-#define MGA_CTXREG_TDUAL0    7
-#define MGA_CTXREG_TDUAL1    8
-#define MGA_CTXREG_FCOL      9
-#define MGA_CTXREG_STENCIL    10
-#define MGA_CTXREG_STENCILCTL 11
-#define MGA_CTX_SETUP_SIZE   12
-
-/* 2d state
- */
-#define MGA_2DREG_PITCH 	0
-#define MGA_2D_SETUP_SIZE 	1
-
-/* Each texture unit has a state:
- */
-#define MGA_TEXREG_CTL        0
-#define MGA_TEXREG_CTL2       1
-#define MGA_TEXREG_FILTER     2
-#define MGA_TEXREG_BORDERCOL  3
-#define MGA_TEXREG_ORG        4 /* validated */
-#define MGA_TEXREG_ORG1       5
-#define MGA_TEXREG_ORG2       6
-#define MGA_TEXREG_ORG3       7
-#define MGA_TEXREG_ORG4       8
-#define MGA_TEXREG_WIDTH      9
-#define MGA_TEXREG_HEIGHT     10
-#define MGA_TEX_SETUP_SIZE    11
-
-/* What needs to be changed for the current vertex dma buffer?
- */
-#define MGA_UPLOAD_CTX        0x1
-#define MGA_UPLOAD_TEX0       0x2
-#define MGA_UPLOAD_TEX1       0x4
-#define MGA_UPLOAD_PIPE       0x8
-#define MGA_UPLOAD_TEX0IMAGE  0x10 /* handled client-side */
-#define MGA_UPLOAD_TEX1IMAGE  0x20 /* handled client-side */
-#define MGA_UPLOAD_2D 	      0x40
-#define MGA_WAIT_AGE          0x80 /* handled client-side */
-#define MGA_UPLOAD_CLIPRECTS  0x100 /* handled client-side */
-#define MGA_DMA_FLUSH	      0x200 /* set when someone gets the lock
-                                       quiescent */
-
-/* 32 buffers of 64k each, total 2 meg.
- */
-#define MGA_DMA_BUF_ORDER     16
-#define MGA_DMA_BUF_SZ        (1<<MGA_DMA_BUF_ORDER)
-#define MGA_DMA_BUF_NR        31
-
-/* Keep these small for testing.
- */
-#define MGA_NR_SAREA_CLIPRECTS 8
-
-/* 2 heaps (1 for card, 1 for agp), each divided into upto 128
- * regions, subject to a minimum region size of (1<<16) == 64k. 
- *
- * Clients may subdivide regions internally, but when sharing between
- * clients, the region size is the minimum granularity. 
- */
-
-#define MGA_CARD_HEAP 0
-#define MGA_AGP_HEAP  1
-#define MGA_NR_TEX_HEAPS 2
-#define MGA_NR_TEX_REGIONS 16
-#define MGA_LOG_MIN_TEX_REGION_SIZE 16
-#endif
-
-typedef struct _drm_mga_warp_index {
-   	int installed;
-   	unsigned long phys_addr;
-   	int size;
-} drm_mga_warp_index_t;
-
-typedef struct drm_mga_init {
-   	enum { 
-	   	MGA_INIT_DMA = 0x01,
-	       	MGA_CLEANUP_DMA = 0x02
-	} func;
-   	int reserved_map_agpstart;
-   	int reserved_map_idx;
-   	int buffer_map_idx;
-   	int sarea_priv_offset;
-   	int primary_size;
-   	int warp_ucode_size;
-   	unsigned int frontOffset;
-   	unsigned int backOffset;
-   	unsigned int depthOffset;
-   	unsigned int textureOffset;
-   	unsigned int textureSize;
-        unsigned int agpTextureOffset;
-        unsigned int agpTextureSize;
-   	unsigned int cpp;
-   	unsigned int stride;
-   	int sgram;
-	int chipset;
-   	drm_mga_warp_index_t WarpIndex[MGA_MAX_WARP_PIPES];
-	unsigned int mAccess;
-} drm_mga_init_t;
-
-/* Warning: if you change the sarea structure, you must change the Xserver
- * structures as well */
-
-typedef struct _drm_mga_tex_region {
-	unsigned char next, prev;	
-	unsigned char in_use;	
-	unsigned int age;			
-} drm_mga_tex_region_t;
-
-typedef struct _drm_mga_sarea {
-	/* The channel for communication of state information to the kernel
-	 * on firing a vertex dma buffer.
-	 */
-   	unsigned int ContextState[MGA_CTX_SETUP_SIZE];
-   	unsigned int ServerState[MGA_2D_SETUP_SIZE];
-   	unsigned int TexState[2][MGA_TEX_SETUP_SIZE];
-   	unsigned int WarpPipe;
-   	unsigned int dirty;
-
-   	unsigned int nbox;
-   	drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS];
-
-
-	/* Information about the most recently used 3d drawable.  The
-	 * client fills in the req_* fields, the server fills in the 
-	 * exported_ fields and puts the cliprects into boxes, above.
-	 *
-	 * The client clears the exported_drawable field before
-	 * clobbering the boxes data.
-	 */
-        unsigned int req_drawable;	 /* the X drawable id */
-	unsigned int req_draw_buffer;	 /* MGA_FRONT or MGA_BACK */
-
-        unsigned int exported_drawable;	 
-	unsigned int exported_index; 
-        unsigned int exported_stamp;	
-        unsigned int exported_buffers;	 
-        unsigned int exported_nfront;
-        unsigned int exported_nback;
-	int exported_back_x, exported_front_x, exported_w;	
-	int exported_back_y, exported_front_y, exported_h;
-   	drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS];
-   
-	/* Counters for aging textures and for client-side throttling.
-	 */
-        unsigned int last_enqueue;	/* last time a buffer was enqueued */
-	unsigned int last_dispatch;	/* age of the most recently dispatched buffer */
-	unsigned int last_quiescent;     /*  */
-
-
-	/* LRU lists for texture memory in agp space and on the card
-	 */
-	drm_mga_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1];
-	unsigned int texAge[MGA_NR_TEX_HEAPS];
-	
-	/* Mechanism to validate card state.
-	 */
-   	int ctxOwner;
-        int vertexsize;
-} drm_mga_sarea_t;	
-
-/* Device specific ioctls:
- */
-typedef struct _drm_mga_clear {
-	unsigned int clear_color;
-	unsigned int clear_depth;
-	unsigned int flags;
-	unsigned int clear_depthmask;
-	unsigned int clear_color_mask;
-} drm_mga_clear_t;
-
-typedef struct _drm_mga_swap {
-   	int dummy;
-} drm_mga_swap_t;
-
-typedef struct _drm_mga_iload {
-	int idx;
-	int length;
-	unsigned int destOrg;
-} drm_mga_iload_t;
-
-typedef struct _drm_mga_vertex {
-   	int idx;		/* buffer to queue */
-	int used;		/* bytes in use */
-	int discard;		/* client finished with buffer?  */
-} drm_mga_vertex_t;
-
-typedef struct _drm_mga_indices {
-   	int idx;		/* buffer to queue */
-	unsigned int start;		
-	unsigned int end;		
-	int discard;		/* client finished with buffer?  */
-} drm_mga_indices_t;
-
-#endif
diff --git a/bsd/r128_drm.h b/bsd/r128_drm.h
deleted file mode 100644
index bff103c2..00000000
--- a/bsd/r128_drm.h
+++ /dev/null
@@ -1,111 +0,0 @@
-/* r128_drm.h -- Public header for the r128 driver -*- linux-c -*-
- * Created: Wed Apr  5 19:24:19 2000 by kevin@precisioninsight.com
- *
- * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- * 
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors: Kevin E. Martin <kevin@precisioninsight.com>
- *
- * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128_drm.h,v 1.1 2000/06/17 00:03:29 martin Exp $
- */
-
-#ifndef _R128_DRM_H_
-#define _R128_DRM_H_
-
-/* WARNING: If you change any of these defines, make sure to change the
- * defines in the Xserver file (xf86drmR128.h)
- */
-typedef struct drm_r128_init {
-	enum { 
-		R128_INIT_CCE    = 0x01,
-		R128_CLEANUP_CCE = 0x02
-	} func;
-	int sarea_priv_offset;
-	int is_pci;
-	int cce_mode;
-	int cce_fifo_size;
-	int cce_secure;
-	int ring_size;
-	int usec_timeout;
-
-	int fb_offset;
-	int agp_ring_offset;
-	int agp_read_ptr_offset;
-	int agp_vertbufs_offset;
-	int agp_indbufs_offset;
-	int agp_textures_offset;
-	int mmio_offset;
-} drm_r128_init_t;
-
-typedef struct drm_r128_packet {
-	unsigned long *buffer;
-	int            count;
-	int            flags;
-} drm_r128_packet_t;
-
-typedef enum drm_r128_prim {
-	_DRM_R128_PRIM_NONE		= 0x0001,
-	_DRM_R128_PRIM_POINT		= 0x0002,
-	_DRM_R128_PRIM_LINE		= 0x0004,
-	_DRM_R128_PRIM_POLY_LINE	= 0x0008,
-	_DRM_R128_PRIM_TRI_LIST		= 0x0010,
-	_DRM_R128_PRIM_TRI_FAN		= 0x0020,
-	_DRM_R128_PRIM_TRI_STRIP	= 0x0040,
-	_DRM_R128_PRIM_TRI_TYPE2	= 0x0080
-} drm_r128_prim_t;
-
-typedef struct drm_r128_vertex {
-				/* Indices here refer to the offset into
-				   buflist in drm_buf_get_t.  */
-	int		send_count;	  /* Number of buffers to send	    */
-	int		*send_indices;	  /* List of handles to buffers	    */
-	int		*send_sizes;	  /* Lengths of data to send	    */
-	drm_r128_prim_t	prim;		  /* Primitive type		    */
-	int		request_count;	  /* Number of buffers requested    */
-	int		*request_indices; /* Buffer information		    */
-	int		*request_sizes;
-	int		granted_count;	  /* Number of buffers granted	    */
-} drm_r128_vertex_t;
-
-/* WARNING: If you change any of these defines, make sure to change the
- * defines in the Xserver file (r128_sarea.h)
- */
-#define R128_LOCAL_TEX_HEAP       0
-#define R128_AGP_TEX_HEAP         1
-#define R128_NR_TEX_HEAPS         2
-#define R128_NR_TEX_REGIONS      64
-#define R128_LOG_TEX_GRANULARITY 16
-
-typedef struct drm_tex_region {
-	unsigned char next, prev;       
-	unsigned char in_use;   
-	int age;                        
-} drm_tex_region_t;
-
-typedef struct drm_r128_sarea {
-	drm_tex_region_t tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS+1];
-	int              tex_age[R128_NR_TEX_HEAPS];
-	int              ctx_owner;
-	int              ring_write;
-} drm_r128_sarea_t;
-
-#endif