radeon fix up the PCI ids for new memory map like the kernel one.. not

    perfect but should be very safe... align some other kernel bits i810
    align with kernel

6 files changed, 90 insertions, 76 deletions

diff --git a/shared-core/drm_pciids.txt b/shared-core/drm_pciids.txt
index a2b4e11b..c1289c3e 100644
--- a/shared-core/drm_pciids.txt
+++ b/shared-core/drm_pciids.txt
@@ -1,9 +1,9 @@
 [radeon]
 0x1002 0x3150 CHIP_RV380|CHIP_IS_MOBILITY "ATI Radeon Mobility X600 M24"
-0x1002 0x3152 CHIP_RV380|CHIP_IS_MOBILITY "ATI Radeon Mobility X300 M24"
-0x1002 0x3154 CHIP_RV380|CHIP_IS_MOBILITY "ATI FireGL M24 GL"
-0x1002 0x3E50 CHIP_RV380 "ATI Radeon RV380 X600"
-0x1002 0x3E54 CHIP_RV380 "ATI FireGL V3200 RV380"
+0x1002 0x3152 CHIP_RV380|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP "ATI Radeon Mobility X300 M24"
+0x1002 0x3154 CHIP_RV380|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP "ATI FireGL M24 GL"
+0x1002 0x3E50 CHIP_RV380|CHIP_NEW_MEMMAP "ATI Radeon RV380 X600"
+0x1002 0x3E54 CHIP_RV380|CHIP_NEW_MEMMAP "ATI FireGL V3200 RV380"
 0x1002 0x4136 CHIP_RS100|CHIP_IS_IGP "ATI Radeon RS100 IGP 320"
 0x1002 0x4137 CHIP_RS200|CHIP_IS_IGP "ATI Radeon RS200 IGP 340"
 0x1002 0x4144 CHIP_R300 "ATI Radeon AD 9500"
@@ -29,20 +29,20 @@
 0x1002 0x4437 CHIP_RS200|CHIP_IS_IGP|CHIP_IS_MOBILITY "ATI Radeon RS250 Mobility IGP"
 0x1002 0x4966 CHIP_RV250 "ATI Radeon If RV250 9000"
 0x1002 0x4967 CHIP_RV250 "ATI Radeon Ig RV250 9000"
-0x1002 0x4A48 CHIP_R420 "ATI Radeon JH R420 X800"
-0x1002 0x4A49 CHIP_R420 "ATI Radeon JI R420 X800 Pro"
-0x1002 0x4A4A CHIP_R420 "ATI Radeon JJ R420 X800 SE"
-0x1002 0x4A4B CHIP_R420 "ATI Radeon JK R420 X800 XT"
-0x1002 0x4A4C CHIP_R420 "ATI Radeon JL R420 X800"
-0x1002 0x4A4D CHIP_R420 "ATI FireGL JM X3-256"
-0x1002 0x4A4E CHIP_R420|CHIP_IS_MOBILITY "ATI Radeon JN R420 Mobility M18"
-0x1002 0x4A4F CHIP_R420 "ATI Radeon JO R420 X800 SE"
-0x1002 0x4A50 CHIP_R420 "ATI Radeon JP R420 X800 XT PE"
-0x1002 0x4A54 CHIP_R420 "ATI Radeon JT R420 AIW X800 VE"
-0x1002 0x4B49 CHIP_R420 "ATI Radeon R481 X850 XT"
-0x1002 0x4B4A CHIP_R420 "ATI Radeon R481 X850 SE"
-0x1002 0x4B4B CHIP_R420 "ATI Radeon R481 X850 Pro"
-0x1002 0x4B4C CHIP_R420 "ATI Radeon R481 X850 XT PE"
+0x1002 0x4A48 CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon JH R420 X800"
+0x1002 0x4A49 CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon JI R420 X800 Pro"
+0x1002 0x4A4A CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon JJ R420 X800 SE"
+0x1002 0x4A4B CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon JK R420 X800 XT"
+0x1002 0x4A4C CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon JL R420 X800"
+0x1002 0x4A4D CHIP_R420|CHIP_NEW_MEMMAP "ATI FireGL JM X3-256"
+0x1002 0x4A4E CHIP_R420|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP "ATI Radeon JN R420 Mobility M18"
+0x1002 0x4A4F CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon JO R420 X800 SE"
+0x1002 0x4A50 CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon JP R420 X800 XT PE"
+0x1002 0x4A54 CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon JT R420 AIW X800 VE"
+0x1002 0x4B49 CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon R481 X850 XT"
+0x1002 0x4B4A CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon R481 X850 SE"
+0x1002 0x4B4B CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon R481 X850 Pro"
+0x1002 0x4B4C CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon R481 X850 XT PE"
 0x1002 0x4C57 CHIP_RV200|CHIP_IS_MOBILITY "ATI Radeon LW RV200 Mobility 7500 M7"
 0x1002 0x4C58 CHIP_RV200|CHIP_IS_MOBILITY "ATI Radeon LX RV200 Mobility FireGL 7800 M7"
 0x1002 0x4C59 CHIP_RV100|CHIP_IS_MOBILITY "ATI Radeon LY RV100 Mobility M6"
@@ -79,23 +79,23 @@
 0x1002 0x5460 CHIP_RV380|CHIP_IS_MOBILITY "ATI Radeon Mobility X300 M22"
 0x1002 0x5462 CHIP_RV380|CHIP_IS_MOBILITY "ATI Radeon Mobility X600 SE M24C"
 0x1002 0x5464 CHIP_RV380|CHIP_IS_MOBILITY "ATI FireGL M22 GL 5464"
-0x1002 0x5548 CHIP_R420 "ATI Radeon R423 X800"
-0x1002 0x5549 CHIP_R420 "ATI Radeon R423 X800 Pro"
-0x1002 0x554A CHIP_R420 "ATI Radeon R423 X800 XT PE"
-0x1002 0x554B CHIP_R420 "ATI Radeon R423 X800 SE"
-0x1002 0x554C CHIP_R420 "ATI Radeon R430 X800 XTP"
-0x1002 0x554D CHIP_R420 "ATI Radeon R430 X800 XL"
-0x1002 0x554E CHIP_R420 "ATI Radeon R430 X800 SE"
-0x1002 0x554F CHIP_R420 "ATI Radeon R430 X800"
-0x1002 0x5550 CHIP_R420 "ATI FireGL V7100 R423"
-0x1002 0x5551 CHIP_R420 "ATI FireGL V5100 R423 UQ"
-0x1002 0x5552 CHIP_R420 "ATI FireGL unknown R423 UR"
-0x1002 0x5554 CHIP_R420 "ATI FireGL unknown R423 UT"
-0x1002 0x564A CHIP_RV410|CHIP_IS_MOBILITY "ATI Mobility FireGL V5000 M26"
-0x1002 0x564B CHIP_RV410|CHIP_IS_MOBILITY "ATI Mobility FireGL V5000 M26"
-0x1002 0x564F CHIP_RV410|CHIP_IS_MOBILITY "ATI Radeon Mobility X700 XL M26"
-0x1002 0x5652 CHIP_RV410|CHIP_IS_MOBILITY "ATI Radeon Mobility X700 M26"
-0x1002 0x5653 CHIP_RV410|CHIP_IS_MOBILITY "ATI Radeon Mobility X700 M26"
+0x1002 0x5548 CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon R423 X800"
+0x1002 0x5549 CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon R423 X800 Pro"
+0x1002 0x554A CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon R423 X800 XT PE"
+0x1002 0x554B CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon R423 X800 SE"
+0x1002 0x554C CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon R430 X800 XTP"
+0x1002 0x554D CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon R430 X800 XL"
+0x1002 0x554E CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon R430 X800 SE"
+0x1002 0x554F CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon R430 X800"
+0x1002 0x5550 CHIP_R420|CHIP_NEW_MEMMAP "ATI FireGL V7100 R423"
+0x1002 0x5551 CHIP_R420|CHIP_NEW_MEMMAP "ATI FireGL V5100 R423 UQ"
+0x1002 0x5552 CHIP_R420|CHIP_NEW_MEMMAP "ATI FireGL unknown R423 UR"
+0x1002 0x5554 CHIP_R420|CHIP_NEW_MEMMAP "ATI FireGL unknown R423 UT"
+0x1002 0x564A CHIP_RV410|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP "ATI Mobility FireGL V5000 M26"
+0x1002 0x564B CHIP_RV410|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP "ATI Mobility FireGL V5000 M26"
+0x1002 0x564F CHIP_RV410|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP "ATI Radeon Mobility X700 XL M26"
+0x1002 0x5652 CHIP_RV410|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP "ATI Radeon Mobility X700 M26"
+0x1002 0x5653 CHIP_RV410|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP "ATI Radeon Mobility X700 M26"
 0x1002 0x5834 CHIP_RS300|CHIP_IS_IGP "ATI Radeon RS300 9100 IGP"
 0x1002 0x5835 CHIP_RS300|CHIP_IS_IGP|CHIP_IS_MOBILITY "ATI Radeon RS300 Mobility IGP"
 0x1002 0x5960 CHIP_RV280 "ATI Radeon RV280 9250"
@@ -104,31 +104,31 @@
 0x1002 0x5964 CHIP_RV280 "ATI Radeon RV280 9200 SE"
 0x1002 0x5965 CHIP_RV280 "ATI FireMV 2200 PCI"
 0x1002 0x5969 CHIP_RV100 "ATI ES1000 RN50"
-0x1002 0x5b60 CHIP_RV380 "ATI Radeon RV370 X300 SE"
-0x1002 0x5b62 CHIP_RV380 "ATI Radeon RV370 X600 Pro"
-0x1002 0x5b63 CHIP_RV380 "ATI Radeon RV370 X550"
-0x1002 0x5b64 CHIP_RV380 "ATI FireGL V3100 (RV370) 5B64"
-0x1002 0x5b65 CHIP_RV380 "ATI FireMV 2200 PCIE (RV370) 5B65"
+0x1002 0x5b60 CHIP_RV380|CHIP_NEW_MEMMAP "ATI Radeon RV370 X300 SE"
+0x1002 0x5b62 CHIP_RV380|CHIP_NEW_MEMMAP "ATI Radeon RV370 X600 Pro"
+0x1002 0x5b63 CHIP_RV380|CHIP_NEW_MEMMAP "ATI Radeon RV370 X550"
+0x1002 0x5b64 CHIP_RV380|CHIP_NEW_MEMMAP "ATI FireGL V3100 (RV370) 5B64"
+0x1002 0x5b65 CHIP_RV380|CHIP_NEW_MEMMAP "ATI FireMV 2200 PCIE (RV370) 5B65"
 0x1002 0x5c61 CHIP_RV280|CHIP_IS_MOBILITY "ATI Radeon RV280 Mobility"
 0x1002 0x5c63 CHIP_RV280|CHIP_IS_MOBILITY "ATI Radeon RV280 Mobility"
-0x1002 0x5d48 CHIP_R420|CHIP_IS_MOBILITY "ATI Mobility Radeon X800 XT M28"
-0x1002 0x5d49 CHIP_R420|CHIP_IS_MOBILITY "ATI Mobility FireGL V5100 M28"
-0x1002 0x5d4a CHIP_R420|CHIP_IS_MOBILITY "ATI Mobility Radeon X800 M28"
-0x1002 0x5d4c CHIP_R420 "ATI Radeon R480 X850"
-0x1002 0x5d4d CHIP_R420 "ATI Radeon R480 X850 XT PE"
-0x1002 0x5d4e CHIP_R420 "ATI Radeon R480 X850 SE"
-0x1002 0x5d4f CHIP_R420 "ATI Radeon R480 X850 Pro"
-0x1002 0x5d50 CHIP_R420 "ATI unknown Radeon / FireGL R480"
-0x1002 0x5d52 CHIP_R420 "ATI Radeon R480 X850 XT"
-0x1002 0x5d57 CHIP_R420 "ATI Radeon R423 X800 XT"
-0x1002 0x5e48 CHIP_RV410 "ATI FireGL V5000 RV410"
-0x1002 0x5e4a CHIP_RV410 "ATI Radeon RV410 X700 XT"
-0x1002 0x5e4b CHIP_RV410 "ATI Radeon RV410 X700 Pro"
-0x1002 0x5e4c CHIP_RV410 "ATI Radeon RV410 X700 SE"
-0x1002 0x5e4d CHIP_RV410 "ATI Radeon RV410 X700"
-0x1002 0x5e4f CHIP_RV410 "ATI Radeon RV410 X700 SE"
-0x1002 0x7834 CHIP_RS300|CHIP_IS_IGP "ATI Radeon RS350 9000/9100 IGP"
-0x1002 0x7835 CHIP_RS300|CHIP_IS_IGP|CHIP_IS_MOBILITY "ATI Radeon RS350 Mobility IGP"
+0x1002 0x5d48 CHIP_R420|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP "ATI Mobility Radeon X800 XT M28"
+0x1002 0x5d49 CHIP_R420|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP "ATI Mobility FireGL V5100 M28"
+0x1002 0x5d4a CHIP_R420|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP "ATI Mobility Radeon X800 M28"
+0x1002 0x5d4c CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon R480 X850"
+0x1002 0x5d4d CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon R480 X850 XT PE"
+0x1002 0x5d4e CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon R480 X850 SE"
+0x1002 0x5d4f CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon R480 X850 Pro"
+0x1002 0x5d50 CHIP_R420|CHIP_NEW_MEMMAP "ATI unknown Radeon / FireGL R480"
+0x1002 0x5d52 CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon R480 X850 XT"
+0x1002 0x5d57 CHIP_R420|CHIP_NEW_MEMMAP "ATI Radeon R423 X800 XT"
+0x1002 0x5e48 CHIP_RV410|CHIP_NEW_MEMMAP "ATI FireGL V5000 RV410"
+0x1002 0x5e4a CHIP_RV410|CHIP_NEW_MEMMAP "ATI Radeon RV410 X700 XT"
+0x1002 0x5e4b CHIP_RV410|CHIP_NEW_MEMMAP "ATI Radeon RV410 X700 Pro"
+0x1002 0x5e4c CHIP_RV410|CHIP_NEW_MEMMAP "ATI Radeon RV410 X700 SE"
+0x1002 0x5e4d CHIP_RV410|CHIP_NEW_MEMMAP "ATI Radeon RV410 X700"
+0x1002 0x5e4f CHIP_RV410|CHIP_NEW_MEMMAP "ATI Radeon RV410 X700 SE"
+0x1002 0x7834 CHIP_RS300|CHIP_IS_IGP|CHIP_NEW_MEMMAP "ATI Radeon RS350 9000/9100 IGP"
+0x1002 0x7835 CHIP_RS300|CHIP_IS_IGP|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP "ATI Radeon RS350 Mobility IGP"
 
 [r128]
 0x1002 0x4c45 0 "ATI Rage 128 Mobility LE (PCI)"
diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index 3e269419..cd718337 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -213,5 +213,5 @@ void i915_driver_irq_uninstall(drm_device_t * dev)
 	I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
 
 	temp = I915_READ16(I915REG_INT_IDENTITY_R);
-	I915_WRITE(I915REG_INT_IDENTITY_R, temp);
+	I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
 }
diff --git a/shared-core/r300_cmdbuf.c b/shared-core/r300_cmdbuf.c
index 09378b2b..6952eaac 100644
--- a/shared-core/r300_cmdbuf.c
+++ b/shared-core/r300_cmdbuf.c
@@ -242,8 +242,10 @@ static __inline__ int r300_check_range(unsigned reg, int count)
 	return 0;
 }
 
-  /* we expect offsets passed to the framebuffer to be either within video memory or
-     within AGP space */
+/*
+ * we expect offsets passed to the framebuffer to be either within video 
+ * memory or within AGP space 
+ */
 static __inline__ int r300_check_offset(drm_radeon_private_t *dev_priv,
 					u32 offset)
 {
@@ -573,7 +575,7 @@ static __inline__ int r300_emit_raw_packet3(drm_radeon_private_t *dev_priv,
 	case RADEON_3D_LOAD_VBPNTR:	/* load vertex array pointers */
 		return r300_emit_3d_load_vbpntr(dev_priv, cmdbuf, header);
 
-	case RADEON_CNTL_BITBLT_MULTI: 
+	case RADEON_CNTL_BITBLT_MULTI:
 		return r300_emit_bitblt_multi(dev_priv, cmdbuf);
 
 	case RADEON_CP_3D_DRAW_IMMD_2:	/* triggers drawing using in-packet vertex data */
@@ -702,9 +704,9 @@ static void r300_discard_buffer(drm_device_t * dev, drm_buf_t * buf)
 	buf->used = 0;
 }
 
-static __inline__ int r300_scratch(drm_radeon_private_t *dev_priv,
-				   drm_radeon_kcmd_buffer_t *cmdbuf,
-				   drm_r300_cmd_header_t header)
+static int r300_scratch(drm_radeon_private_t *dev_priv,
+			drm_radeon_kcmd_buffer_t *cmdbuf,
+			drm_r300_cmd_header_t header)
 {
 	u32 *ref_age_base;
 	u32 i, buf_idx, h_pending;
@@ -938,4 +940,3 @@ int r300_do_cp_cmdbuf(drm_device_t *dev,
 
 	return ret;
 }
-
diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c
index 9ac83a00..80d63745 100644
--- a/shared-core/radeon_cp.c
+++ b/shared-core/radeon_cp.c
@@ -1332,6 +1332,14 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
 
 	DRM_DEBUG("\n");
 
+	/* if we require new memory map but we don't have it fail */
+	if ((dev_priv->flags & CHIP_NEW_MEMMAP) && !dev_priv->new_memmap)
+	{
+		DRM_ERROR("Cannot initialise DRM on this card\nThis card requires a new X.org DDX for 3D\n");
+		radeon_do_cleanup_cp(dev);
+		return DRM_ERR(EINVAL);
+	}
+
 	if (init->is_pci && (dev_priv->flags & CHIP_IS_AGP))
 	{
 		DRM_DEBUG("Forcing AGP card to PCI mode\n");
diff --git a/shared-core/radeon_drv.h b/shared-core/radeon_drv.h
index af8c0a72..2ef5725f 100644
--- a/shared-core/radeon_drv.h
+++ b/shared-core/radeon_drv.h
@@ -83,9 +83,10 @@
  * 1.16- Add R200_EMIT_PP_TRI_PERF_CNTL packet to support brilinear
  *       texture filtering on r200
  * 1.17- Add initial support for R300 (3D).
- * 1.18- Add support for GL_ATI_fragment_shader, new packets R200_EMIT_PP_AFS_0/1,
-         R200_EMIT_PP_TXCTLALL_0-5 (replaces R200_EMIT_PP_TXFILTER_0-5, 2 more regs)
-         and R200_EMIT_ATF_TFACTOR (replaces R200_EMIT_TFACTOR_0 (8 consts instead of 6)
+ * 1.18- Add support for GL_ATI_fragment_shader, new packets
+ *       R200_EMIT_PP_AFS_0/1, R200_EMIT_PP_TXCTLALL_0-5 (replaces
+ *       R200_EMIT_PP_TXFILTER_0-5, 2 more regs) and R200_EMIT_ATF_TFACTOR
+ *       (replaces R200_EMIT_TFACTOR_0 (8 consts instead of 6)
  * 1.19- Add support for gart table in FB memory and PCIE r300
  * 1.20- Add support for r300 texrect
  * 1.21- Add support for card type getparam
@@ -98,6 +99,9 @@
 #define DRIVER_MINOR		24
 #define DRIVER_PATCHLEVEL	0
 
+/*
+ * Radeon chip families
+ */
 enum radeon_family {
 	CHIP_R100,
 	CHIP_RV100,
@@ -134,8 +138,9 @@ enum radeon_chip_flags {
 	CHIP_IS_IGP = 0x00020000UL,
 	CHIP_SINGLE_CRTC = 0x00040000UL,
 	CHIP_IS_AGP = 0x00080000UL,
-	CHIP_HAS_HIERZ = 0x00100000UL, 
+	CHIP_HAS_HIERZ = 0x00100000UL,
 	CHIP_IS_PCIE = 0x00200000UL,
+	CHIP_NEW_MEMMAP = 0x00400000UL,
 };
 
 #define GET_RING_HEAD(dev_priv)	(dev_priv->writeback_works ? \
@@ -275,11 +280,12 @@ typedef struct drm_radeon_private {
 
 	unsigned long pcigart_offset;
 	drm_ati_pcigart_info gart_info;
-	/* starting from here on, data is preserved accross an open */
-	uint32_t flags;		/* see radeon_chip_flags */
 
 	u32 scratch_ages[5];
 
+	/* starting from here on, data is preserved accross an open */
+	uint32_t flags;		/* see radeon_chip_flags */
+
 } drm_radeon_private_t;
 
 typedef struct drm_radeon_buf_priv {
@@ -364,7 +370,6 @@ extern int r300_do_cp_cmdbuf(drm_device_t *dev, DRMFILE filp,
 #define RADEON_AGP_COMMAND		0x0f60
 #define RADEON_AGP_COMMAND_PCI_CONFIG	0x0060	/* offset in PCI config */
 #       define RADEON_AGP_ENABLE            (1<<8)
-
 #define RADEON_AUX_SCISSOR_CNTL		0x26f0
 #	define RADEON_EXCLUSIVE_SCISSOR_0	(1 << 24)
 #	define RADEON_EXCLUSIVE_SCISSOR_1	(1 << 25)
diff --git a/shared-core/radeon_state.c b/shared-core/radeon_state.c
index 45b1ecc4..f6a66112 100644
--- a/shared-core/radeon_state.c
+++ b/shared-core/radeon_state.c
@@ -1682,7 +1682,7 @@ static int radeon_cp_dispatch_texture(DRMFILE filp,
 			if (tex->height == 1) {
 				if (tex_width >= 64 || tex_width <= 16) {
 					RADEON_COPY_MT(buffer, data,
-						 tex_width * sizeof(u32));
+						(int)(tex_width * sizeof(u32)));
 				} else if (tex_width == 32) {
 					RADEON_COPY_MT(buffer, data, 16);
 					RADEON_COPY_MT(buffer + 8,
@@ -1690,7 +1690,7 @@ static int radeon_cp_dispatch_texture(DRMFILE filp,
 				}
 			} else if (tex_width >= 64 || tex_width == 16) {
 				RADEON_COPY_MT(buffer, data,
-					       dwords * sizeof(u32));
+					       (int)(dwords * sizeof(u32)));
 			} else if (tex_width < 16) {
 				for (i = 0; i < tex->height; i++) {
 					RADEON_COPY_MT(buffer, data, tex_width);
@@ -1718,7 +1718,7 @@ static int radeon_cp_dispatch_texture(DRMFILE filp,
 				 * can upload it directly.
 				 */
 				RADEON_COPY_MT(buffer, data,
-					       dwords * sizeof(u32));
+					       (int)(dwords * sizeof(u32)));
 			} else {
 				/* Texture image width is less than the minimum, so we
 				 * need to pad out each image scanline to the minimum