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authorKeith Whitwell <keith@tungstengraphics.com>2003-06-09 23:11:23 +0000
committerKeith Whitwell <keith@tungstengraphics.com>2003-06-09 23:11:23 +0000
commit1062b9930f2c0ddb9f5f0db29796aba0e247c80d (patch)
treeb9916f746237902abaefbc2e5f80a545a080fd9b
parent1a2bb4332972c57c0d810e879e251d74a538f13b (diff)
Don't activate blend fallbacks unless blending is enabled
-rw-r--r--shared-core/radeon_state.c5
-rw-r--r--shared/radeon_state.c5
2 files changed, 10 insertions, 0 deletions
diff --git a/shared-core/radeon_state.c b/shared-core/radeon_state.c
index 8e9485a7..1ca42528 100644
--- a/shared-core/radeon_state.c
+++ b/shared-core/radeon_state.c
@@ -292,6 +292,9 @@ static struct {
{ R200_PP_CUBIC_OFFSET_F1_4, 5, "R200_PP_CUBIC_OFFSET_F1_4" },
{ R200_PP_CUBIC_FACES_5, 1, "R200_PP_CUBIC_FACES_5" },
{ R200_PP_CUBIC_OFFSET_F1_5, 5, "R200_PP_CUBIC_OFFSET_F1_5" },
+ { RADEON_PP_TEX_SIZE_0, 2, "RADEON_PP_TEX_SIZE_0" },
+ { RADEON_PP_TEX_SIZE_1, 2, "RADEON_PP_TEX_SIZE_1" },
+ { RADEON_PP_TEX_SIZE_2, 2, "RADEON_PP_TEX_SIZE_1" },
};
@@ -1168,6 +1171,8 @@ static int radeon_cp_dispatch_texture( DRMFILE filp,
}
+ printk("Upload to %x\n", tex->offset);
+
/* Dispatch the indirect buffer.
*/
buffer = (u32*)((char*)dev_priv->buffers->handle + buf->offset);
diff --git a/shared/radeon_state.c b/shared/radeon_state.c
index 8e9485a7..1ca42528 100644
--- a/shared/radeon_state.c
+++ b/shared/radeon_state.c
@@ -292,6 +292,9 @@ static struct {
{ R200_PP_CUBIC_OFFSET_F1_4, 5, "R200_PP_CUBIC_OFFSET_F1_4" },
{ R200_PP_CUBIC_FACES_5, 1, "R200_PP_CUBIC_FACES_5" },
{ R200_PP_CUBIC_OFFSET_F1_5, 5, "R200_PP_CUBIC_OFFSET_F1_5" },
+ { RADEON_PP_TEX_SIZE_0, 2, "RADEON_PP_TEX_SIZE_0" },
+ { RADEON_PP_TEX_SIZE_1, 2, "RADEON_PP_TEX_SIZE_1" },
+ { RADEON_PP_TEX_SIZE_2, 2, "RADEON_PP_TEX_SIZE_1" },
};
@@ -1168,6 +1171,8 @@ static int radeon_cp_dispatch_texture( DRMFILE filp,
}
+ printk("Upload to %x\n", tex->offset);
+
/* Dispatch the indirect buffer.
*/
buffer = (u32*)((char*)dev_priv->buffers->handle + buf->offset);