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authorKevin E Martin <kem@kem.org>2001-04-30 15:07:18 +0000
committerKevin E Martin <kem@kem.org>2001-04-30 15:07:18 +0000
commitdf76f812924e4db284fd38b3c5db6b87ec0d82fc (patch)
tree07c416af9b3e3fedfba1f10db35ccc8be1c4b39c
parentd1ef7f9d2c9f8f191ab79b1a43eb96a787df5f64 (diff)
- PCIGART patches for Alpha from Compaq
-rw-r--r--libdrm/xf86drm.c10
-rw-r--r--linux-core/drmP.h4
-rw-r--r--linux/drmP.h4
-rw-r--r--linux/radeon_cp.c19
-rw-r--r--linux/radeon_drv.h1
5 files changed, 24 insertions, 14 deletions
diff --git a/libdrm/xf86drm.c b/libdrm/xf86drm.c
index 4c8b1e84..8d663dae 100644
--- a/libdrm/xf86drm.c
+++ b/libdrm/xf86drm.c
@@ -67,11 +67,6 @@ extern int xf86RemoveSIGIOHandler(int fd);
# endif
#endif
-#if defined(__alpha__) && defined(__linux__)
-extern unsigned long _bus_base(void);
-#define BUS_BASE _bus_base()
-#endif
-
/* Not all systems have MAP_FAILED defined */
#ifndef MAP_FAILED
#define MAP_FAILED ((void *)-1)
@@ -494,11 +489,6 @@ int drmAddMap(int fd,
drm_map_t map;
map.offset = offset;
-#ifdef __alpha__
- /* Make sure we add the bus_base to all but shm */
- if (type != DRM_SHM)
- map.offset += BUS_BASE;
-#endif
map.size = size;
map.handle = 0;
map.type = type;
diff --git a/linux-core/drmP.h b/linux-core/drmP.h
index 227ec35a..b48d9b1f 100644
--- a/linux-core/drmP.h
+++ b/linux-core/drmP.h
@@ -710,7 +710,11 @@ typedef struct drm_device {
drm_agp_head_t *agp;
#endif
#ifdef __alpha__
+#if LINUX_VERSION_CODE < 0x020403
struct pci_controler *hose;
+#else
+ struct pci_controller *hose;
+#endif
#endif
drm_sg_mem_t *sg; /* Scatter gather memory */
unsigned long *ctx_bitmap;
diff --git a/linux/drmP.h b/linux/drmP.h
index 227ec35a..b48d9b1f 100644
--- a/linux/drmP.h
+++ b/linux/drmP.h
@@ -710,7 +710,11 @@ typedef struct drm_device {
drm_agp_head_t *agp;
#endif
#ifdef __alpha__
+#if LINUX_VERSION_CODE < 0x020403
struct pci_controler *hose;
+#else
+ struct pci_controller *hose;
+#endif
#endif
drm_sg_mem_t *sg; /* Scatter gather memory */
unsigned long *ctx_bitmap;
diff --git a/linux/radeon_cp.c b/linux/radeon_cp.c
index f8d8c2ea..670c3dd4 100644
--- a/linux/radeon_cp.c
+++ b/linux/radeon_cp.c
@@ -38,6 +38,12 @@
#define RADEON_FIFO_DEBUG 0
+#if defined(__alpha__)
+# define PCIGART_ENABLED
+#else
+# undef PCIGART_ENABLED
+#endif
+
/* CP microcode (from ATI) */
static u32 radeon_cp_microcode[][2] = {
@@ -659,7 +665,7 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
dev_priv->is_pci = init->is_pci;
-#if 1
+#if !defined(PCIGART_ENABLED)
/* PCI support is not 100% working, so we disable it here.
*/
if ( dev_priv->is_pci ) {
@@ -671,7 +677,6 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
#endif
if ( dev_priv->is_pci && !dev->sg ) {
- DRM_DEBUG( "PCI GART memory not allocated!\n" );
DRM_ERROR( "PCI GART memory not allocated!\n" );
DRM(free)( dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER );
dev->dev_private = NULL;
@@ -878,7 +883,6 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
if ( dev_priv->is_pci ) {
dev_priv->phys_pci_gart = DRM(ati_pcigart_init)( dev );
if ( !dev_priv->phys_pci_gart ) {
- DRM_DEBUG( "failed to init PCI GART!\n" );
DRM_ERROR( "failed to init PCI GART!\n" );
DRM(free)( dev_priv, sizeof(*dev_priv),
DRM_MEM_DRIVER );
@@ -904,7 +908,14 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
/* Turn off AGP aperture -- is this required for PCIGART?
*/
- RADEON_WRITE( RADEON_MC_AGP_LOCATION, 0 );
+ RADEON_WRITE( RADEON_MC_AGP_LOCATION, 0xffffffc0 ); /* ?? */
+ RADEON_WRITE( RADEON_AGP_COMMAND, 0 ); /* clear AGP_COMMAND */
+#if defined(__alpha__)
+ /* HACK! something is clobbering MEM_CNTL on Alpha! */
+ DRM_ERROR( "MEM_CNTL 0x%x\n",
+ RADEON_READ(0x0140) );
+ RADEON_WRITE(0x0140, 0x29002901);
+#endif
} else {
/* Turn off PCI GART
*/
diff --git a/linux/radeon_drv.h b/linux/radeon_drv.h
index ca349c2c..4217beee 100644
--- a/linux/radeon_drv.h
+++ b/linux/radeon_drv.h
@@ -181,6 +181,7 @@ extern int radeon_cp_indirect( struct inode *inode, struct file *filp,
* for Radeon kernel driver.
*/
+#define RADEON_AGP_COMMAND 0x0f60
#define RADEON_AUX_SCISSOR_CNTL 0x26f0
# define RADEON_EXCLUSIVE_SCISSOR_0 (1 << 24)
# define RADEON_EXCLUSIVE_SCISSOR_1 (1 << 25)