diff options
| author | Ben Skeggs <darktama@iinet.com.au> | 2006-12-21 17:43:48 +1100 |
|---|---|---|
| committer | Dave Airlie <airlied@linux.ie> | 2006-12-21 17:47:10 +1100 |
| commit | b7586ab539e5f8d16b473543ab829d0a4441f87c (patch) | |
| tree | a7cc3d4b951935f0530dcf55d4d892d74afdf394 | |
| parent | 9acd4a13f2355e8f550669702a5c6db16cc14b0f (diff) | |
nouveau: save/restore endianness flag on FIFO switch
This makes my G5 survive glxinfo and nouveau_demo - airlied
| -rw-r--r-- | shared-core/nouveau_fifo.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/shared-core/nouveau_fifo.c b/shared-core/nouveau_fifo.c index a611e438..f52f39f9 100644 --- a/shared-core/nouveau_fifo.c +++ b/shared-core/nouveau_fifo.c @@ -358,7 +358,13 @@ static void nouveau_nv40_context_init(drm_device_t *dev, RAMFC_WR(DMA_GET , init->put_base); RAMFC_WR(DMA_INSTANCE , nouveau_chip_instance_get(dev, cb_obj->instance)); - RAMFC_WR(DMA_FETCH , 0x30086078); + RAMFC_WR(DMA_FETCH , NV_PFIFO_CACH1_DMAF_TRIG_128_BYTES | + NV_PFIFO_CACH1_DMAF_SIZE_128_BYTES | + NV_PFIFO_CACH1_DMAF_MAX_REQS_8 | +#ifdef __BIG_ENDIAN + NV_PFIFO_CACH1_BIG_ENDIAN | +#endif + 0x30000000 /* no idea.. */); RAMFC_WR(DMA_SUBROUTINE, init->put_base); RAMFC_WR(GRCTX_INSTANCE, 0); /* XXX */ RAMFC_WR(DMA_TIMESLICE , 0x0001FFFF); @@ -379,7 +385,7 @@ static void nouveau_nv40_context_save(drm_device_t *dev) RAMFC_WR(DMA_INSTANCE , NV_READ(NV_PFIFO_CACH1_DMAI)); RAMFC_WR(DMA_DCOUNT , NV_READ(NV_PFIFO_CACH1_DMA_DCOUNT)); RAMFC_WR(DMA_STATE , NV_READ(NV_PFIFO_CACH1_DMAS)); - //fetch + RAMFC_WR(DMA_FETCH , NV_READ(NV_PFIFO_CACH1_DMAF)); RAMFC_WR(ENGINE , NV_READ(NV_PFIFO_CACH1_ENG)); RAMFC_WR(PULL1_ENGINE , NV_READ(NV_PFIFO_CACH1_PUL1)); RAMFC_WR(ACQUIRE_VALUE , NV_READ(NV_PFIFO_CACH1_ACQUIRE_VALUE)); |