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authorBen Skeggs <skeggsb@gmail.com>2007-08-15 01:40:46 +1000
committerBen Skeggs <skeggsb@gmail.com>2007-08-15 01:40:46 +1000
commita6ea60c77e8d4a266d696e0d99c11b1f39578dcc (patch)
treea37dc4b505c8b8eb902b5f53a6de2362e6d48edc
parent02c4e0e757b69cd6ae38b8ab2c078b3f06fea661 (diff)
nouveau: Catch all NV4x chips instead of just NV_40.
-rw-r--r--shared-core/nv04_instmem.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/shared-core/nv04_instmem.c b/shared-core/nv04_instmem.c
index 5e0f6f4e..b5569b55 100644
--- a/shared-core/nv04_instmem.c
+++ b/shared-core/nv04_instmem.c
@@ -9,21 +9,18 @@ nv04_instmem_determine_amount(struct drm_device *dev)
int i;
/* Figure out how much instance memory we need */
- switch (dev_priv->card_type) {
- case NV_40:
+ if (dev_priv->card_type >= NV_40) {
/* We'll want more instance memory than this on some NV4x cards.
* There's a 16MB aperture to play with that maps onto the end
* of vram. For now, only reserve a small piece until we know
* more about what each chipset requires.
*/
dev_priv->ramin_rsvd_vram = (1*1024* 1024);
- break;
- default:
+ } else {
/*XXX: what *are* the limits on <NV40 cards?, and does RAMIN
* exist in vram on those cards as well?
*/
dev_priv->ramin_rsvd_vram = (512*1024);
- break;
}
DRM_DEBUG("RAMIN size: %dKiB\n", dev_priv->ramin_rsvd_vram>>10);