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authorBen Skeggs <darktama@iinet.net.au>2006-10-17 06:12:18 +1100
committerBen Skeggs <darktama@iinet.net.au>2006-10-17 06:12:18 +1100
commit95486bbde05ae51975c4d51fd194111788edee9a (patch)
treeb189a1f114b148d68b2b94cb6fd1eaca25f67350
parent93fee5cf222ad6d97e0dcb85e13a8d8b84dba81f (diff)
Some info on NV40's RAMFC
-rw-r--r--shared-core/nouveau_reg.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h
index ac7c932b..c74feeb3 100644
--- a/shared-core/nouveau_reg.h
+++ b/shared-core/nouveau_reg.h
@@ -178,4 +178,26 @@
#define NV03_FIFO_CMD_JUMP_OFFSET_MASK 0x1ffffffc
#define NV03_FIFO_CMD_REWIND (NV03_FIFO_CMD_JUMP | (0 & NV03_FIFO_CMD_JUMP_OFFSET_MASK))
+/* RAMFC offsets */
+#define NV40_RAMFC_DMA_PUT 0x00
+#define NV40_RAMFC_DMA_GET 0x04
+#define NV40_RAMFC_REF_CNT 0x08
+#define NV40_RAMFC_DMA_INSTANCE 0x0C
+#define NV40_RAMFC_DMA_DCOUNT /* ? */ 0x10
+#define NV40_RAMFC_DMA_STATE 0x14
+#define NV40_RAMFC_DMA_FETCH 0x18
+#define NV40_RAMFC_ENGINE 0x1C
+#define NV40_RAMFC_PULL1_ENGINE 0x20
+#define NV40_RAMFC_ACQUIRE_VALUE 0x24
+#define NV40_RAMFC_ACQUIRE_TIMESTAMP 0x28
+#define NV40_RAMFC_ACQUIRE_TIMEOUT 0x2C
+#define NV40_RAMFC_SEMAPHORE 0x30
+#define NV40_RAMFC_DMA_SUBROUTINE 0x34
+#define NV40_RAMFC_GRCTX_INSTANCE_32E0 /* guess */ 0x38
+#define NV40_RAMFC_DMA_TIMESLICE 0x3C
+#define NV40_RAMFC_UNK_40 0x40
+#define NV40_RAMFC_UNK_44 0x44
+#define NV40_RAMFC_UNK_48 0x48
+#define NV40_RAMFC_2088 0x4C
+#define NV40_RAMFC_3300 0x50