From b2b1885dfcb3a206623e926704057b448d06781d Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Wed, 10 Jul 2013 15:20:04 -0400 Subject: freedreno: support either kgsl or msm Split out common code and backend. Current backend is for 'kgsl' android driver, but a new backend will provide support for the upstream msm drm/kms driver. Signed-off-by: Rob Clark --- freedreno/Makefile.am | 11 +- freedreno/freedreno_bo.c | 213 ++-------------- freedreno/freedreno_device.c | 45 ++-- freedreno/freedreno_drmif.h | 7 +- freedreno/freedreno_pipe.c | 188 +------------- freedreno/freedreno_priv.h | 85 ++++--- freedreno/freedreno_ringbuffer.c | 170 ++----------- freedreno/freedreno_ringbuffer.h | 32 ++- freedreno/kgsl/kgsl_bo.c | 291 ++++++++++++++++++++++ freedreno/kgsl/kgsl_device.c | 61 +++++ freedreno/kgsl/kgsl_drm.h | 192 +++++++++++++++ freedreno/kgsl/kgsl_pipe.c | 264 ++++++++++++++++++++ freedreno/kgsl/kgsl_priv.h | 115 +++++++++ freedreno/kgsl/kgsl_ringbuffer.c | 224 +++++++++++++++++ freedreno/kgsl/msm_kgsl.h | 519 +++++++++++++++++++++++++++++++++++++++ freedreno/kgsl_drm.h | 192 --------------- freedreno/msm_kgsl.h | 519 --------------------------------------- 17 files changed, 1814 insertions(+), 1314 deletions(-) create mode 100644 freedreno/kgsl/kgsl_bo.c create mode 100644 freedreno/kgsl/kgsl_device.c create mode 100644 freedreno/kgsl/kgsl_drm.h create mode 100644 freedreno/kgsl/kgsl_pipe.c create mode 100644 freedreno/kgsl/kgsl_priv.h create mode 100644 freedreno/kgsl/kgsl_ringbuffer.c create mode 100644 freedreno/kgsl/msm_kgsl.h delete mode 100644 freedreno/kgsl_drm.h delete mode 100644 freedreno/msm_kgsl.h (limited to 'freedreno') diff --git a/freedreno/Makefile.am b/freedreno/Makefile.am index ba9bd68b..45074c9b 100644 --- a/freedreno/Makefile.am +++ b/freedreno/Makefile.am @@ -16,9 +16,14 @@ libdrm_freedreno_la_SOURCES = \ freedreno_priv.h \ freedreno_ringbuffer.c \ freedreno_bo.c \ - kgsl_drm.h \ - list.h \ - msm_kgsl.h + kgsl/kgsl_bo.c \ + kgsl/kgsl_device.c \ + kgsl/kgsl_drm.h \ + kgsl/kgsl_pipe.c \ + kgsl/kgsl_priv.h \ + kgsl/kgsl_ringbuffer.c \ + kgsl/msm_kgsl.h \ + list.h libdrm_freedrenocommonincludedir = ${includedir}/freedreno libdrm_freedrenocommoninclude_HEADERS = freedreno_drmif.h freedreno_ringbuffer.h diff --git a/freedreno/freedreno_bo.c b/freedreno/freedreno_bo.c index 8f78432b..92c7dd79 100644 --- a/freedreno/freedreno_bo.c +++ b/freedreno/freedreno_bo.c @@ -29,8 +29,6 @@ #include "freedreno_drmif.h" #include "freedreno_priv.h" -#include - static pthread_mutex_t table_lock = PTHREAD_MUTEX_INITIALIZER; /* set buffer name, and add to table, call w/ table_lock held: */ @@ -56,8 +54,9 @@ static struct fd_bo * lookup_bo(void *tbl, uint32_t key) static struct fd_bo * bo_from_handle(struct fd_device *dev, uint32_t size, uint32_t handle) { - unsigned i; - struct fd_bo *bo = calloc(1, sizeof(*bo)); + struct fd_bo *bo; + + bo = dev->funcs->bo_from_handle(dev, size, handle); if (!bo) { struct drm_gem_close req = { .handle = handle, @@ -71,127 +70,37 @@ static struct fd_bo * bo_from_handle(struct fd_device *dev, atomic_set(&bo->refcnt, 1); /* add ourself into the handle table: */ drmHashInsert(dev->handle_table, handle, bo); - for (i = 0; i < ARRAY_SIZE(bo->list); i++) - list_inithead(&bo->list[i]); return bo; } -static int set_memtype(struct fd_bo *bo, uint32_t flags) -{ - struct drm_kgsl_gem_memtype req = { - .handle = bo->handle, - .type = flags & DRM_FREEDRENO_GEM_TYPE_MEM_MASK, - }; - - return drmCommandWrite(bo->dev->fd, DRM_KGSL_GEM_SETMEMTYPE, - &req, sizeof(req)); -} - -static int bo_alloc(struct fd_bo *bo) -{ - if (!bo->offset) { - struct drm_kgsl_gem_alloc req = { - .handle = bo->handle, - }; - int ret; - - /* if the buffer is already backed by pages then this - * doesn't actually do anything (other than giving us - * the offset) - */ - ret = drmCommandWriteRead(bo->dev->fd, DRM_KGSL_GEM_ALLOC, - &req, sizeof(req)); - if (ret) { - ERROR_MSG("alloc failed: %s", strerror(errno)); - return ret; - } - - bo->offset = req.offset; - } - return 0; -} - struct fd_bo * fd_bo_new(struct fd_device *dev, uint32_t size, uint32_t flags) { - struct drm_kgsl_gem_create req = { - .size = ALIGN(size, 4096), - }; struct fd_bo *bo = NULL; + uint32_t handle; + int ret; - if (drmCommandWriteRead(dev->fd, DRM_KGSL_GEM_CREATE, - &req, sizeof(req))) { + ret = dev->funcs->bo_new_handle(dev, ALIGN(size, 4096), flags, &handle); + if (ret) return NULL; - } pthread_mutex_lock(&table_lock); - bo = bo_from_handle(dev, size, req.handle); + bo = bo_from_handle(dev, size, handle); pthread_mutex_unlock(&table_lock); - if (!bo) { - goto fail; - } - - if (set_memtype(bo, flags)) { - goto fail; - } return bo; -fail: - if (bo) - fd_bo_del(bo); - return NULL; } -/* don't use this... it is just needed to get a bo from the - * framebuffer (pre-dmabuf) - */ -struct fd_bo * fd_bo_from_fbdev(struct fd_pipe *pipe, - int fbfd, uint32_t size) +struct fd_bo *fd_bo_from_handle(struct fd_device *dev, + uint32_t handle, uint32_t size) { - struct drm_kgsl_gem_create_fd req = { - .fd = fbfd, - }; - struct fd_bo *bo; - - if (drmCommandWriteRead(pipe->dev->fd, DRM_KGSL_GEM_CREATE_FD, - &req, sizeof(req))) { - return NULL; - } + struct fd_bo *bo = NULL; pthread_mutex_lock(&table_lock); - bo = bo_from_handle(pipe->dev, size, req.handle); - - /* this is fugly, but works around a bug in the kernel.. - * priv->memdesc.size never gets set, so getbufinfo ioctl - * thinks the buffer hasn't be allocate and fails - */ - if (bo && !fd_bo_gpuaddr(bo, 0)) { - void *fbmem = mmap(NULL, size, PROT_READ | PROT_WRITE, - MAP_SHARED, fbfd, 0); - struct kgsl_map_user_mem req = { - .memtype = KGSL_USER_MEM_TYPE_ADDR, - .len = size, - .offset = 0, - .hostptr = (unsigned long)fbmem, - }; - int ret; - ret = ioctl(pipe->fd, IOCTL_KGSL_MAP_USER_MEM, &req); - if (ret) { - ERROR_MSG("mapping user mem failed: %s", - strerror(errno)); - goto fail; - } - bo->gpuaddr = req.gpuaddr; - bo->map = fbmem; - } + bo = bo_from_handle(dev, size, handle); pthread_mutex_unlock(&table_lock); return bo; -fail: - pthread_mutex_unlock(&table_lock); - if (bo) - fd_bo_del(bo); - return NULL; } struct fd_bo * fd_bo_from_name(struct fd_device *dev, uint32_t name) @@ -235,6 +144,8 @@ struct fd_bo * fd_bo_ref(struct fd_bo *bo) void fd_bo_del(struct fd_bo *bo) { + struct fd_device *dev; + if (!atomic_dec_and_test(&bo->refcnt)) return; @@ -253,8 +164,10 @@ void fd_bo_del(struct fd_bo *bo) pthread_mutex_unlock(&table_lock); } - fd_device_del(bo->dev); - free(bo); + dev = bo->dev; + bo->funcs->destroy(bo); + + fd_device_del(dev); } int fd_bo_get_name(struct fd_bo *bo, uint32_t *name) @@ -293,15 +206,16 @@ uint32_t fd_bo_size(struct fd_bo *bo) void * fd_bo_map(struct fd_bo *bo) { if (!bo->map) { + uint64_t offset; int ret; - ret = bo_alloc(bo); + ret = bo->funcs->offset(bo, &offset); if (ret) { return NULL; } bo->map = mmap(0, bo->size, PROT_READ | PROT_WRITE, MAP_SHARED, - bo->dev->fd, bo->offset); + bo->dev->fd, offset); if (bo->map == MAP_FAILED) { ERROR_MSG("mmap failed: %s", strerror(errno)); bo->map = NULL; @@ -310,88 +224,13 @@ void * fd_bo_map(struct fd_bo *bo) return bo->map; } -uint32_t fd_bo_gpuaddr(struct fd_bo *bo, uint32_t offset) +/* a bit odd to take the pipe as an arg, but it's a, umm, quirk of kgsl.. */ +int fd_bo_cpu_prep(struct fd_bo *bo, struct fd_pipe *pipe, uint32_t op) { - if (!bo->gpuaddr) { - struct drm_kgsl_gem_bufinfo req = { - .handle = bo->handle, - }; - int ret; - - ret = bo_alloc(bo); - if (ret) { - return ret; - } - - ret = drmCommandWriteRead(bo->dev->fd, DRM_KGSL_GEM_GET_BUFINFO, - &req, sizeof(req)); - if (ret) { - ERROR_MSG("get bufinfo failed: %s", strerror(errno)); - return 0; - } - - bo->gpuaddr = req.gpuaddr[0]; - } - return bo->gpuaddr + offset; + return bo->funcs->cpu_prep(bo, pipe, op); } -/* - * Super-cheezy way to synchronization between mesa and ddx.. the - * SET_ACTIVE ioctl gives us a way to stash a 32b # w/ a GEM bo, and - * GET_BUFINFO gives us a way to retrieve it. We use this to stash - * the timestamp of the last ISSUEIBCMDS on the buffer. - * - * To avoid an obscene amount of syscalls, we: - * 1) Only set the timestamp for buffers w/ an flink name, ie. - * only buffers shared across processes. This is enough to - * catch the DRI2 buffers. - * 2) Only set the timestamp for buffers submitted to the 3d ring - * and only check the timestamps on buffers submitted to the - * 2d ring. This should be enough to handle synchronizing of - * presentation blit. We could do synchronization in the other - * direction too, but that would be problematic if we are using - * the 3d ring from DDX, since client side wouldn't know this. - * - * The waiting on timestamp happens before flush, and setting of - * timestamp happens after flush. It is transparent to the user - * of libdrm_freedreno as all the tracking of buffers happens via - * _emit_reloc().. - */ - -void fb_bo_set_timestamp(struct fd_bo *bo, uint32_t timestamp) +void fd_bo_cpu_fini(struct fd_bo *bo) { - if (bo->name) { - struct drm_kgsl_gem_active req = { - .handle = bo->handle, - .active = timestamp, - }; - int ret; - - ret = drmCommandWrite(bo->dev->fd, DRM_KGSL_GEM_SET_ACTIVE, - &req, sizeof(req)); - if (ret) { - ERROR_MSG("set active failed: %s", strerror(errno)); - } - } -} - -uint32_t fd_bo_get_timestamp(struct fd_bo *bo) -{ - uint32_t timestamp = 0; - if (bo->name) { - struct drm_kgsl_gem_bufinfo req = { - .handle = bo->handle, - }; - int ret; - - ret = drmCommandWriteRead(bo->dev->fd, DRM_KGSL_GEM_GET_BUFINFO, - &req, sizeof(req)); - if (ret) { - ERROR_MSG("get bufinfo failed: %s", strerror(errno)); - return 0; - } - - timestamp = req.active; - } - return timestamp; + bo->funcs->cpu_fini(bo); } diff --git a/freedreno/freedreno_device.c b/freedreno/freedreno_device.c index 901d0667..03553b9f 100644 --- a/freedreno/freedreno_device.c +++ b/freedreno/freedreno_device.c @@ -36,35 +36,43 @@ static pthread_mutex_t table_lock = PTHREAD_MUTEX_INITIALIZER; static void * dev_table; +struct fd_device * kgsl_device_new(int fd); + static struct fd_device * fd_device_new_impl(int fd) { - struct fd_device *dev = calloc(1, sizeof(*dev)); + struct fd_device *dev; + drmVersionPtr version; + + /* figure out if we are kgsl or msm drm driver: */ + version = drmGetVersion(fd); + if (!version) { + ERROR_MSG("cannot get version: %s", strerror(errno)); + return NULL; + } + + if (!strcmp(version->name, "kgsl")) { + DEBUG_MSG("kgsl DRM device"); + dev = kgsl_device_new(fd); + } else { + ERROR_MSG("unknown device: %s", version->name); + dev = NULL; + } + if (!dev) return NULL; + atomic_set(&dev->refcnt, 1); dev->fd = fd; dev->handle_table = drmHashCreate(); dev->name_table = drmHashCreate(); - return dev; -} -/* use inode for key into dev_table, rather than fd, to avoid getting - * confused by multiple-opens: - */ -static int devkey(int fd) -{ - struct stat s; - if (fstat(fd, &s)) { - ERROR_MSG("stat failed: %s", strerror(errno)); - return -1; - } - return s.st_ino; + return dev; } struct fd_device * fd_device_new(int fd) { struct fd_device *dev = NULL; - int key = devkey(fd); + int key = fd; pthread_mutex_lock(&table_lock); @@ -73,7 +81,8 @@ struct fd_device * fd_device_new(int fd) if (drmHashLookup(dev_table, key, (void **)&dev)) { dev = fd_device_new_impl(fd); - drmHashInsert(dev_table, key, dev); + if (dev) + drmHashInsert(dev_table, key, dev); } else { dev = fd_device_ref(dev); } @@ -96,7 +105,7 @@ void fd_device_del(struct fd_device *dev) pthread_mutex_lock(&table_lock); drmHashDestroy(dev->handle_table); drmHashDestroy(dev->name_table); - drmHashDelete(dev_table, devkey(dev->fd)); + drmHashDelete(dev_table, dev->fd); pthread_mutex_unlock(&table_lock); - free(dev); + dev->funcs->destroy(dev); } diff --git a/freedreno/freedreno_drmif.h b/freedreno/freedreno_drmif.h index 54b900e7..2086cf1e 100644 --- a/freedreno/freedreno_drmif.h +++ b/freedreno/freedreno_drmif.h @@ -63,6 +63,10 @@ enum fd_param_id { #define DRM_FREEDRENO_GEM_CACHE_MASK 0x00f00000 #define DRM_FREEDRENO_GEM_GPUREADONLY 0x01000000 +/* bo access flags: */ +#define DRM_FREEDRENO_PREP_READ 0x01 +#define DRM_FREEDRENO_PREP_WRITE 0x02 + /* device functions: */ @@ -80,7 +84,6 @@ void fd_pipe_del(struct fd_pipe *pipe); int fd_pipe_get_param(struct fd_pipe *pipe, enum fd_param_id param, uint64_t *value); int fd_pipe_wait(struct fd_pipe *pipe, uint32_t timestamp); -int fd_pipe_timestamp(struct fd_pipe *pipe, uint32_t *timestamp); /* buffer-object functions: @@ -97,5 +100,7 @@ int fd_bo_get_name(struct fd_bo *bo, uint32_t *name); uint32_t fd_bo_handle(struct fd_bo *bo); uint32_t fd_bo_size(struct fd_bo *bo); void * fd_bo_map(struct fd_bo *bo); +int fd_bo_cpu_prep(struct fd_bo *bo, struct fd_pipe *pipe, uint32_t op); +void fd_bo_cpu_fini(struct fd_bo *bo); #endif /* FREEDRENO_DRMIF_H_ */ diff --git a/freedreno/freedreno_pipe.c b/freedreno/freedreno_pipe.c index 9f9f1c6e..805bf008 100644 --- a/freedreno/freedreno_pipe.c +++ b/freedreno/freedreno_pipe.c @@ -29,57 +29,16 @@ #include "freedreno_drmif.h" #include "freedreno_priv.h" - -static int getprop(int fd, enum kgsl_property_type type, - void *value, int sizebytes) -{ - struct kgsl_device_getproperty req = { - .type = type, - .value = value, - .sizebytes = sizebytes, - }; - return ioctl(fd, IOCTL_KGSL_DEVICE_GETPROPERTY, &req); -} - -#define GETPROP(fd, prop, x) do { \ - if (getprop((fd), KGSL_PROP_##prop, &(x), sizeof(x))) { \ - ERROR_MSG("failed to get property: " #prop); \ - goto fail; \ - } } while (0) - - struct fd_pipe * fd_pipe_new(struct fd_device *dev, enum fd_pipe_id id) { - static const char *paths[] = { - [FD_PIPE_3D] = "/dev/kgsl-3d0", - [FD_PIPE_2D] = "/dev/kgsl-2d0", - }; - struct kgsl_drawctxt_create req = { - .flags = 0x2000, /* ??? */ - }; struct fd_pipe *pipe = NULL; - int ret, fd; if (id > FD_PIPE_MAX) { ERROR_MSG("invalid pipe id: %d", id); goto fail; } - fd = open(paths[id], O_RDWR); - if (fd < 0) { - ERROR_MSG("could not open %s device: %d (%s)", - paths[id], fd, strerror(errno)); - goto fail; - } - - ret = ioctl(fd, IOCTL_KGSL_DRAWCTXT_CREATE, &req); - if (ret) { - ERROR_MSG("failed to allocate context: %d (%s)", - ret, strerror(errno)); - goto fail; - } - - pipe = calloc(1, sizeof(*pipe)); + pipe = dev->funcs->pipe_new(dev, id); if (!pipe) { ERROR_MSG("allocation failed"); goto fail; @@ -87,31 +46,6 @@ struct fd_pipe * fd_pipe_new(struct fd_device *dev, enum fd_pipe_id id) pipe->dev = dev; pipe->id = id; - pipe->fd = fd; - pipe->drawctxt_id = req.drawctxt_id; - - list_inithead(&pipe->submit_list); - list_inithead(&pipe->pending_list); - - GETPROP(fd, VERSION, pipe->version); - GETPROP(fd, DEVICE_INFO, pipe->devinfo); - - INFO_MSG("Pipe Info:"); - INFO_MSG(" Device: %s", paths[id]); - INFO_MSG(" Chip-id: %d.%d.%d.%d", - (pipe->devinfo.chip_id >> 24) & 0xff, - (pipe->devinfo.chip_id >> 16) & 0xff, - (pipe->devinfo.chip_id >> 8) & 0xff, - (pipe->devinfo.chip_id >> 0) & 0xff); - INFO_MSG(" Device-id: %d", pipe->devinfo.device_id); - INFO_MSG(" GPU-id: %d", pipe->devinfo.gpu_id); - INFO_MSG(" MMU enabled: %d", pipe->devinfo.mmu_enabled); - INFO_MSG(" GMEM Base addr: 0x%08x", pipe->devinfo.gmem_gpubaseaddr); - INFO_MSG(" GMEM size: 0x%08x", pipe->devinfo.gmem_sizebytes); - INFO_MSG(" Driver version: %d.%d", - pipe->version.drv_major, pipe->version.drv_minor); - INFO_MSG(" Device version: %d.%d", - pipe->version.dev_major, pipe->version.dev_minor); return pipe; fail: @@ -122,130 +56,16 @@ fail: void fd_pipe_del(struct fd_pipe *pipe) { - struct kgsl_drawctxt_destroy req = { - .drawctxt_id = pipe->drawctxt_id, - }; - - if (pipe->drawctxt_id) - ioctl(pipe->fd, IOCTL_KGSL_DRAWCTXT_DESTROY, &req); - - if (pipe->fd) - close(pipe->fd); - - free(pipe); + pipe->funcs->destroy(pipe); } int fd_pipe_get_param(struct fd_pipe *pipe, enum fd_param_id param, uint64_t *value) { - switch (param) { - case FD_DEVICE_ID: - *value = pipe->devinfo.device_id; - return 0; - case FD_GPU_ID: - *value = pipe->devinfo.gpu_id; - return 0; - case FD_GMEM_SIZE: - *value = pipe->devinfo.gmem_sizebytes; - return 0; - default: - ERROR_MSG("invalid param id: %d", param); - return -1; - } + return pipe->funcs->get_param(pipe, param, value); } int fd_pipe_wait(struct fd_pipe *pipe, uint32_t timestamp) { - struct kgsl_device_waittimestamp req = { - .timestamp = timestamp, - .timeout = 5000, - }; - int ret; - - do { - ret = ioctl(pipe->fd, IOCTL_KGSL_DEVICE_WAITTIMESTAMP, &req); - } while ((ret == -1) && ((errno == EINTR) || (errno == EAGAIN))); - if (ret) - ERROR_MSG("waittimestamp failed! %d (%s)", ret, strerror(errno)); - else - fd_pipe_process_pending(pipe, timestamp); - return ret; -} - -int fd_pipe_timestamp(struct fd_pipe *pipe, uint32_t *timestamp) -{ - struct kgsl_cmdstream_readtimestamp req = { - .type = KGSL_TIMESTAMP_RETIRED - }; - int ret = ioctl(pipe->fd, IOCTL_KGSL_CMDSTREAM_READTIMESTAMP, &req); - if (ret) { - ERROR_MSG("readtimestamp failed! %d (%s)", - ret, strerror(errno)); - return ret; - } - *timestamp = req.timestamp; - return 0; -} - -/* add buffer to submit list when it is referenced in cmdstream: */ -void fd_pipe_add_submit(struct fd_pipe *pipe, struct fd_bo *bo) -{ - struct list_head *list = &bo->list[pipe->id]; - if (LIST_IS_EMPTY(list)) { - fd_bo_ref(bo); - } else { - list_del(list); - } - list_addtail(list, &pipe->submit_list); -} - -/* prepare buffers on submit list before flush: */ -void fd_pipe_pre_submit(struct fd_pipe *pipe) -{ - struct fd_bo *bo; - - if (pipe->id == FD_PIPE_3D) - return; - - if (!pipe->p3d) - pipe->p3d = fd_pipe_new(pipe->dev, FD_PIPE_3D); - - LIST_FOR_EACH_ENTRY(bo, &pipe->submit_list, list[pipe->id]) { - uint32_t timestamp = fd_bo_get_timestamp(bo); - if (timestamp) - fd_pipe_wait(pipe->p3d, timestamp); - } -} - -/* process buffers on submit list after flush: */ -void fd_pipe_post_submit(struct fd_pipe *pipe, uint32_t timestamp) -{ - struct fd_bo *bo, *tmp; - - LIST_FOR_EACH_ENTRY_SAFE(bo, tmp, &pipe->submit_list, list[pipe->id]) { - struct list_head *list = &bo->list[pipe->id]; - list_del(list); - bo->timestamp[pipe->id] = timestamp; - list_addtail(list, &pipe->pending_list); - - if (pipe->id == FD_PIPE_3D) - fb_bo_set_timestamp(bo, timestamp); - } - - if (!fd_pipe_timestamp(pipe, ×tamp)) - fd_pipe_process_pending(pipe, timestamp); -} - -void fd_pipe_process_pending(struct fd_pipe *pipe, uint32_t timestamp) -{ - struct fd_bo *bo, *tmp; - - LIST_FOR_EACH_ENTRY_SAFE(bo, tmp, &pipe->pending_list, list[pipe->id]) { - struct list_head *list = &bo->list[pipe->id]; - if (bo->timestamp[pipe->id] > timestamp) - return; - list_delinit(list); - bo->timestamp[pipe->id] = 0; - fd_bo_del(bo); - } + return pipe->funcs->wait(pipe, timestamp); } diff --git a/freedreno/freedreno_priv.h b/freedreno/freedreno_priv.h index 433bd300..cbf41d71 100644 --- a/freedreno/freedreno_priv.h +++ b/freedreno/freedreno_priv.h @@ -38,6 +38,8 @@ #include #include #include +#include +#include #include "xf86drm.h" #include "xf86atomic.h" @@ -45,8 +47,17 @@ #include "list.h" #include "freedreno_drmif.h" -#include "msm_kgsl.h" -#include "kgsl_drm.h" +#include "freedreno_ringbuffer.h" +#include "drm/drm.h" + +struct fd_device_funcs { + int (*bo_new_handle)(struct fd_device *dev, uint32_t size, + uint32_t flags, uint32_t *handle); + struct fd_bo * (*bo_from_handle)(struct fd_device *dev, + uint32_t size, uint32_t handle); + struct fd_pipe * (*pipe_new)(struct fd_device *dev, enum fd_pipe_id id); + void (*destroy)(struct fd_device *dev); +}; struct fd_device { int fd; @@ -62,60 +73,57 @@ struct fd_device { * open in the process first, before calling gem-open. */ void *handle_table, *name_table; + + struct fd_device_funcs *funcs; +}; + +struct fd_pipe_funcs { + struct fd_ringbuffer * (*ringbuffer_new)(struct fd_pipe *pipe, uint32_t size); + int (*get_param)(struct fd_pipe *pipe, enum fd_param_id param, uint64_t *value); + int (*wait)(struct fd_pipe *pipe, uint32_t timestamp); + void (*destroy)(struct fd_pipe *pipe); }; struct fd_pipe { struct fd_device *dev; enum fd_pipe_id id; - int fd; - uint32_t drawctxt_id; - - /* device properties: */ - struct kgsl_version version; - struct kgsl_devinfo devinfo; - - /* list of bo's that are referenced in ringbuffer but not - * submitted yet: - */ - struct list_head submit_list; + struct fd_pipe_funcs *funcs; +}; - /* list of bo's that have been submitted but timestamp has - * not passed yet (so still ref'd in active cmdstream) - */ - struct list_head pending_list; +struct fd_ringmarker { + struct fd_ringbuffer *ring; + uint32_t *cur; +}; - /* if we are the 2d pipe, and want to wait on a timestamp - * from 3d, we need to also internally open the 3d pipe: - */ - struct fd_pipe *p3d; +struct fd_ringbuffer_funcs { + void * (*hostptr)(struct fd_ringbuffer *ring); + int (*flush)(struct fd_ringbuffer *ring, uint32_t *last_start); + void (*emit_reloc)(struct fd_ringbuffer *ring, + const struct fd_reloc *reloc); + void (*emit_reloc_ring)(struct fd_ringbuffer *ring, + struct fd_ringmarker *target, struct fd_ringmarker *end); + void (*destroy)(struct fd_ringbuffer *ring); }; -void fd_pipe_add_submit(struct fd_pipe *pipe, struct fd_bo *bo); -void fd_pipe_pre_submit(struct fd_pipe *pipe); -void fd_pipe_post_submit(struct fd_pipe *pipe, uint32_t timestamp); -void fd_pipe_process_pending(struct fd_pipe *pipe, uint32_t timestamp); +struct fd_bo_funcs { + int (*offset)(struct fd_bo *bo, uint64_t *offset); + int (*cpu_prep)(struct fd_bo *bo, struct fd_pipe *pipe, uint32_t op); + void (*cpu_fini)(struct fd_bo *bo); + void (*destroy)(struct fd_bo *bo); +}; struct fd_bo { struct fd_device *dev; uint32_t size; uint32_t handle; uint32_t name; - uint32_t gpuaddr; void *map; - uint64_t offset; - /* timestamp (per pipe) for bo's in a pipe's pending_list: */ - uint32_t timestamp[FD_PIPE_MAX]; - /* list-node for pipe's submit_list or pending_list */ - struct list_head list[FD_PIPE_MAX]; atomic_t refcnt; + struct fd_bo_funcs *funcs; }; -/* not exposed publicly, because won't be needed when we have - * a proper kernel driver - */ -uint32_t fd_bo_gpuaddr(struct fd_bo *bo, uint32_t offset); -void fb_bo_set_timestamp(struct fd_bo *bo, uint32_t timestamp); -uint32_t fd_bo_get_timestamp(struct fd_bo *bo); +struct fd_bo *fd_bo_from_handle(struct fd_device *dev, + uint32_t handle, uint32_t size); #define ALIGN(v,a) (((v) + (a) - 1) & ~((a) - 1)) #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) @@ -135,4 +143,7 @@ uint32_t fd_bo_get_timestamp(struct fd_bo *bo); do { drmMsg("[E] " fmt " (%s:%d)\n", \ ##__VA_ARGS__, __FUNCTION__, __LINE__); } while (0) +#define U642VOID(x) ((void *)(unsigned long)(x)) +#define VOID2U64(x) ((uint64_t)(unsigned long)(x)) + #endif /* FREEDRENO_PRIV_H_ */ diff --git a/freedreno/freedreno_ringbuffer.c b/freedreno/freedreno_ringbuffer.c index 2a9f4367..de666865 100644 --- a/freedreno/freedreno_ringbuffer.c +++ b/freedreno/freedreno_ringbuffer.c @@ -32,109 +32,28 @@ #include "freedreno_priv.h" #include "freedreno_ringbuffer.h" - -/* because kgsl tries to validate the gpuaddr on kernel side in ISSUEIBCMDS, - * we can't use normal gem bo's for ringbuffer.. someday the kernel part - * needs to be reworked into a single sane drm driver :-/ - */ -struct fd_rb_bo { - struct fd_pipe *pipe; - void *hostptr; - uint32_t gpuaddr; - uint32_t size; -}; - -struct fd_ringmarker { - struct fd_ringbuffer *ring; - uint32_t *cur; -}; - -static void fd_rb_bo_del(struct fd_rb_bo *bo) -{ - struct kgsl_sharedmem_free req = { - .gpuaddr = bo->gpuaddr, - }; - int ret; - - munmap(bo->hostptr, bo->size); - - ret = ioctl(bo->pipe->fd, IOCTL_KGSL_SHAREDMEM_FREE, &req); - if (ret) { - ERROR_MSG("sharedmem free failed: %s", strerror(errno)); - } - - free(bo); -} - -static struct fd_rb_bo * fd_rb_bo_new(struct fd_pipe *pipe, uint32_t size) -{ - struct fd_rb_bo *bo; - struct kgsl_gpumem_alloc req = { - .size = ALIGN(size, 4096), - .flags = KGSL_MEMFLAGS_GPUREADONLY, - }; - int ret; - - bo = calloc(1, sizeof(*bo)); - if (!bo) { - ERROR_MSG("allocation failed"); - return NULL; - } - ret = ioctl(pipe->fd, IOCTL_KGSL_GPUMEM_ALLOC, &req); - if (ret) { - ERROR_MSG("gpumem allocation failed: %s", strerror(errno)); - goto fail; - } - - bo->pipe = pipe; - bo->gpuaddr = req.gpuaddr; - bo->size = size; - bo->hostptr = mmap(NULL, size, PROT_WRITE|PROT_READ, - MAP_SHARED, pipe->fd, req.gpuaddr); - - return bo; -fail: - if (bo) - fd_rb_bo_del(bo); - return NULL; -} - struct fd_ringbuffer * fd_ringbuffer_new(struct fd_pipe *pipe, uint32_t size) { - struct fd_ringbuffer *ring = NULL; - - ring = calloc(1, sizeof(*ring)); - if (!ring) { - ERROR_MSG("allocation failed"); - goto fail; - } + struct fd_ringbuffer *ring; - ring->bo = fd_rb_bo_new(pipe, size); - if (!ring->bo) { - ERROR_MSG("ringbuffer allocation failed"); - goto fail; - } + ring = pipe->funcs->ringbuffer_new(pipe, size); + if (!ring) + return NULL; ring->size = size; ring->pipe = pipe; - ring->start = ring->bo->hostptr; + ring->start = ring->funcs->hostptr(ring); ring->end = &(ring->start[size/4]); ring->cur = ring->last_start = ring->start; return ring; -fail: - if (ring) - fd_ringbuffer_del(ring); - return NULL; } void fd_ringbuffer_del(struct fd_ringbuffer *ring) { - if (ring->bo) - fd_rb_bo_del(ring->bo); - free(ring); + ring->funcs->destroy(ring); } void fd_ringbuffer_reset(struct fd_ringbuffer *ring) @@ -145,54 +64,10 @@ void fd_ringbuffer_reset(struct fd_ringbuffer *ring) ring->cur = ring->last_start = start; } -static int flush_impl(struct fd_ringbuffer *ring, uint32_t *last_start) -{ - uint32_t offset = (uint8_t *)last_start - (uint8_t *)ring->start; - struct kgsl_ibdesc ibdesc = { - .gpuaddr = ring->bo->gpuaddr + offset, - .hostptr = last_start, - .sizedwords = ring->cur - last_start, - }; - struct kgsl_ringbuffer_issueibcmds req = { - .drawctxt_id = ring->pipe->drawctxt_id, - .ibdesc_addr = (unsigned long)&ibdesc, - .numibs = 1, - .flags = KGSL_CONTEXT_SUBMIT_IB_LIST, - }; - int ret; - - fd_pipe_pre_submit(ring->pipe); - - /* z180_cmdstream_issueibcmds() is made of fail: */ - if (ring->pipe->id == FD_PIPE_2D) { - /* fix up size field in last cmd packet */ - uint32_t last_size = (uint32_t)(ring->cur - last_start); - /* 5 is length of first packet, 2 for the two 7f000000's */ - last_start[2] = last_size - (5 + 2); - ibdesc.gpuaddr = ring->bo->gpuaddr; - ibdesc.hostptr = ring->bo->hostptr; - ibdesc.sizedwords = 0x145; - req.timestamp = (uint32_t)ring->bo->hostptr; - } - - do { - ret = ioctl(ring->pipe->fd, IOCTL_KGSL_RINGBUFFER_ISSUEIBCMDS, &req); - } while ((ret == -1) && ((errno == EINTR) || (errno == EAGAIN))); - if (ret) - ERROR_MSG("issueibcmds failed! %d (%s)", ret, strerror(errno)); - - ring->last_timestamp = req.timestamp; - ring->last_start = ring->cur; - - fd_pipe_post_submit(ring->pipe, req.timestamp); - - return ret; -} - /* maybe get rid of this and use fd_ringmarker_flush() from DDX too? */ int fd_ringbuffer_flush(struct fd_ringbuffer *ring) { - return flush_impl(ring, ring->last_start); + return ring->funcs->flush(ring, ring->last_start); } uint32_t fd_ringbuffer_timestamp(struct fd_ringbuffer *ring) @@ -200,33 +75,17 @@ uint32_t fd_ringbuffer_timestamp(struct fd_ringbuffer *ring) return ring->last_timestamp; } -void fd_ringbuffer_emit_reloc(struct fd_ringbuffer *ring, - struct fd_bo *bo, uint32_t offset, uint32_t or) -{ - uint32_t addr = fd_bo_gpuaddr(bo, offset); - assert(addr); - (*ring->cur++) = addr | or; - fd_pipe_add_submit(ring->pipe, bo); -} - -void fd_ringbuffer_emit_reloc_shift(struct fd_ringbuffer *ring, - struct fd_bo *bo, uint32_t offset, uint32_t or, int32_t shift) +void fd_ringbuffer_reloc(struct fd_ringbuffer *ring, + const struct fd_reloc *reloc) { - uint32_t addr = fd_bo_gpuaddr(bo, offset); - assert(addr); - if (shift < 0) - addr >>= -shift; - else - addr <<= shift; - (*ring->cur++) = addr | or; - fd_pipe_add_submit(ring->pipe, bo); + ring->funcs->emit_reloc(ring, reloc); } void fd_ringbuffer_emit_reloc_ring(struct fd_ringbuffer *ring, - struct fd_ringmarker *target) + struct fd_ringmarker *target, struct fd_ringmarker *end) { - (*ring->cur++) = target->ring->bo->gpuaddr + - (uint8_t *)target->cur - (uint8_t *)target->ring->start; + assert(target->ring == end->ring); + ring->funcs->emit_reloc_ring(ring, target, end); } struct fd_ringmarker * fd_ringmarker_new(struct fd_ringbuffer *ring) @@ -264,5 +123,6 @@ uint32_t fd_ringmarker_dwords(struct fd_ringmarker *start, int fd_ringmarker_flush(struct fd_ringmarker *marker) { - return flush_impl(marker->ring, marker->cur); + struct fd_ringbuffer *ring = marker->ring; + return ring->funcs->flush(ring, marker->cur); } diff --git a/freedreno/freedreno_ringbuffer.h b/freedreno/freedreno_ringbuffer.h index 051bbca9..4c99ea81 100644 --- a/freedreno/freedreno_ringbuffer.h +++ b/freedreno/freedreno_ringbuffer.h @@ -37,28 +37,17 @@ * have a kernel driver that can deal w/ reloc's.. */ -struct fd_rb_bo; +struct fd_ringbuffer_funcs; struct fd_ringmarker; struct fd_ringbuffer { int size; uint32_t *cur, *end, *start, *last_start; struct fd_pipe *pipe; - struct fd_rb_bo *bo; + struct fd_ringbuffer_funcs *funcs; uint32_t last_timestamp; }; -/* ringbuffer flush flags: - * SAVE_GMEM - GMEM contents not preserved to system memory - * in cmds flushed so if there is a context switch after - * this flush and before the next one the kernel must - * save GMEM contents - * SUBMIT_IB_LIST - tbd.. - */ -#define DRM_FREEDRENO_CONTEXT_SAVE_GMEM 1 -#define DRM_FREEDRENO_CONTEXT_SUBMIT_IB_LIST 4 - - struct fd_ringbuffer * fd_ringbuffer_new(struct fd_pipe *pipe, uint32_t size); void fd_ringbuffer_del(struct fd_ringbuffer *ring); @@ -72,12 +61,19 @@ static inline void fd_ringbuffer_emit(struct fd_ringbuffer *ring, (*ring->cur++) = data; } -void fd_ringbuffer_emit_reloc(struct fd_ringbuffer *ring, - struct fd_bo *bo, uint32_t offset, uint32_t or); -void fd_ringbuffer_emit_reloc_shift(struct fd_ringbuffer *ring, - struct fd_bo *bo, uint32_t offset, uint32_t or, int32_t shift); +struct fd_reloc { + struct fd_bo *bo; +#define FD_RELOC_READ 0x0001 +#define FD_RELOC_WRITE 0x0002 + uint32_t flags; + uint32_t offset; + uint32_t or; + int32_t shift; +}; + +void fd_ringbuffer_reloc(struct fd_ringbuffer *ring, const struct fd_reloc *reloc); void fd_ringbuffer_emit_reloc_ring(struct fd_ringbuffer *ring, - struct fd_ringmarker *target); + struct fd_ringmarker *target, struct fd_ringmarker *end); struct fd_ringmarker * fd_ringmarker_new(struct fd_ringbuffer *ring); void fd_ringmarker_del(struct fd_ringmarker *marker); diff --git a/freedreno/kgsl/kgsl_bo.c b/freedreno/kgsl/kgsl_bo.c new file mode 100644 index 00000000..0d019cb1 --- /dev/null +++ b/freedreno/kgsl/kgsl_bo.c @@ -0,0 +1,291 @@ +/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */ + +/* + * Copyright (C) 2013 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#include "kgsl_priv.h" + +#include + +static int set_memtype(struct fd_device *dev, uint32_t handle, uint32_t flags) +{ + struct drm_kgsl_gem_memtype req = { + .handle = handle, + .type = flags & DRM_FREEDRENO_GEM_TYPE_MEM_MASK, + }; + + return drmCommandWrite(dev->fd, DRM_KGSL_GEM_SETMEMTYPE, + &req, sizeof(req)); +} + +static int bo_alloc(struct kgsl_bo *kgsl_bo) +{ + struct fd_bo *bo = &kgsl_bo->base; + if (!kgsl_bo->offset) { + struct drm_kgsl_gem_alloc req = { + .handle = bo->handle, + }; + int ret; + + /* if the buffer is already backed by pages then this + * doesn't actually do anything (other than giving us + * the offset) + */ + ret = drmCommandWriteRead(bo->dev->fd, DRM_KGSL_GEM_ALLOC, + &req, sizeof(req)); + if (ret) { + ERROR_MSG("alloc failed: %s", strerror(errno)); + return ret; + } + + kgsl_bo->offset = req.offset; + } + + return 0; +} + +static int kgsl_bo_offset(struct fd_bo *bo, uint64_t *offset) +{ + struct kgsl_bo *kgsl_bo = to_kgsl_bo(bo); + int ret = bo_alloc(kgsl_bo); + if (ret) + return ret; + *offset = kgsl_bo->offset; + return 0; +} + +static int kgsl_bo_cpu_prep(struct fd_bo *bo, struct fd_pipe *pipe, uint32_t op) +{ + uint32_t timestamp = kgsl_bo_get_timestamp(to_kgsl_bo(bo)); + if (timestamp) { + fd_pipe_wait(pipe, timestamp); + } + return 0; +} + +static void kgsl_bo_cpu_fini(struct fd_bo *bo) +{ +} + +static void kgsl_bo_destroy(struct fd_bo *bo) +{ + struct kgsl_bo *kgsl_bo = to_kgsl_bo(bo); + free(kgsl_bo); + +} + +static struct fd_bo_funcs funcs = { + .offset = kgsl_bo_offset, + .cpu_prep = kgsl_bo_cpu_prep, + .cpu_fini = kgsl_bo_cpu_fini, + .destroy = kgsl_bo_destroy, +}; + +/* allocate a buffer handle: */ +int kgsl_bo_new_handle(struct fd_device *dev, + uint32_t size, uint32_t flags, uint32_t *handle) +{ + struct drm_kgsl_gem_create req = { + .size = size, + }; + int ret; + + ret = drmCommandWriteRead(dev->fd, DRM_KGSL_GEM_CREATE, + &req, sizeof(req)); + if (ret) + return ret; + + // TODO make flags match msm driver, since kgsl is legacy.. + // translate flags in kgsl.. + + set_memtype(dev, req.handle, flags); + + *handle = req.handle; + + return 0; +} + +/* allocate a new buffer object */ +struct fd_bo * kgsl_bo_from_handle(struct fd_device *dev, + uint32_t size, uint32_t handle) +{ + struct kgsl_bo *kgsl_bo; + struct fd_bo *bo; + unsigned i; + + kgsl_bo = calloc(1, sizeof(*kgsl_bo)); + if (!kgsl_bo) + return NULL; + + bo = &kgsl_bo->base; + bo->funcs = &funcs; + + for (i = 0; i < ARRAY_SIZE(kgsl_bo->list); i++) + list_inithead(&kgsl_bo->list[i]); + + return bo; +} + +struct fd_bo * fd_bo_from_fbdev(struct fd_pipe *pipe, + int fbfd, uint32_t size) +{ + struct drm_kgsl_gem_create_fd req = { + .fd = fbfd, + }; + struct fd_bo *bo; + struct kgsl_bo *kgsl_bo; + + if (!is_kgsl_pipe(pipe)) + return NULL; + + if (drmCommandWriteRead(pipe->dev->fd, DRM_KGSL_GEM_CREATE_FD, + &req, sizeof(req))) { + return NULL; + } + + bo = fd_bo_from_handle(pipe->dev, req.handle, size); + kgsl_bo = to_kgsl_bo(bo); + + /* this is fugly, but works around a bug in the kernel.. + * priv->memdesc.size never gets set, so getbufinfo ioctl + * thinks the buffer hasn't be allocate and fails + */ + if (bo && !kgsl_bo_gpuaddr(kgsl_bo, 0)) { + void *fbmem = mmap(NULL, size, PROT_READ | PROT_WRITE, + MAP_SHARED, fbfd, 0); + struct kgsl_map_user_mem req = { + .memtype = KGSL_USER_MEM_TYPE_ADDR, + .len = size, + .offset = 0, + .hostptr = (unsigned long)fbmem, + }; + int ret; + ret = ioctl(to_kgsl_pipe(pipe)->fd, IOCTL_KGSL_MAP_USER_MEM, &req); + if (ret) { + ERROR_MSG("mapping user mem failed: %s", + strerror(errno)); + goto fail; + } + kgsl_bo->gpuaddr = req.gpuaddr; + bo->map = fbmem; + } + + return bo; +fail: + if (bo) + fd_bo_del(bo); + return NULL; +} + + +uint32_t kgsl_bo_gpuaddr(struct kgsl_bo *kgsl_bo, uint32_t offset) +{ + struct fd_bo *bo = &kgsl_bo->base; + if (!kgsl_bo->gpuaddr) { + struct drm_kgsl_gem_bufinfo req = { + .handle = bo->handle, + }; + int ret; + + ret = bo_alloc(kgsl_bo); + if (ret) { + return ret; + } + + ret = drmCommandWriteRead(bo->dev->fd, DRM_KGSL_GEM_GET_BUFINFO, + &req, sizeof(req)); + if (ret) { + ERROR_MSG("get bufinfo failed: %s", strerror(errno)); + return 0; + } + + kgsl_bo->gpuaddr = req.gpuaddr[0]; + } + return kgsl_bo->gpuaddr + offset; +} + +/* + * Super-cheezy way to synchronization between mesa and ddx.. the + * SET_ACTIVE ioctl gives us a way to stash a 32b # w/ a GEM bo, and + * GET_BUFINFO gives us a way to retrieve it. We use this to stash + * the timestamp of the last ISSUEIBCMDS on the buffer. + * + * To avoid an obscene amount of syscalls, we: + * 1) Only set the timestamp for buffers w/ an flink name, ie. + * only buffers shared across processes. This is enough to + * catch the DRI2 buffers. + * 2) Only set the timestamp for buffers submitted to the 3d ring + * and only check the timestamps on buffers submitted to the + * 2d ring. This should be enough to handle synchronizing of + * presentation blit. We could do synchronization in the other + * direction too, but that would be problematic if we are using + * the 3d ring from DDX, since client side wouldn't know this. + * + * The waiting on timestamp happens before flush, and setting of + * timestamp happens after flush. It is transparent to the user + * of libdrm_freedreno as all the tracking of buffers happens via + * _emit_reloc().. + */ + +void kgsl_bo_set_timestamp(struct kgsl_bo *kgsl_bo, uint32_t timestamp) +{ + struct fd_bo *bo = &kgsl_bo->base; + if (bo->name) { + struct drm_kgsl_gem_active req = { + .handle = bo->handle, + .active = timestamp, + }; + int ret; + + ret = drmCommandWrite(bo->dev->fd, DRM_KGSL_GEM_SET_ACTIVE, + &req, sizeof(req)); + if (ret) { + ERROR_MSG("set active failed: %s", strerror(errno)); + } + } +} + +uint32_t kgsl_bo_get_timestamp(struct kgsl_bo *kgsl_bo) +{ + struct fd_bo *bo = &kgsl_bo->base; + uint32_t timestamp = 0; + if (bo->name) { + struct drm_kgsl_gem_bufinfo req = { + .handle = bo->handle, + }; + int ret; + + ret = drmCommandWriteRead(bo->dev->fd, DRM_KGSL_GEM_GET_BUFINFO, + &req, sizeof(req)); + if (ret) { + ERROR_MSG("get bufinfo failed: %s", strerror(errno)); + return 0; + } + + timestamp = req.active; + } + return timestamp; +} diff --git a/freedreno/kgsl/kgsl_device.c b/freedreno/kgsl/kgsl_device.c new file mode 100644 index 00000000..fb6d6d2d --- /dev/null +++ b/freedreno/kgsl/kgsl_device.c @@ -0,0 +1,61 @@ +/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */ + +/* + * Copyright (C) 2013 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#include +#include +#include + +#include "kgsl_priv.h" + +static void kgsl_device_destroy(struct fd_device *dev) +{ + struct kgsl_device *kgsl_dev = to_kgsl_device(dev); + free(kgsl_dev); +} + +static struct fd_device_funcs funcs = { + .bo_new_handle = kgsl_bo_new_handle, + .bo_from_handle = kgsl_bo_from_handle, + .pipe_new = kgsl_pipe_new, + .destroy = kgsl_device_destroy, +}; + +struct fd_device * kgsl_device_new(int fd) +{ + struct kgsl_device *kgsl_dev; + struct fd_device *dev; + + kgsl_dev = calloc(1, sizeof(*kgsl_dev)); + if (!kgsl_dev) + return NULL; + + dev = &kgsl_dev->base; + dev->funcs = &funcs; + + return dev; +} diff --git a/freedreno/kgsl/kgsl_drm.h b/freedreno/kgsl/kgsl_drm.h new file mode 100644 index 00000000..f1c7f4e2 --- /dev/null +++ b/freedreno/kgsl/kgsl_drm.h @@ -0,0 +1,192 @@ +#ifndef _KGSL_DRM_H_ +#define _KGSL_DRM_H_ + +#include "drm.h" + +#define DRM_KGSL_GEM_CREATE 0x00 +#define DRM_KGSL_GEM_PREP 0x01 +#define DRM_KGSL_GEM_SETMEMTYPE 0x02 +#define DRM_KGSL_GEM_GETMEMTYPE 0x03 +#define DRM_KGSL_GEM_MMAP 0x04 +#define DRM_KGSL_GEM_ALLOC 0x05 +#define DRM_KGSL_GEM_BIND_GPU 0x06 +#define DRM_KGSL_GEM_UNBIND_GPU 0x07 + +#define DRM_KGSL_GEM_GET_BUFINFO 0x08 +#define DRM_KGSL_GEM_SET_BUFCOUNT 0x09 +#define DRM_KGSL_GEM_SET_ACTIVE 0x0A +#define DRM_KGSL_GEM_LOCK_HANDLE 0x0B +#define DRM_KGSL_GEM_UNLOCK_HANDLE 0x0C +#define DRM_KGSL_GEM_UNLOCK_ON_TS 0x0D +#define DRM_KGSL_GEM_CREATE_FD 0x0E + +#define DRM_IOCTL_KGSL_GEM_CREATE \ +DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_CREATE, struct drm_kgsl_gem_create) + +#define DRM_IOCTL_KGSL_GEM_PREP \ +DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_PREP, struct drm_kgsl_gem_prep) + +#define DRM_IOCTL_KGSL_GEM_SETMEMTYPE \ +DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_SETMEMTYPE, \ +struct drm_kgsl_gem_memtype) + +#define DRM_IOCTL_KGSL_GEM_GETMEMTYPE \ +DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_GETMEMTYPE, \ +struct drm_kgsl_gem_memtype) + +#define DRM_IOCTL_KGSL_GEM_MMAP \ +DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_MMAP, struct drm_kgsl_gem_mmap) + +#define DRM_IOCTL_KGSL_GEM_ALLOC \ +DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_ALLOC, struct drm_kgsl_gem_alloc) + +#define DRM_IOCTL_KGSL_GEM_BIND_GPU \ +DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_BIND_GPU, struct drm_kgsl_gem_bind_gpu) + +#define DRM_IOCTL_KGSL_GEM_UNBIND_GPU \ +DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_UNBIND_GPU, \ +struct drm_kgsl_gem_bind_gpu) + +#define DRM_IOCTL_KGSL_GEM_GET_BUFINFO \ +DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_GET_BUFINFO, \ + struct drm_kgsl_gem_bufinfo) + +#define DRM_IOCTL_KGSL_GEM_SET_BUFCOUNT \ +DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_SET_BUFCOUNT, \ + struct drm_kgsl_gem_bufcount) + +#define DRM_IOCTL_KGSL_GEM_SET_ACTIVE \ +DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_SET_ACTIVE, \ + struct drm_kgsl_gem_active) + +#define DRM_IOCTL_KGSL_GEM_LOCK_HANDLE \ +DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_LOCK_HANDLE, \ +struct drm_kgsl_gem_lock_handles) + +#define DRM_IOCTL_KGSL_GEM_UNLOCK_HANDLE \ +DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_UNLOCK_HANDLE, \ +struct drm_kgsl_gem_unlock_handles) + +#define DRM_IOCTL_KGSL_GEM_UNLOCK_ON_TS \ +DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_UNLOCK_ON_TS, \ +struct drm_kgsl_gem_unlock_on_ts) + +#define DRM_IOCTL_KGSL_GEM_CREATE_FD \ +DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_CREATE_FD, \ +struct drm_kgsl_gem_create_fd) + +/* Maximum number of sub buffers per GEM object */ +#define DRM_KGSL_GEM_MAX_BUFFERS 2 + +/* Memory types - these define the source and caching policies + of the GEM memory chunk */ + +/* Legacy definitions left for compatability */ + +#define DRM_KGSL_GEM_TYPE_EBI 0 +#define DRM_KGSL_GEM_TYPE_SMI 1 +#define DRM_KGSL_GEM_TYPE_KMEM 2 +#define DRM_KGSL_GEM_TYPE_KMEM_NOCACHE 3 +#define DRM_KGSL_GEM_TYPE_MEM_MASK 0xF + +/* Contiguous memory (PMEM) */ +#define DRM_KGSL_GEM_TYPE_PMEM 0x000100 + +/* PMEM memory types */ +#define DRM_KGSL_GEM_PMEM_EBI 0x001000 +#define DRM_KGSL_GEM_PMEM_SMI 0x002000 + +/* Standard paged memory */ +#define DRM_KGSL_GEM_TYPE_MEM 0x010000 + +/* Caching controls */ +#define DRM_KGSL_GEM_CACHE_NONE 0x000000 +#define DRM_KGSL_GEM_CACHE_WCOMBINE 0x100000 +#define DRM_KGSL_GEM_CACHE_WTHROUGH 0x200000 +#define DRM_KGSL_GEM_CACHE_WBACK 0x400000 +#define DRM_KGSL_GEM_CACHE_WBACKWA 0x800000 +#define DRM_KGSL_GEM_CACHE_MASK 0xF00000 + +/* FD based objects */ +#define DRM_KGSL_GEM_TYPE_FD_FBMEM 0x1000000 +#define DRM_KGSL_GEM_TYPE_FD_MASK 0xF000000 + +/* Timestamp types */ +#define DRM_KGSL_GEM_TS_3D 0x00000430 +#define DRM_KGSL_GEM_TS_2D 0x00000180 + + +struct drm_kgsl_gem_create { + uint32_t size; + uint32_t handle; +}; + +struct drm_kgsl_gem_prep { + uint32_t handle; + uint32_t phys; + uint64_t offset; +}; + +struct drm_kgsl_gem_memtype { + uint32_t handle; + uint32_t type; +}; + +struct drm_kgsl_gem_mmap { + uint32_t handle; + uint32_t size; + uint32_t hostptr; + uint64_t offset; +}; + +struct drm_kgsl_gem_alloc { + uint32_t handle; + uint64_t offset; +}; + +struct drm_kgsl_gem_bind_gpu { + uint32_t handle; + uint32_t gpuptr; +}; + +struct drm_kgsl_gem_bufinfo { + uint32_t handle; + uint32_t count; + uint32_t active; + uint32_t offset[DRM_KGSL_GEM_MAX_BUFFERS]; + uint32_t gpuaddr[DRM_KGSL_GEM_MAX_BUFFERS]; +}; + +struct drm_kgsl_gem_bufcount { + uint32_t handle; + uint32_t bufcount; +}; + +struct drm_kgsl_gem_active { + uint32_t handle; + uint32_t active; +}; + +struct drm_kgsl_gem_lock_handles { + uint32_t num_handles; + uint32_t *handle_list; + uint32_t pid; + uint32_t lock_id; /* Returned lock id used for unlocking */ +}; + +struct drm_kgsl_gem_unlock_handles { + uint32_t lock_id; +}; + +struct drm_kgsl_gem_unlock_on_ts { + uint32_t lock_id; + uint32_t timestamp; /* This field is a hw generated ts */ + uint32_t type; /* Which pipe to check for ts generation */ +}; + +struct drm_kgsl_gem_create_fd { + uint32_t fd; + uint32_t handle; +}; + +#endif diff --git a/freedreno/kgsl/kgsl_pipe.c b/freedreno/kgsl/kgsl_pipe.c new file mode 100644 index 00000000..f7ff7fe0 --- /dev/null +++ b/freedreno/kgsl/kgsl_pipe.c @@ -0,0 +1,264 @@ +/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */ + +/* + * Copyright (C) 2013 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#include "kgsl_priv.h" + + +static int kgsl_pipe_get_param(struct fd_pipe *pipe, + enum fd_param_id param, uint64_t *value) +{ + struct kgsl_pipe *kgsl_pipe = to_kgsl_pipe(pipe); + switch (param) { + case FD_DEVICE_ID: + *value = kgsl_pipe->devinfo.device_id; + return 0; + case FD_GPU_ID: + *value = kgsl_pipe->devinfo.gpu_id; + return 0; + case FD_GMEM_SIZE: + *value = kgsl_pipe->devinfo.gmem_sizebytes; + return 0; + default: + ERROR_MSG("invalid param id: %d", param); + return -1; + } +} + +static int kgsl_pipe_wait(struct fd_pipe *pipe, uint32_t timestamp) +{ + struct kgsl_pipe *kgsl_pipe = to_kgsl_pipe(pipe); + struct kgsl_device_waittimestamp req = { + .timestamp = timestamp, + .timeout = 5000, + }; + int ret; + + do { + ret = ioctl(kgsl_pipe->fd, IOCTL_KGSL_DEVICE_WAITTIMESTAMP, &req); + } while ((ret == -1) && ((errno == EINTR) || (errno == EAGAIN))); + if (ret) + ERROR_MSG("waittimestamp failed! %d (%s)", ret, strerror(errno)); + else + kgsl_pipe_process_pending(kgsl_pipe, timestamp); + return ret; +} + +int kgsl_pipe_timestamp(struct kgsl_pipe *kgsl_pipe, uint32_t *timestamp) +{ + struct kgsl_cmdstream_readtimestamp req = { + .type = KGSL_TIMESTAMP_RETIRED + }; + int ret = ioctl(kgsl_pipe->fd, IOCTL_KGSL_CMDSTREAM_READTIMESTAMP, &req); + if (ret) { + ERROR_MSG("readtimestamp failed! %d (%s)", + ret, strerror(errno)); + return ret; + } + *timestamp = req.timestamp; + return 0; +} + +static void kgsl_pipe_destroy(struct fd_pipe *pipe) +{ + struct kgsl_pipe *kgsl_pipe = to_kgsl_pipe(pipe); + struct kgsl_drawctxt_destroy req = { + .drawctxt_id = kgsl_pipe->drawctxt_id, + }; + + if (kgsl_pipe->drawctxt_id) + ioctl(kgsl_pipe->fd, IOCTL_KGSL_DRAWCTXT_DESTROY, &req); + + if (kgsl_pipe->fd) + close(kgsl_pipe->fd); + + free(kgsl_pipe); +} + +static struct fd_pipe_funcs funcs = { + .ringbuffer_new = kgsl_ringbuffer_new, + .get_param = kgsl_pipe_get_param, + .wait = kgsl_pipe_wait, + .destroy = kgsl_pipe_destroy, +}; + +int is_kgsl_pipe(struct fd_pipe *pipe) +{ + return pipe->funcs == &funcs; +} + +/* add buffer to submit list when it is referenced in cmdstream: */ +void kgsl_pipe_add_submit(struct kgsl_pipe *kgsl_pipe, + struct kgsl_bo *kgsl_bo) +{ + struct fd_pipe *pipe = &kgsl_pipe->base; + struct fd_bo *bo = &kgsl_bo->base; + struct list_head *list = &kgsl_bo->list[pipe->id]; + if (LIST_IS_EMPTY(list)) { + fd_bo_ref(bo); + } else { + list_del(list); + } + list_addtail(list, &kgsl_pipe->submit_list); +} + +/* prepare buffers on submit list before flush: */ +void kgsl_pipe_pre_submit(struct kgsl_pipe *kgsl_pipe) +{ + struct fd_pipe *pipe = &kgsl_pipe->base; + struct kgsl_bo *kgsl_bo = NULL; + + if (!kgsl_pipe->p3d) + kgsl_pipe->p3d = fd_pipe_new(pipe->dev, FD_PIPE_3D); + + LIST_FOR_EACH_ENTRY(kgsl_bo, &kgsl_pipe->submit_list, list[pipe->id]) { + uint32_t timestamp = kgsl_bo_get_timestamp(kgsl_bo); + if (timestamp) + fd_pipe_wait(kgsl_pipe->p3d, timestamp); + } +} + +/* process buffers on submit list after flush: */ +void kgsl_pipe_post_submit(struct kgsl_pipe *kgsl_pipe, uint32_t timestamp) +{ + struct fd_pipe *pipe = &kgsl_pipe->base; + struct kgsl_bo *kgsl_bo = NULL, *tmp; + + LIST_FOR_EACH_ENTRY_SAFE(kgsl_bo, tmp, &kgsl_pipe->submit_list, list[pipe->id]) { + struct list_head *list = &kgsl_bo->list[pipe->id]; + list_del(list); + kgsl_bo->timestamp[pipe->id] = timestamp; + list_addtail(list, &kgsl_pipe->pending_list); + + kgsl_bo_set_timestamp(kgsl_bo, timestamp); + } + + if (!kgsl_pipe_timestamp(kgsl_pipe, ×tamp)) + kgsl_pipe_process_pending(kgsl_pipe, timestamp); +} + +void kgsl_pipe_process_pending(struct kgsl_pipe *kgsl_pipe, uint32_t timestamp) +{ + struct fd_pipe *pipe = &kgsl_pipe->base; + struct kgsl_bo *kgsl_bo = NULL, *tmp; + + LIST_FOR_EACH_ENTRY_SAFE(kgsl_bo, tmp, &kgsl_pipe->pending_list, list[pipe->id]) { + struct list_head *list = &kgsl_bo->list[pipe->id]; + if (kgsl_bo->timestamp[pipe->id] > timestamp) + return; + list_delinit(list); + kgsl_bo->timestamp[pipe->id] = 0; + fd_bo_del(&kgsl_bo->base); + } +} + +static int getprop(int fd, enum kgsl_property_type type, + void *value, int sizebytes) +{ + struct kgsl_device_getproperty req = { + .type = type, + .value = value, + .sizebytes = sizebytes, + }; + return ioctl(fd, IOCTL_KGSL_DEVICE_GETPROPERTY, &req); +} + +#define GETPROP(fd, prop, x) do { \ + if (getprop((fd), KGSL_PROP_##prop, &(x), sizeof(x))) { \ + ERROR_MSG("failed to get property: " #prop); \ + goto fail; \ + } } while (0) + + +struct fd_pipe * kgsl_pipe_new(struct fd_device *dev, enum fd_pipe_id id) +{ + static const char *paths[] = { + [FD_PIPE_3D] = "/dev/kgsl-3d0", + [FD_PIPE_2D] = "/dev/kgsl-2d0", + }; + struct kgsl_drawctxt_create req = { + .flags = 0x2000, /* ??? */ + }; + struct kgsl_pipe *kgsl_pipe = NULL; + struct fd_pipe *pipe = NULL; + int ret, fd; + + fd = open(paths[id], O_RDWR); + if (fd < 0) { + ERROR_MSG("could not open %s device: %d (%s)", + paths[id], fd, strerror(errno)); + goto fail; + } + + ret = ioctl(fd, IOCTL_KGSL_DRAWCTXT_CREATE, &req); + if (ret) { + ERROR_MSG("failed to allocate context: %d (%s)", + ret, strerror(errno)); + goto fail; + } + + kgsl_pipe = calloc(1, sizeof(*kgsl_pipe)); + if (!kgsl_pipe) { + ERROR_MSG("allocation failed"); + goto fail; + } + + pipe = &kgsl_pipe->base; + pipe->funcs = &funcs; + + kgsl_pipe->fd = fd; + kgsl_pipe->drawctxt_id = req.drawctxt_id; + + list_inithead(&kgsl_pipe->submit_list); + list_inithead(&kgsl_pipe->pending_list); + + GETPROP(fd, VERSION, kgsl_pipe->version); + GETPROP(fd, DEVICE_INFO, kgsl_pipe->devinfo); + + INFO_MSG("Pipe Info:"); + INFO_MSG(" Device: %s", paths[id]); + INFO_MSG(" Chip-id: %d.%d.%d.%d", + (kgsl_pipe->devinfo.chip_id >> 24) & 0xff, + (kgsl_pipe->devinfo.chip_id >> 16) & 0xff, + (kgsl_pipe->devinfo.chip_id >> 8) & 0xff, + (kgsl_pipe->devinfo.chip_id >> 0) & 0xff); + INFO_MSG(" Device-id: %d", kgsl_pipe->devinfo.device_id); + INFO_MSG(" GPU-id: %d", kgsl_pipe->devinfo.gpu_id); + INFO_MSG(" MMU enabled: %d", kgsl_pipe->devinfo.mmu_enabled); + INFO_MSG(" GMEM Base addr: 0x%08x", kgsl_pipe->devinfo.gmem_gpubaseaddr); + INFO_MSG(" GMEM size: 0x%08x", kgsl_pipe->devinfo.gmem_sizebytes); + INFO_MSG(" Driver version: %d.%d", + kgsl_pipe->version.drv_major, kgsl_pipe->version.drv_minor); + INFO_MSG(" Device version: %d.%d", + kgsl_pipe->version.dev_major, kgsl_pipe->version.dev_minor); + + return pipe; +fail: + if (pipe) + fd_pipe_del(pipe); + return NULL; +} diff --git a/freedreno/kgsl/kgsl_priv.h b/freedreno/kgsl/kgsl_priv.h new file mode 100644 index 00000000..56dc21a5 --- /dev/null +++ b/freedreno/kgsl/kgsl_priv.h @@ -0,0 +1,115 @@ +/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */ + +/* + * Copyright (C) 2013 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#ifndef KGSL_PRIV_H_ +#define KGSL_PRIV_H_ + +#include "freedreno_priv.h" +#include "msm_kgsl.h" +#include "kgsl_drm.h" + +struct kgsl_device { + struct fd_device base; +}; + +static inline struct kgsl_device * to_kgsl_device(struct fd_device *x) +{ + return (struct kgsl_device *)x; +} + +struct kgsl_pipe { + struct fd_pipe base; + + int fd; + uint32_t drawctxt_id; + + /* device properties: */ + struct kgsl_version version; + struct kgsl_devinfo devinfo; + + /* list of bo's that are referenced in ringbuffer but not + * submitted yet: + */ + struct list_head submit_list; + + /* list of bo's that have been submitted but timestamp has + * not passed yet (so still ref'd in active cmdstream) + */ + struct list_head pending_list; + + /* if we are the 2d pipe, and want to wait on a timestamp + * from 3d, we need to also internally open the 3d pipe: + */ + struct fd_pipe *p3d; +}; + +static inline struct kgsl_pipe * to_kgsl_pipe(struct fd_pipe *x) +{ + return (struct kgsl_pipe *)x; +} + +int is_kgsl_pipe(struct fd_pipe *pipe); + +struct kgsl_bo { + struct fd_bo base; + uint64_t offset; + uint32_t gpuaddr; + /* timestamp (per pipe) for bo's in a pipe's pending_list: */ + uint32_t timestamp[FD_PIPE_MAX]; + /* list-node for pipe's submit_list or pending_list */ + struct list_head list[FD_PIPE_MAX]; +}; + +static inline struct kgsl_bo * to_kgsl_bo(struct fd_bo *x) +{ + return (struct kgsl_bo *)x; +} + + +struct fd_device * kgsl_device_new(int fd); + +int kgsl_pipe_timestamp(struct kgsl_pipe *kgsl_pipe, uint32_t *timestamp); +void kgsl_pipe_add_submit(struct kgsl_pipe *pipe, struct kgsl_bo *bo); +void kgsl_pipe_pre_submit(struct kgsl_pipe *pipe); +void kgsl_pipe_post_submit(struct kgsl_pipe *pipe, uint32_t timestamp); +void kgsl_pipe_process_pending(struct kgsl_pipe *pipe, uint32_t timestamp); +struct fd_pipe * kgsl_pipe_new(struct fd_device *dev, enum fd_pipe_id id); + +struct fd_ringbuffer * kgsl_ringbuffer_new(struct fd_pipe *pipe, + uint32_t size); + +int kgsl_bo_new_handle(struct fd_device *dev, + uint32_t size, uint32_t flags, uint32_t *handle); +struct fd_bo * kgsl_bo_from_handle(struct fd_device *dev, + uint32_t size, uint32_t handle); + +uint32_t kgsl_bo_gpuaddr(struct kgsl_bo *bo, uint32_t offset); +void kgsl_bo_set_timestamp(struct kgsl_bo *bo, uint32_t timestamp); +uint32_t kgsl_bo_get_timestamp(struct kgsl_bo *bo); + +#endif /* KGSL_PRIV_H_ */ diff --git a/freedreno/kgsl/kgsl_ringbuffer.c b/freedreno/kgsl/kgsl_ringbuffer.c new file mode 100644 index 00000000..dc3c9c25 --- /dev/null +++ b/freedreno/kgsl/kgsl_ringbuffer.c @@ -0,0 +1,224 @@ +/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */ + +/* + * Copyright (C) 2013 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#include + +#include "freedreno_ringbuffer.h" +#include "kgsl_priv.h" + + +/* because kgsl tries to validate the gpuaddr on kernel side in ISSUEIBCMDS, + * we can't use normal gem bo's for ringbuffer.. someday the kernel part + * needs to be reworked into a single sane drm driver :-/ + */ +struct kgsl_rb_bo { + struct kgsl_pipe *pipe; + void *hostptr; + uint32_t gpuaddr; + uint32_t size; +}; + +struct kgsl_ringbuffer { + struct fd_ringbuffer base; + struct kgsl_rb_bo *bo; +}; + +static inline struct kgsl_ringbuffer * to_kgsl_ringbuffer(struct fd_ringbuffer *x) +{ + return (struct kgsl_ringbuffer *)x; +} + +static void kgsl_rb_bo_del(struct kgsl_rb_bo *bo) +{ + struct kgsl_sharedmem_free req = { + .gpuaddr = bo->gpuaddr, + }; + int ret; + + munmap(bo->hostptr, bo->size); + + ret = ioctl(bo->pipe->fd, IOCTL_KGSL_SHAREDMEM_FREE, &req); + if (ret) { + ERROR_MSG("sharedmem free failed: %s", strerror(errno)); + } + + free(bo); +} + +static struct kgsl_rb_bo * kgsl_rb_bo_new(struct kgsl_pipe *pipe, uint32_t size) +{ + struct kgsl_rb_bo *bo; + struct kgsl_gpumem_alloc req = { + .size = ALIGN(size, 4096), + .flags = KGSL_MEMFLAGS_GPUREADONLY, + }; + int ret; + + bo = calloc(1, sizeof(*bo)); + if (!bo) { + ERROR_MSG("allocation failed"); + return NULL; + } + ret = ioctl(pipe->fd, IOCTL_KGSL_GPUMEM_ALLOC, &req); + if (ret) { + ERROR_MSG("gpumem allocation failed: %s", strerror(errno)); + goto fail; + } + + bo->pipe = pipe; + bo->gpuaddr = req.gpuaddr; + bo->size = size; + bo->hostptr = mmap(NULL, size, PROT_WRITE|PROT_READ, + MAP_SHARED, pipe->fd, req.gpuaddr); + + return bo; +fail: + if (bo) + kgsl_rb_bo_del(bo); + return NULL; +} + +static void * kgsl_ringbuffer_hostptr(struct fd_ringbuffer *ring) +{ + struct kgsl_ringbuffer *kgsl_ring = to_kgsl_ringbuffer(ring); + return kgsl_ring->bo->hostptr; +} + +static int kgsl_ringbuffer_flush(struct fd_ringbuffer *ring, uint32_t *last_start) +{ + struct kgsl_ringbuffer *kgsl_ring = to_kgsl_ringbuffer(ring); + struct kgsl_pipe *kgsl_pipe = to_kgsl_pipe(ring->pipe); + uint32_t offset = (uint8_t *)last_start - (uint8_t *)ring->start; + struct kgsl_ibdesc ibdesc = { + .gpuaddr = kgsl_ring->bo->gpuaddr + offset, + .hostptr = last_start, + .sizedwords = ring->cur - last_start, + }; + struct kgsl_ringbuffer_issueibcmds req = { + .drawctxt_id = kgsl_pipe->drawctxt_id, + .ibdesc_addr = (unsigned long)&ibdesc, + .numibs = 1, + .flags = KGSL_CONTEXT_SUBMIT_IB_LIST, + }; + int ret; + + kgsl_pipe_pre_submit(kgsl_pipe); + + /* z180_cmdstream_issueibcmds() is made of fail: */ + if (ring->pipe->id == FD_PIPE_2D) { + /* fix up size field in last cmd packet */ + uint32_t last_size = (uint32_t)(ring->cur - last_start); + /* 5 is length of first packet, 2 for the two 7f000000's */ + last_start[2] = last_size - (5 + 2); + ibdesc.gpuaddr = kgsl_ring->bo->gpuaddr; + ibdesc.hostptr = kgsl_ring->bo->hostptr; + ibdesc.sizedwords = 0x145; + req.timestamp = (uint32_t)kgsl_ring->bo->hostptr; + } + + do { + ret = ioctl(kgsl_pipe->fd, IOCTL_KGSL_RINGBUFFER_ISSUEIBCMDS, &req); + } while ((ret == -1) && ((errno == EINTR) || (errno == EAGAIN))); + if (ret) + ERROR_MSG("issueibcmds failed! %d (%s)", ret, strerror(errno)); + + ring->last_timestamp = req.timestamp; + ring->last_start = ring->cur; + + kgsl_pipe_post_submit(kgsl_pipe, req.timestamp); + + return ret; +} + +static void kgsl_ringbuffer_emit_reloc(struct fd_ringbuffer *ring, + const struct fd_reloc *r) +{ + struct kgsl_bo *kgsl_bo = to_kgsl_bo(r->bo); + uint32_t addr = kgsl_bo_gpuaddr(kgsl_bo, r->offset); + assert(addr); + if (r->shift < 0) + addr >>= -r->shift; + else + addr <<= r->shift; + (*ring->cur++) = addr | r->or; + kgsl_pipe_add_submit(to_kgsl_pipe(ring->pipe), kgsl_bo); +} + +static void kgsl_ringbuffer_emit_reloc_ring(struct fd_ringbuffer *ring, + struct fd_ringmarker *target, struct fd_ringmarker *end) +{ + struct kgsl_ringbuffer *target_ring = to_kgsl_ringbuffer(target->ring); + (*ring->cur++) = target_ring->bo->gpuaddr + + (uint8_t *)target->cur - (uint8_t *)target->ring->start; +} + +static void kgsl_ringbuffer_destroy(struct fd_ringbuffer *ring) +{ + struct kgsl_ringbuffer *kgsl_ring = to_kgsl_ringbuffer(ring); + if (ring->last_timestamp) + fd_pipe_wait(ring->pipe, ring->last_timestamp); + if (kgsl_ring->bo) + kgsl_rb_bo_del(kgsl_ring->bo); + free(kgsl_ring); +} + +static struct fd_ringbuffer_funcs funcs = { + .hostptr = kgsl_ringbuffer_hostptr, + .flush = kgsl_ringbuffer_flush, + .emit_reloc = kgsl_ringbuffer_emit_reloc, + .emit_reloc_ring = kgsl_ringbuffer_emit_reloc_ring, + .destroy = kgsl_ringbuffer_destroy, +}; + +struct fd_ringbuffer * kgsl_ringbuffer_new(struct fd_pipe *pipe, + uint32_t size) +{ + struct kgsl_ringbuffer *kgsl_ring; + struct fd_ringbuffer *ring = NULL; + + kgsl_ring = calloc(1, sizeof(*kgsl_ring)); + if (!kgsl_ring) { + ERROR_MSG("allocation failed"); + goto fail; + } + + ring = &kgsl_ring->base; + ring->funcs = &funcs; + + kgsl_ring->bo = kgsl_rb_bo_new(to_kgsl_pipe(pipe), size); + if (!kgsl_ring->bo) { + ERROR_MSG("ringbuffer allocation failed"); + goto fail; + } + + return ring; +fail: + if (ring) + fd_ringbuffer_del(ring); + return NULL; +} diff --git a/freedreno/kgsl/msm_kgsl.h b/freedreno/kgsl/msm_kgsl.h new file mode 100644 index 00000000..e67190f0 --- /dev/null +++ b/freedreno/kgsl/msm_kgsl.h @@ -0,0 +1,519 @@ +#ifndef _MSM_KGSL_H +#define _MSM_KGSL_H + +#define KGSL_VERSION_MAJOR 3 +#define KGSL_VERSION_MINOR 11 + +/*context flags */ +#define KGSL_CONTEXT_SAVE_GMEM 0x00000001 +#define KGSL_CONTEXT_NO_GMEM_ALLOC 0x00000002 +#define KGSL_CONTEXT_SUBMIT_IB_LIST 0x00000004 +#define KGSL_CONTEXT_CTX_SWITCH 0x00000008 +#define KGSL_CONTEXT_PREAMBLE 0x00000010 +#define KGSL_CONTEXT_TRASH_STATE 0x00000020 +#define KGSL_CONTEXT_PER_CONTEXT_TS 0x00000040 + +#define KGSL_CONTEXT_INVALID 0xffffffff + +/* Memory allocayion flags */ +#define KGSL_MEMFLAGS_GPUREADONLY 0x01000000 + +/* generic flag values */ +#define KGSL_FLAGS_NORMALMODE 0x00000000 +#define KGSL_FLAGS_SAFEMODE 0x00000001 +#define KGSL_FLAGS_INITIALIZED0 0x00000002 +#define KGSL_FLAGS_INITIALIZED 0x00000004 +#define KGSL_FLAGS_STARTED 0x00000008 +#define KGSL_FLAGS_ACTIVE 0x00000010 +#define KGSL_FLAGS_RESERVED0 0x00000020 +#define KGSL_FLAGS_RESERVED1 0x00000040 +#define KGSL_FLAGS_RESERVED2 0x00000080 +#define KGSL_FLAGS_SOFT_RESET 0x00000100 +#define KGSL_FLAGS_PER_CONTEXT_TIMESTAMPS 0x00000200 + +/* Clock flags to show which clocks should be controled by a given platform */ +#define KGSL_CLK_SRC 0x00000001 +#define KGSL_CLK_CORE 0x00000002 +#define KGSL_CLK_IFACE 0x00000004 +#define KGSL_CLK_MEM 0x00000008 +#define KGSL_CLK_MEM_IFACE 0x00000010 +#define KGSL_CLK_AXI 0x00000020 + +/* + * Reset status values for context + */ +enum kgsl_ctx_reset_stat { + KGSL_CTX_STAT_NO_ERROR = 0x00000000, + KGSL_CTX_STAT_GUILTY_CONTEXT_RESET_EXT = 0x00000001, + KGSL_CTX_STAT_INNOCENT_CONTEXT_RESET_EXT = 0x00000002, + KGSL_CTX_STAT_UNKNOWN_CONTEXT_RESET_EXT = 0x00000003 +}; + +#define KGSL_MAX_PWRLEVELS 5 + +#define KGSL_CONVERT_TO_MBPS(val) \ + (val*1000*1000U) + +/* device id */ +enum kgsl_deviceid { + KGSL_DEVICE_3D0 = 0x00000000, + KGSL_DEVICE_2D0 = 0x00000001, + KGSL_DEVICE_2D1 = 0x00000002, + KGSL_DEVICE_MAX = 0x00000003 +}; + +enum kgsl_user_mem_type { + KGSL_USER_MEM_TYPE_PMEM = 0x00000000, + KGSL_USER_MEM_TYPE_ASHMEM = 0x00000001, + KGSL_USER_MEM_TYPE_ADDR = 0x00000002, + KGSL_USER_MEM_TYPE_ION = 0x00000003, + KGSL_USER_MEM_TYPE_MAX = 0x00000004, +}; + +struct kgsl_devinfo { + + unsigned int device_id; + /* chip revision id + * coreid:8 majorrev:8 minorrev:8 patch:8 + */ + unsigned int chip_id; + unsigned int mmu_enabled; + unsigned int gmem_gpubaseaddr; + /* + * This field contains the adreno revision + * number 200, 205, 220, etc... + */ + unsigned int gpu_id; + unsigned int gmem_sizebytes; +}; + +/* this structure defines the region of memory that can be mmap()ed from this + driver. The timestamp fields are volatile because they are written by the + GPU +*/ +struct kgsl_devmemstore { + volatile unsigned int soptimestamp; + unsigned int sbz; + volatile unsigned int eoptimestamp; + unsigned int sbz2; + volatile unsigned int ts_cmp_enable; + unsigned int sbz3; + volatile unsigned int ref_wait_ts; + unsigned int sbz4; + unsigned int current_context; + unsigned int sbz5; +}; + +#define KGSL_MEMSTORE_OFFSET(ctxt_id, field) \ + ((ctxt_id)*sizeof(struct kgsl_devmemstore) + \ + offsetof(struct kgsl_devmemstore, field)) + +/* timestamp id*/ +enum kgsl_timestamp_type { + KGSL_TIMESTAMP_CONSUMED = 0x00000001, /* start-of-pipeline timestamp */ + KGSL_TIMESTAMP_RETIRED = 0x00000002, /* end-of-pipeline timestamp*/ + KGSL_TIMESTAMP_QUEUED = 0x00000003, +}; + +/* property types - used with kgsl_device_getproperty */ +enum kgsl_property_type { + KGSL_PROP_DEVICE_INFO = 0x00000001, + KGSL_PROP_DEVICE_SHADOW = 0x00000002, + KGSL_PROP_DEVICE_POWER = 0x00000003, + KGSL_PROP_SHMEM = 0x00000004, + KGSL_PROP_SHMEM_APERTURES = 0x00000005, + KGSL_PROP_MMU_ENABLE = 0x00000006, + KGSL_PROP_INTERRUPT_WAITS = 0x00000007, + KGSL_PROP_VERSION = 0x00000008, + KGSL_PROP_GPU_RESET_STAT = 0x00000009, + KGSL_PROP_PWRCTRL = 0x0000000E, +}; + +struct kgsl_shadowprop { + unsigned int gpuaddr; + unsigned int size; + unsigned int flags; /* contains KGSL_FLAGS_ values */ +}; + +struct kgsl_pwrlevel { + unsigned int gpu_freq; + unsigned int bus_freq; + unsigned int io_fraction; +}; + +struct kgsl_version { + unsigned int drv_major; + unsigned int drv_minor; + unsigned int dev_major; + unsigned int dev_minor; +}; + +#ifdef __KERNEL__ + +#define KGSL_3D0_REG_MEMORY "kgsl_3d0_reg_memory" +#define KGSL_3D0_IRQ "kgsl_3d0_irq" +#define KGSL_2D0_REG_MEMORY "kgsl_2d0_reg_memory" +#define KGSL_2D0_IRQ "kgsl_2d0_irq" +#define KGSL_2D1_REG_MEMORY "kgsl_2d1_reg_memory" +#define KGSL_2D1_IRQ "kgsl_2d1_irq" + +enum kgsl_iommu_context_id { + KGSL_IOMMU_CONTEXT_USER = 0, + KGSL_IOMMU_CONTEXT_PRIV = 1, +}; + +struct kgsl_iommu_ctx { + const char *iommu_ctx_name; + enum kgsl_iommu_context_id ctx_id; +}; + +struct kgsl_device_iommu_data { + const struct kgsl_iommu_ctx *iommu_ctxs; + int iommu_ctx_count; + unsigned int physstart; + unsigned int physend; +}; + +struct kgsl_device_platform_data { + struct kgsl_pwrlevel pwrlevel[KGSL_MAX_PWRLEVELS]; + int init_level; + int num_levels; + int (*set_grp_async)(void); + unsigned int idle_timeout; + bool strtstp_sleepwake; + unsigned int nap_allowed; + unsigned int clk_map; + unsigned int idle_needed; + struct msm_bus_scale_pdata *bus_scale_table; + struct kgsl_device_iommu_data *iommu_data; + int iommu_count; + struct msm_dcvs_core_info *core_info; +}; + +#endif + +/* structure holds list of ibs */ +struct kgsl_ibdesc { + unsigned int gpuaddr; + void *hostptr; + unsigned int sizedwords; + unsigned int ctrl; +}; + +/* ioctls */ +#define KGSL_IOC_TYPE 0x09 + +/* get misc info about the GPU + type should be a value from enum kgsl_property_type + value points to a structure that varies based on type + sizebytes is sizeof() that structure + for KGSL_PROP_DEVICE_INFO, use struct kgsl_devinfo + this structure contaings hardware versioning info. + for KGSL_PROP_DEVICE_SHADOW, use struct kgsl_shadowprop + this is used to find mmap() offset and sizes for mapping + struct kgsl_memstore into userspace. +*/ +struct kgsl_device_getproperty { + unsigned int type; + void *value; + unsigned int sizebytes; +}; + +#define IOCTL_KGSL_DEVICE_GETPROPERTY \ + _IOWR(KGSL_IOC_TYPE, 0x2, struct kgsl_device_getproperty) + +/* IOCTL_KGSL_DEVICE_READ (0x3) - removed 03/2012 + */ + +/* block until the GPU has executed past a given timestamp + * timeout is in milliseconds. + */ +struct kgsl_device_waittimestamp { + unsigned int timestamp; + unsigned int timeout; +}; + +#define IOCTL_KGSL_DEVICE_WAITTIMESTAMP \ + _IOW(KGSL_IOC_TYPE, 0x6, struct kgsl_device_waittimestamp) + +struct kgsl_device_waittimestamp_ctxtid { + unsigned int context_id; + unsigned int timestamp; + unsigned int timeout; +}; + +#define IOCTL_KGSL_DEVICE_WAITTIMESTAMP_CTXTID \ + _IOW(KGSL_IOC_TYPE, 0x7, struct kgsl_device_waittimestamp_ctxtid) + +/* issue indirect commands to the GPU. + * drawctxt_id must have been created with IOCTL_KGSL_DRAWCTXT_CREATE + * ibaddr and sizedwords must specify a subset of a buffer created + * with IOCTL_KGSL_SHAREDMEM_FROM_PMEM + * flags may be a mask of KGSL_CONTEXT_ values + * timestamp is a returned counter value which can be passed to + * other ioctls to determine when the commands have been executed by + * the GPU. + */ +struct kgsl_ringbuffer_issueibcmds { + unsigned int drawctxt_id; + unsigned int ibdesc_addr; + unsigned int numibs; + unsigned int timestamp; /*output param */ + unsigned int flags; +}; + +#define IOCTL_KGSL_RINGBUFFER_ISSUEIBCMDS \ + _IOWR(KGSL_IOC_TYPE, 0x10, struct kgsl_ringbuffer_issueibcmds) + +/* read the most recently executed timestamp value + * type should be a value from enum kgsl_timestamp_type + */ +struct kgsl_cmdstream_readtimestamp { + unsigned int type; + unsigned int timestamp; /*output param */ +}; + +#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP_OLD \ + _IOR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp) + +#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP \ + _IOWR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp) + +/* free memory when the GPU reaches a given timestamp. + * gpuaddr specify a memory region created by a + * IOCTL_KGSL_SHAREDMEM_FROM_PMEM call + * type should be a value from enum kgsl_timestamp_type + */ +struct kgsl_cmdstream_freememontimestamp { + unsigned int gpuaddr; + unsigned int type; + unsigned int timestamp; +}; + +#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP \ + _IOW(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp) + +/* Previous versions of this header had incorrectly defined + IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP as a read-only ioctl instead + of a write only ioctl. To ensure binary compatability, the following + #define will be used to intercept the incorrect ioctl +*/ + +#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP_OLD \ + _IOR(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp) + +/* create a draw context, which is used to preserve GPU state. + * The flags field may contain a mask KGSL_CONTEXT_* values + */ +struct kgsl_drawctxt_create { + unsigned int flags; + unsigned int drawctxt_id; /*output param */ +}; + +#define IOCTL_KGSL_DRAWCTXT_CREATE \ + _IOWR(KGSL_IOC_TYPE, 0x13, struct kgsl_drawctxt_create) + +/* destroy a draw context */ +struct kgsl_drawctxt_destroy { + unsigned int drawctxt_id; +}; + +#define IOCTL_KGSL_DRAWCTXT_DESTROY \ + _IOW(KGSL_IOC_TYPE, 0x14, struct kgsl_drawctxt_destroy) + +/* add a block of pmem, fb, ashmem or user allocated address + * into the GPU address space */ +struct kgsl_map_user_mem { + int fd; + unsigned int gpuaddr; /*output param */ + unsigned int len; + unsigned int offset; + unsigned int hostptr; /*input param */ + enum kgsl_user_mem_type memtype; + unsigned int reserved; /* May be required to add + params for another mem type */ +}; + +#define IOCTL_KGSL_MAP_USER_MEM \ + _IOWR(KGSL_IOC_TYPE, 0x15, struct kgsl_map_user_mem) + +struct kgsl_cmdstream_readtimestamp_ctxtid { + unsigned int context_id; + unsigned int type; + unsigned int timestamp; /*output param */ +}; + +#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP_CTXTID \ + _IOWR(KGSL_IOC_TYPE, 0x16, struct kgsl_cmdstream_readtimestamp_ctxtid) + +struct kgsl_cmdstream_freememontimestamp_ctxtid { + unsigned int context_id; + unsigned int gpuaddr; + unsigned int type; + unsigned int timestamp; +}; + +#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP_CTXTID \ + _IOW(KGSL_IOC_TYPE, 0x17, \ + struct kgsl_cmdstream_freememontimestamp_ctxtid) + +/* add a block of pmem or fb into the GPU address space */ +struct kgsl_sharedmem_from_pmem { + int pmem_fd; + unsigned int gpuaddr; /*output param */ + unsigned int len; + unsigned int offset; +}; + +#define IOCTL_KGSL_SHAREDMEM_FROM_PMEM \ + _IOWR(KGSL_IOC_TYPE, 0x20, struct kgsl_sharedmem_from_pmem) + +/* remove memory from the GPU's address space */ +struct kgsl_sharedmem_free { + unsigned int gpuaddr; +}; + +#define IOCTL_KGSL_SHAREDMEM_FREE \ + _IOW(KGSL_IOC_TYPE, 0x21, struct kgsl_sharedmem_free) + +struct kgsl_cff_user_event { + unsigned char cff_opcode; + unsigned int op1; + unsigned int op2; + unsigned int op3; + unsigned int op4; + unsigned int op5; + unsigned int __pad[2]; +}; + +#define IOCTL_KGSL_CFF_USER_EVENT \ + _IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_cff_user_event) + +struct kgsl_gmem_desc { + unsigned int x; + unsigned int y; + unsigned int width; + unsigned int height; + unsigned int pitch; +}; + +struct kgsl_buffer_desc { + void *hostptr; + unsigned int gpuaddr; + int size; + unsigned int format; + unsigned int pitch; + unsigned int enabled; +}; + +struct kgsl_bind_gmem_shadow { + unsigned int drawctxt_id; + struct kgsl_gmem_desc gmem_desc; + unsigned int shadow_x; + unsigned int shadow_y; + struct kgsl_buffer_desc shadow_buffer; + unsigned int buffer_id; +}; + +#define IOCTL_KGSL_DRAWCTXT_BIND_GMEM_SHADOW \ + _IOW(KGSL_IOC_TYPE, 0x22, struct kgsl_bind_gmem_shadow) + +/* add a block of memory into the GPU address space */ +struct kgsl_sharedmem_from_vmalloc { + unsigned int gpuaddr; /*output param */ + unsigned int hostptr; + unsigned int flags; +}; + +#define IOCTL_KGSL_SHAREDMEM_FROM_VMALLOC \ + _IOWR(KGSL_IOC_TYPE, 0x23, struct kgsl_sharedmem_from_vmalloc) + +#define IOCTL_KGSL_SHAREDMEM_FLUSH_CACHE \ + _IOW(KGSL_IOC_TYPE, 0x24, struct kgsl_sharedmem_free) + +struct kgsl_drawctxt_set_bin_base_offset { + unsigned int drawctxt_id; + unsigned int offset; +}; + +#define IOCTL_KGSL_DRAWCTXT_SET_BIN_BASE_OFFSET \ + _IOW(KGSL_IOC_TYPE, 0x25, struct kgsl_drawctxt_set_bin_base_offset) + +enum kgsl_cmdwindow_type { + KGSL_CMDWINDOW_MIN = 0x00000000, + KGSL_CMDWINDOW_2D = 0x00000000, + KGSL_CMDWINDOW_3D = 0x00000001, /* legacy */ + KGSL_CMDWINDOW_MMU = 0x00000002, + KGSL_CMDWINDOW_ARBITER = 0x000000FF, + KGSL_CMDWINDOW_MAX = 0x000000FF, +}; + +/* write to the command window */ +struct kgsl_cmdwindow_write { + enum kgsl_cmdwindow_type target; + unsigned int addr; + unsigned int data; +}; + +#define IOCTL_KGSL_CMDWINDOW_WRITE \ + _IOW(KGSL_IOC_TYPE, 0x2e, struct kgsl_cmdwindow_write) + +struct kgsl_gpumem_alloc { + unsigned long gpuaddr; + size_t size; + unsigned int flags; +}; + +#define IOCTL_KGSL_GPUMEM_ALLOC \ + _IOWR(KGSL_IOC_TYPE, 0x2f, struct kgsl_gpumem_alloc) + +struct kgsl_cff_syncmem { + unsigned int gpuaddr; + unsigned int len; + unsigned int __pad[2]; /* For future binary compatibility */ +}; + +#define IOCTL_KGSL_CFF_SYNCMEM \ + _IOW(KGSL_IOC_TYPE, 0x30, struct kgsl_cff_syncmem) + +/* + * A timestamp event allows the user space to register an action following an + * expired timestamp. + */ + +struct kgsl_timestamp_event { + int type; /* Type of event (see list below) */ + unsigned int timestamp; /* Timestamp to trigger event on */ + unsigned int context_id; /* Context for the timestamp */ + void *priv; /* Pointer to the event specific blob */ + size_t len; /* Size of the event specific blob */ +}; + +#define IOCTL_KGSL_TIMESTAMP_EVENT \ + _IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_timestamp_event) + +/* A genlock timestamp event releases an existing lock on timestamp expire */ + +#define KGSL_TIMESTAMP_EVENT_GENLOCK 1 + +struct kgsl_timestamp_event_genlock { + int handle; /* Handle of the genlock lock to release */ +}; + +/* + * Set a property within the kernel. Uses the same structure as + * IOCTL_KGSL_GETPROPERTY + */ + +#define IOCTL_KGSL_SETPROPERTY \ + _IOW(KGSL_IOC_TYPE, 0x32, struct kgsl_device_getproperty) + +#ifdef __KERNEL__ +#ifdef CONFIG_MSM_KGSL_DRM +int kgsl_gem_obj_addr(int drm_fd, int handle, unsigned long *start, + unsigned long *len); +#else +#define kgsl_gem_obj_addr(...) 0 +#endif +#endif +#endif /* _MSM_KGSL_H */ diff --git a/freedreno/kgsl_drm.h b/freedreno/kgsl_drm.h deleted file mode 100644 index f1c7f4e2..00000000 --- a/freedreno/kgsl_drm.h +++ /dev/null @@ -1,192 +0,0 @@ -#ifndef _KGSL_DRM_H_ -#define _KGSL_DRM_H_ - -#include "drm.h" - -#define DRM_KGSL_GEM_CREATE 0x00 -#define DRM_KGSL_GEM_PREP 0x01 -#define DRM_KGSL_GEM_SETMEMTYPE 0x02 -#define DRM_KGSL_GEM_GETMEMTYPE 0x03 -#define DRM_KGSL_GEM_MMAP 0x04 -#define DRM_KGSL_GEM_ALLOC 0x05 -#define DRM_KGSL_GEM_BIND_GPU 0x06 -#define DRM_KGSL_GEM_UNBIND_GPU 0x07 - -#define DRM_KGSL_GEM_GET_BUFINFO 0x08 -#define DRM_KGSL_GEM_SET_BUFCOUNT 0x09 -#define DRM_KGSL_GEM_SET_ACTIVE 0x0A -#define DRM_KGSL_GEM_LOCK_HANDLE 0x0B -#define DRM_KGSL_GEM_UNLOCK_HANDLE 0x0C -#define DRM_KGSL_GEM_UNLOCK_ON_TS 0x0D -#define DRM_KGSL_GEM_CREATE_FD 0x0E - -#define DRM_IOCTL_KGSL_GEM_CREATE \ -DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_CREATE, struct drm_kgsl_gem_create) - -#define DRM_IOCTL_KGSL_GEM_PREP \ -DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_PREP, struct drm_kgsl_gem_prep) - -#define DRM_IOCTL_KGSL_GEM_SETMEMTYPE \ -DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_SETMEMTYPE, \ -struct drm_kgsl_gem_memtype) - -#define DRM_IOCTL_KGSL_GEM_GETMEMTYPE \ -DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_GETMEMTYPE, \ -struct drm_kgsl_gem_memtype) - -#define DRM_IOCTL_KGSL_GEM_MMAP \ -DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_MMAP, struct drm_kgsl_gem_mmap) - -#define DRM_IOCTL_KGSL_GEM_ALLOC \ -DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_ALLOC, struct drm_kgsl_gem_alloc) - -#define DRM_IOCTL_KGSL_GEM_BIND_GPU \ -DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_BIND_GPU, struct drm_kgsl_gem_bind_gpu) - -#define DRM_IOCTL_KGSL_GEM_UNBIND_GPU \ -DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_UNBIND_GPU, \ -struct drm_kgsl_gem_bind_gpu) - -#define DRM_IOCTL_KGSL_GEM_GET_BUFINFO \ -DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_GET_BUFINFO, \ - struct drm_kgsl_gem_bufinfo) - -#define DRM_IOCTL_KGSL_GEM_SET_BUFCOUNT \ -DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_SET_BUFCOUNT, \ - struct drm_kgsl_gem_bufcount) - -#define DRM_IOCTL_KGSL_GEM_SET_ACTIVE \ -DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_SET_ACTIVE, \ - struct drm_kgsl_gem_active) - -#define DRM_IOCTL_KGSL_GEM_LOCK_HANDLE \ -DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_LOCK_HANDLE, \ -struct drm_kgsl_gem_lock_handles) - -#define DRM_IOCTL_KGSL_GEM_UNLOCK_HANDLE \ -DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_UNLOCK_HANDLE, \ -struct drm_kgsl_gem_unlock_handles) - -#define DRM_IOCTL_KGSL_GEM_UNLOCK_ON_TS \ -DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_UNLOCK_ON_TS, \ -struct drm_kgsl_gem_unlock_on_ts) - -#define DRM_IOCTL_KGSL_GEM_CREATE_FD \ -DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_CREATE_FD, \ -struct drm_kgsl_gem_create_fd) - -/* Maximum number of sub buffers per GEM object */ -#define DRM_KGSL_GEM_MAX_BUFFERS 2 - -/* Memory types - these define the source and caching policies - of the GEM memory chunk */ - -/* Legacy definitions left for compatability */ - -#define DRM_KGSL_GEM_TYPE_EBI 0 -#define DRM_KGSL_GEM_TYPE_SMI 1 -#define DRM_KGSL_GEM_TYPE_KMEM 2 -#define DRM_KGSL_GEM_TYPE_KMEM_NOCACHE 3 -#define DRM_KGSL_GEM_TYPE_MEM_MASK 0xF - -/* Contiguous memory (PMEM) */ -#define DRM_KGSL_GEM_TYPE_PMEM 0x000100 - -/* PMEM memory types */ -#define DRM_KGSL_GEM_PMEM_EBI 0x001000 -#define DRM_KGSL_GEM_PMEM_SMI 0x002000 - -/* Standard paged memory */ -#define DRM_KGSL_GEM_TYPE_MEM 0x010000 - -/* Caching controls */ -#define DRM_KGSL_GEM_CACHE_NONE 0x000000 -#define DRM_KGSL_GEM_CACHE_WCOMBINE 0x100000 -#define DRM_KGSL_GEM_CACHE_WTHROUGH 0x200000 -#define DRM_KGSL_GEM_CACHE_WBACK 0x400000 -#define DRM_KGSL_GEM_CACHE_WBACKWA 0x800000 -#define DRM_KGSL_GEM_CACHE_MASK 0xF00000 - -/* FD based objects */ -#define DRM_KGSL_GEM_TYPE_FD_FBMEM 0x1000000 -#define DRM_KGSL_GEM_TYPE_FD_MASK 0xF000000 - -/* Timestamp types */ -#define DRM_KGSL_GEM_TS_3D 0x00000430 -#define DRM_KGSL_GEM_TS_2D 0x00000180 - - -struct drm_kgsl_gem_create { - uint32_t size; - uint32_t handle; -}; - -struct drm_kgsl_gem_prep { - uint32_t handle; - uint32_t phys; - uint64_t offset; -}; - -struct drm_kgsl_gem_memtype { - uint32_t handle; - uint32_t type; -}; - -struct drm_kgsl_gem_mmap { - uint32_t handle; - uint32_t size; - uint32_t hostptr; - uint64_t offset; -}; - -struct drm_kgsl_gem_alloc { - uint32_t handle; - uint64_t offset; -}; - -struct drm_kgsl_gem_bind_gpu { - uint32_t handle; - uint32_t gpuptr; -}; - -struct drm_kgsl_gem_bufinfo { - uint32_t handle; - uint32_t count; - uint32_t active; - uint32_t offset[DRM_KGSL_GEM_MAX_BUFFERS]; - uint32_t gpuaddr[DRM_KGSL_GEM_MAX_BUFFERS]; -}; - -struct drm_kgsl_gem_bufcount { - uint32_t handle; - uint32_t bufcount; -}; - -struct drm_kgsl_gem_active { - uint32_t handle; - uint32_t active; -}; - -struct drm_kgsl_gem_lock_handles { - uint32_t num_handles; - uint32_t *handle_list; - uint32_t pid; - uint32_t lock_id; /* Returned lock id used for unlocking */ -}; - -struct drm_kgsl_gem_unlock_handles { - uint32_t lock_id; -}; - -struct drm_kgsl_gem_unlock_on_ts { - uint32_t lock_id; - uint32_t timestamp; /* This field is a hw generated ts */ - uint32_t type; /* Which pipe to check for ts generation */ -}; - -struct drm_kgsl_gem_create_fd { - uint32_t fd; - uint32_t handle; -}; - -#endif diff --git a/freedreno/msm_kgsl.h b/freedreno/msm_kgsl.h deleted file mode 100644 index e67190f0..00000000 --- a/freedreno/msm_kgsl.h +++ /dev/null @@ -1,519 +0,0 @@ -#ifndef _MSM_KGSL_H -#define _MSM_KGSL_H - -#define KGSL_VERSION_MAJOR 3 -#define KGSL_VERSION_MINOR 11 - -/*context flags */ -#define KGSL_CONTEXT_SAVE_GMEM 0x00000001 -#define KGSL_CONTEXT_NO_GMEM_ALLOC 0x00000002 -#define KGSL_CONTEXT_SUBMIT_IB_LIST 0x00000004 -#define KGSL_CONTEXT_CTX_SWITCH 0x00000008 -#define KGSL_CONTEXT_PREAMBLE 0x00000010 -#define KGSL_CONTEXT_TRASH_STATE 0x00000020 -#define KGSL_CONTEXT_PER_CONTEXT_TS 0x00000040 - -#define KGSL_CONTEXT_INVALID 0xffffffff - -/* Memory allocayion flags */ -#define KGSL_MEMFLAGS_GPUREADONLY 0x01000000 - -/* generic flag values */ -#define KGSL_FLAGS_NORMALMODE 0x00000000 -#define KGSL_FLAGS_SAFEMODE 0x00000001 -#define KGSL_FLAGS_INITIALIZED0 0x00000002 -#define KGSL_FLAGS_INITIALIZED 0x00000004 -#define KGSL_FLAGS_STARTED 0x00000008 -#define KGSL_FLAGS_ACTIVE 0x00000010 -#define KGSL_FLAGS_RESERVED0 0x00000020 -#define KGSL_FLAGS_RESERVED1 0x00000040 -#define KGSL_FLAGS_RESERVED2 0x00000080 -#define KGSL_FLAGS_SOFT_RESET 0x00000100 -#define KGSL_FLAGS_PER_CONTEXT_TIMESTAMPS 0x00000200 - -/* Clock flags to show which clocks should be controled by a given platform */ -#define KGSL_CLK_SRC 0x00000001 -#define KGSL_CLK_CORE 0x00000002 -#define KGSL_CLK_IFACE 0x00000004 -#define KGSL_CLK_MEM 0x00000008 -#define KGSL_CLK_MEM_IFACE 0x00000010 -#define KGSL_CLK_AXI 0x00000020 - -/* - * Reset status values for context - */ -enum kgsl_ctx_reset_stat { - KGSL_CTX_STAT_NO_ERROR = 0x00000000, - KGSL_CTX_STAT_GUILTY_CONTEXT_RESET_EXT = 0x00000001, - KGSL_CTX_STAT_INNOCENT_CONTEXT_RESET_EXT = 0x00000002, - KGSL_CTX_STAT_UNKNOWN_CONTEXT_RESET_EXT = 0x00000003 -}; - -#define KGSL_MAX_PWRLEVELS 5 - -#define KGSL_CONVERT_TO_MBPS(val) \ - (val*1000*1000U) - -/* device id */ -enum kgsl_deviceid { - KGSL_DEVICE_3D0 = 0x00000000, - KGSL_DEVICE_2D0 = 0x00000001, - KGSL_DEVICE_2D1 = 0x00000002, - KGSL_DEVICE_MAX = 0x00000003 -}; - -enum kgsl_user_mem_type { - KGSL_USER_MEM_TYPE_PMEM = 0x00000000, - KGSL_USER_MEM_TYPE_ASHMEM = 0x00000001, - KGSL_USER_MEM_TYPE_ADDR = 0x00000002, - KGSL_USER_MEM_TYPE_ION = 0x00000003, - KGSL_USER_MEM_TYPE_MAX = 0x00000004, -}; - -struct kgsl_devinfo { - - unsigned int device_id; - /* chip revision id - * coreid:8 majorrev:8 minorrev:8 patch:8 - */ - unsigned int chip_id; - unsigned int mmu_enabled; - unsigned int gmem_gpubaseaddr; - /* - * This field contains the adreno revision - * number 200, 205, 220, etc... - */ - unsigned int gpu_id; - unsigned int gmem_sizebytes; -}; - -/* this structure defines the region of memory that can be mmap()ed from this - driver. The timestamp fields are volatile because they are written by the - GPU -*/ -struct kgsl_devmemstore { - volatile unsigned int soptimestamp; - unsigned int sbz; - volatile unsigned int eoptimestamp; - unsigned int sbz2; - volatile unsigned int ts_cmp_enable; - unsigned int sbz3; - volatile unsigned int ref_wait_ts; - unsigned int sbz4; - unsigned int current_context; - unsigned int sbz5; -}; - -#define KGSL_MEMSTORE_OFFSET(ctxt_id, field) \ - ((ctxt_id)*sizeof(struct kgsl_devmemstore) + \ - offsetof(struct kgsl_devmemstore, field)) - -/* timestamp id*/ -enum kgsl_timestamp_type { - KGSL_TIMESTAMP_CONSUMED = 0x00000001, /* start-of-pipeline timestamp */ - KGSL_TIMESTAMP_RETIRED = 0x00000002, /* end-of-pipeline timestamp*/ - KGSL_TIMESTAMP_QUEUED = 0x00000003, -}; - -/* property types - used with kgsl_device_getproperty */ -enum kgsl_property_type { - KGSL_PROP_DEVICE_INFO = 0x00000001, - KGSL_PROP_DEVICE_SHADOW = 0x00000002, - KGSL_PROP_DEVICE_POWER = 0x00000003, - KGSL_PROP_SHMEM = 0x00000004, - KGSL_PROP_SHMEM_APERTURES = 0x00000005, - KGSL_PROP_MMU_ENABLE = 0x00000006, - KGSL_PROP_INTERRUPT_WAITS = 0x00000007, - KGSL_PROP_VERSION = 0x00000008, - KGSL_PROP_GPU_RESET_STAT = 0x00000009, - KGSL_PROP_PWRCTRL = 0x0000000E, -}; - -struct kgsl_shadowprop { - unsigned int gpuaddr; - unsigned int size; - unsigned int flags; /* contains KGSL_FLAGS_ values */ -}; - -struct kgsl_pwrlevel { - unsigned int gpu_freq; - unsigned int bus_freq; - unsigned int io_fraction; -}; - -struct kgsl_version { - unsigned int drv_major; - unsigned int drv_minor; - unsigned int dev_major; - unsigned int dev_minor; -}; - -#ifdef __KERNEL__ - -#define KGSL_3D0_REG_MEMORY "kgsl_3d0_reg_memory" -#define KGSL_3D0_IRQ "kgsl_3d0_irq" -#define KGSL_2D0_REG_MEMORY "kgsl_2d0_reg_memory" -#define KGSL_2D0_IRQ "kgsl_2d0_irq" -#define KGSL_2D1_REG_MEMORY "kgsl_2d1_reg_memory" -#define KGSL_2D1_IRQ "kgsl_2d1_irq" - -enum kgsl_iommu_context_id { - KGSL_IOMMU_CONTEXT_USER = 0, - KGSL_IOMMU_CONTEXT_PRIV = 1, -}; - -struct kgsl_iommu_ctx { - const char *iommu_ctx_name; - enum kgsl_iommu_context_id ctx_id; -}; - -struct kgsl_device_iommu_data { - const struct kgsl_iommu_ctx *iommu_ctxs; - int iommu_ctx_count; - unsigned int physstart; - unsigned int physend; -}; - -struct kgsl_device_platform_data { - struct kgsl_pwrlevel pwrlevel[KGSL_MAX_PWRLEVELS]; - int init_level; - int num_levels; - int (*set_grp_async)(void); - unsigned int idle_timeout; - bool strtstp_sleepwake; - unsigned int nap_allowed; - unsigned int clk_map; - unsigned int idle_needed; - struct msm_bus_scale_pdata *bus_scale_table; - struct kgsl_device_iommu_data *iommu_data; - int iommu_count; - struct msm_dcvs_core_info *core_info; -}; - -#endif - -/* structure holds list of ibs */ -struct kgsl_ibdesc { - unsigned int gpuaddr; - void *hostptr; - unsigned int sizedwords; - unsigned int ctrl; -}; - -/* ioctls */ -#define KGSL_IOC_TYPE 0x09 - -/* get misc info about the GPU - type should be a value from enum kgsl_property_type - value points to a structure that varies based on type - sizebytes is sizeof() that structure - for KGSL_PROP_DEVICE_INFO, use struct kgsl_devinfo - this structure contaings hardware versioning info. - for KGSL_PROP_DEVICE_SHADOW, use struct kgsl_shadowprop - this is used to find mmap() offset and sizes for mapping - struct kgsl_memstore into userspace. -*/ -struct kgsl_device_getproperty { - unsigned int type; - void *value; - unsigned int sizebytes; -}; - -#define IOCTL_KGSL_DEVICE_GETPROPERTY \ - _IOWR(KGSL_IOC_TYPE, 0x2, struct kgsl_device_getproperty) - -/* IOCTL_KGSL_DEVICE_READ (0x3) - removed 03/2012 - */ - -/* block until the GPU has executed past a given timestamp - * timeout is in milliseconds. - */ -struct kgsl_device_waittimestamp { - unsigned int timestamp; - unsigned int timeout; -}; - -#define IOCTL_KGSL_DEVICE_WAITTIMESTAMP \ - _IOW(KGSL_IOC_TYPE, 0x6, struct kgsl_device_waittimestamp) - -struct kgsl_device_waittimestamp_ctxtid { - unsigned int context_id; - unsigned int timestamp; - unsigned int timeout; -}; - -#define IOCTL_KGSL_DEVICE_WAITTIMESTAMP_CTXTID \ - _IOW(KGSL_IOC_TYPE, 0x7, struct kgsl_device_waittimestamp_ctxtid) - -/* issue indirect commands to the GPU. - * drawctxt_id must have been created with IOCTL_KGSL_DRAWCTXT_CREATE - * ibaddr and sizedwords must specify a subset of a buffer created - * with IOCTL_KGSL_SHAREDMEM_FROM_PMEM - * flags may be a mask of KGSL_CONTEXT_ values - * timestamp is a returned counter value which can be passed to - * other ioctls to determine when the commands have been executed by - * the GPU. - */ -struct kgsl_ringbuffer_issueibcmds { - unsigned int drawctxt_id; - unsigned int ibdesc_addr; - unsigned int numibs; - unsigned int timestamp; /*output param */ - unsigned int flags; -}; - -#define IOCTL_KGSL_RINGBUFFER_ISSUEIBCMDS \ - _IOWR(KGSL_IOC_TYPE, 0x10, struct kgsl_ringbuffer_issueibcmds) - -/* read the most recently executed timestamp value - * type should be a value from enum kgsl_timestamp_type - */ -struct kgsl_cmdstream_readtimestamp { - unsigned int type; - unsigned int timestamp; /*output param */ -}; - -#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP_OLD \ - _IOR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp) - -#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP \ - _IOWR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp) - -/* free memory when the GPU reaches a given timestamp. - * gpuaddr specify a memory region created by a - * IOCTL_KGSL_SHAREDMEM_FROM_PMEM call - * type should be a value from enum kgsl_timestamp_type - */ -struct kgsl_cmdstream_freememontimestamp { - unsigned int gpuaddr; - unsigned int type; - unsigned int timestamp; -}; - -#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP \ - _IOW(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp) - -/* Previous versions of this header had incorrectly defined - IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP as a read-only ioctl instead - of a write only ioctl. To ensure binary compatability, the following - #define will be used to intercept the incorrect ioctl -*/ - -#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP_OLD \ - _IOR(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp) - -/* create a draw context, which is used to preserve GPU state. - * The flags field may contain a mask KGSL_CONTEXT_* values - */ -struct kgsl_drawctxt_create { - unsigned int flags; - unsigned int drawctxt_id; /*output param */ -}; - -#define IOCTL_KGSL_DRAWCTXT_CREATE \ - _IOWR(KGSL_IOC_TYPE, 0x13, struct kgsl_drawctxt_create) - -/* destroy a draw context */ -struct kgsl_drawctxt_destroy { - unsigned int drawctxt_id; -}; - -#define IOCTL_KGSL_DRAWCTXT_DESTROY \ - _IOW(KGSL_IOC_TYPE, 0x14, struct kgsl_drawctxt_destroy) - -/* add a block of pmem, fb, ashmem or user allocated address - * into the GPU address space */ -struct kgsl_map_user_mem { - int fd; - unsigned int gpuaddr; /*output param */ - unsigned int len; - unsigned int offset; - unsigned int hostptr; /*input param */ - enum kgsl_user_mem_type memtype; - unsigned int reserved; /* May be required to add - params for another mem type */ -}; - -#define IOCTL_KGSL_MAP_USER_MEM \ - _IOWR(KGSL_IOC_TYPE, 0x15, struct kgsl_map_user_mem) - -struct kgsl_cmdstream_readtimestamp_ctxtid { - unsigned int context_id; - unsigned int type; - unsigned int timestamp; /*output param */ -}; - -#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP_CTXTID \ - _IOWR(KGSL_IOC_TYPE, 0x16, struct kgsl_cmdstream_readtimestamp_ctxtid) - -struct kgsl_cmdstream_freememontimestamp_ctxtid { - unsigned int context_id; - unsigned int gpuaddr; - unsigned int type; - unsigned int timestamp; -}; - -#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP_CTXTID \ - _IOW(KGSL_IOC_TYPE, 0x17, \ - struct kgsl_cmdstream_freememontimestamp_ctxtid) - -/* add a block of pmem or fb into the GPU address space */ -struct kgsl_sharedmem_from_pmem { - int pmem_fd; - unsigned int gpuaddr; /*output param */ - unsigned int len; - unsigned int offset; -}; - -#define IOCTL_KGSL_SHAREDMEM_FROM_PMEM \ - _IOWR(KGSL_IOC_TYPE, 0x20, struct kgsl_sharedmem_from_pmem) - -/* remove memory from the GPU's address space */ -struct kgsl_sharedmem_free { - unsigned int gpuaddr; -}; - -#define IOCTL_KGSL_SHAREDMEM_FREE \ - _IOW(KGSL_IOC_TYPE, 0x21, struct kgsl_sharedmem_free) - -struct kgsl_cff_user_event { - unsigned char cff_opcode; - unsigned int op1; - unsigned int op2; - unsigned int op3; - unsigned int op4; - unsigned int op5; - unsigned int __pad[2]; -}; - -#define IOCTL_KGSL_CFF_USER_EVENT \ - _IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_cff_user_event) - -struct kgsl_gmem_desc { - unsigned int x; - unsigned int y; - unsigned int width; - unsigned int height; - unsigned int pitch; -}; - -struct kgsl_buffer_desc { - void *hostptr; - unsigned int gpuaddr; - int size; - unsigned int format; - unsigned int pitch; - unsigned int enabled; -}; - -struct kgsl_bind_gmem_shadow { - unsigned int drawctxt_id; - struct kgsl_gmem_desc gmem_desc; - unsigned int shadow_x; - unsigned int shadow_y; - struct kgsl_buffer_desc shadow_buffer; - unsigned int buffer_id; -}; - -#define IOCTL_KGSL_DRAWCTXT_BIND_GMEM_SHADOW \ - _IOW(KGSL_IOC_TYPE, 0x22, struct kgsl_bind_gmem_shadow) - -/* add a block of memory into the GPU address space */ -struct kgsl_sharedmem_from_vmalloc { - unsigned int gpuaddr; /*output param */ - unsigned int hostptr; - unsigned int flags; -}; - -#define IOCTL_KGSL_SHAREDMEM_FROM_VMALLOC \ - _IOWR(KGSL_IOC_TYPE, 0x23, struct kgsl_sharedmem_from_vmalloc) - -#define IOCTL_KGSL_SHAREDMEM_FLUSH_CACHE \ - _IOW(KGSL_IOC_TYPE, 0x24, struct kgsl_sharedmem_free) - -struct kgsl_drawctxt_set_bin_base_offset { - unsigned int drawctxt_id; - unsigned int offset; -}; - -#define IOCTL_KGSL_DRAWCTXT_SET_BIN_BASE_OFFSET \ - _IOW(KGSL_IOC_TYPE, 0x25, struct kgsl_drawctxt_set_bin_base_offset) - -enum kgsl_cmdwindow_type { - KGSL_CMDWINDOW_MIN = 0x00000000, - KGSL_CMDWINDOW_2D = 0x00000000, - KGSL_CMDWINDOW_3D = 0x00000001, /* legacy */ - KGSL_CMDWINDOW_MMU = 0x00000002, - KGSL_CMDWINDOW_ARBITER = 0x000000FF, - KGSL_CMDWINDOW_MAX = 0x000000FF, -}; - -/* write to the command window */ -struct kgsl_cmdwindow_write { - enum kgsl_cmdwindow_type target; - unsigned int addr; - unsigned int data; -}; - -#define IOCTL_KGSL_CMDWINDOW_WRITE \ - _IOW(KGSL_IOC_TYPE, 0x2e, struct kgsl_cmdwindow_write) - -struct kgsl_gpumem_alloc { - unsigned long gpuaddr; - size_t size; - unsigned int flags; -}; - -#define IOCTL_KGSL_GPUMEM_ALLOC \ - _IOWR(KGSL_IOC_TYPE, 0x2f, struct kgsl_gpumem_alloc) - -struct kgsl_cff_syncmem { - unsigned int gpuaddr; - unsigned int len; - unsigned int __pad[2]; /* For future binary compatibility */ -}; - -#define IOCTL_KGSL_CFF_SYNCMEM \ - _IOW(KGSL_IOC_TYPE, 0x30, struct kgsl_cff_syncmem) - -/* - * A timestamp event allows the user space to register an action following an - * expired timestamp. - */ - -struct kgsl_timestamp_event { - int type; /* Type of event (see list below) */ - unsigned int timestamp; /* Timestamp to trigger event on */ - unsigned int context_id; /* Context for the timestamp */ - void *priv; /* Pointer to the event specific blob */ - size_t len; /* Size of the event specific blob */ -}; - -#define IOCTL_KGSL_TIMESTAMP_EVENT \ - _IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_timestamp_event) - -/* A genlock timestamp event releases an existing lock on timestamp expire */ - -#define KGSL_TIMESTAMP_EVENT_GENLOCK 1 - -struct kgsl_timestamp_event_genlock { - int handle; /* Handle of the genlock lock to release */ -}; - -/* - * Set a property within the kernel. Uses the same structure as - * IOCTL_KGSL_GETPROPERTY - */ - -#define IOCTL_KGSL_SETPROPERTY \ - _IOW(KGSL_IOC_TYPE, 0x32, struct kgsl_device_getproperty) - -#ifdef __KERNEL__ -#ifdef CONFIG_MSM_KGSL_DRM -int kgsl_gem_obj_addr(int drm_fd, int handle, unsigned long *start, - unsigned long *len); -#else -#define kgsl_gem_obj_addr(...) 0 -#endif -#endif -#endif /* _MSM_KGSL_H */ -- cgit v1.2.3